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Lecture-3

The document discusses Instruction Set Architecture (ISA), which serves as an interface between hardware and software, detailing its key components such as instruction sets, registers, data types, and addressing modes. It contrasts two types of ISA: Complex Instruction Set Computing (CISC), which features a rich set of instructions, and Reduced Instruction Set Computing (RISC), which emphasizes simplicity and efficiency. Additionally, it compares Von Neumann and Harvard architectures, highlighting their differences in memory organization and execution processes.
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0% found this document useful (0 votes)
14 views

Lecture-3

The document discusses Instruction Set Architecture (ISA), which serves as an interface between hardware and software, detailing its key components such as instruction sets, registers, data types, and addressing modes. It contrasts two types of ISA: Complex Instruction Set Computing (CISC), which features a rich set of instructions, and Reduced Instruction Set Computing (RISC), which emphasizes simplicity and efficiency. Additionally, it compares Von Neumann and Harvard architectures, highlighting their differences in memory organization and execution processes.
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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COMPUTER ARCHITECTURE

Lectures: Dr. Kashif Naseer Qureshi


WEEK-3: INSTRUCTION SET ARCHITECTURE
Instruction Set Architecture (ISA)
• ISA refers to the set of instructions that a microprocessor or a
central processing unit (CPU) is designed to execute.

• It serves as an interface between the hardware and software


components of a computer system, defining the repertoire of
machine-level operations that a processor can perform.

• ISA encompasses the specific instructions a processor recognizes,


the data types it can manipulate, the registers available for use,
and the addressing modes for accessing memory.
Instruction Set Architecture (ISA)…
Key components and characteristics of ISA include:
• Instruction Set
• The set of machine-level instructions that a CPU can execute.
• These instructions perform operations such as arithmetic calculations, data movement, control
flow, and more.
• Registers
• Storage locations within the CPU that are used to hold data temporarily during program
execution.
• Registers play a crucial role in the speed and efficiency of instruction execution.
• Data Types
• The types of data that the processor can handle, including integers, floating-point numbers,
characters, and others.
• Addressing Modes
• Methods for specifying the location of operands in memory. Different addressing modes allow
for flexibility in how data is accessed.
Instruction Set Architecture (ISA)…

• ISA serves as a critical abstraction layer, enabling software developers to write


programs without needing to be concerned with the underlying hardware details.

• At the same time, ISA provides hardware designers with a standard interface to
ensure compatibility between different components and generations of processors.

There are different types of ISA


–Complex Instruction Set Computing (CISC)

–Reduced Instruction Set Computing (RISC)

• The ISA is a foundational aspect of computer architecture and plays a significant role
in determining the overall performance and capabilities of a computer system.
Instruction Set Architecture (ISA)…
CISC (Complex Instruction Set Computing)

• CISC is a type of computer architecture design that emphasizes a rich set of


instructions for a processor.
• In CISC architectures, each instruction can perform a variety of low-level
operations, and complex operations can often be accomplished with a single
instruction.
Key characteristics and details about CISC:

Rich Instruction Set

• CISC architectures have a large number of instructions, each capable of


performing a variety of tasks.
• These instructions are often complex and can involve multiple low-level
operations.
Instruction Set Architecture (ISA)…

CISC (Complex Instruction Set Computing)…

Single Instructions for Multistep Operations

• Unlike Reduced Instruction Set Computing (RISC), where instructions are simple and
typically perform only one basic operation
• CISC instructions can encapsulate more complex tasks.
For example
A single CISC instruction might perform the loading of a value from memory, an arithmetic
operation, and the storing of the result back to memory.
Instruction Set Architecture (ISA)…

CISC (Complex Instruction Set Computing)…

Variable-Length Instructions
• CISC instructions can vary in length, which means that some instructions may take
more memory space than others.
• This flexibility allows for more powerful and complex operations but can also lead to
challenges in instruction decoding and pipelining.

Memory-Operands
• CISC instructions often allow for direct memory-to-memory operations, where data can
be moved between memory locations without having to go through registers.
• This feature simplifies the programming model but can complicate the hardware design.
Instruction Set Architecture (ISA)…

CISC (Complex Instruction Set Computing)…

Examples of CISC Architectures:

1. x86 architecture (e.g., Intel and AMD processors)

2. Motorola 68k series

3. VAX (Virtual Address eXtension) architecture


Instruction Set Architecture (ISA)…
Advantages of CISC:
1. Code Density
• CISC instructions can represent higher-level
programming constructs, leading to shorter and
more compact code.
2. Ease of Programming
• CISC architectures often provide a more natural and
expressive programming model for software
developers.
Instruction Set Architecture (ISA)…
Disadvantages of CISC:
1. Complexity
• The complexity of CISC instructions can make the hardware
design more intricate.
2. Pipeline Stall
• Variable-length instructions and complex operations can
lead to pipeline stalls, impacting the overall performance.
Evolution

• CISC architectures have incorporated RISC-like features to improve


performance, leading to hybrids known as Complex-RISC (CISC-RISC)
architectures.
Instruction Set Architecture (ISA)…
Reduced Instruction Set Computing (RISC)
• It is a small, highly optimized set of instructions.
• Aim to simplify the instruction set, focusing on a few fundamental operations
that can be executed quickly.

Here are some key characteristics and details about RISC:

Simplified Instruction Set


• RISC architectures have a reduced and simplified set of instructions compared to
CISC)
• The instructions are typically simple and perform basic operations, each taking a
single clock cycle.
Instruction Set Architecture (ISA)…
Single-Cycle Execution
• RISC processors aim to complete most instructions in a single clock cycle, leading
to faster and more predictable execution times.
• This design philosophy is based on the principle of "pipelining," where different
stages of instruction execution overlap to improve overall throughput.
Load/Store Architecture
• RISC architectures often follow a load/store architecture, meaning that only
specific load and store instructions can access memory.
• Arithmetic operations are performed only on register contents, promoting
efficiency and simplicity.
Instruction Set Architecture (ISA)…
Uniform Instruction Format
• RISC instructions typically have a uniform format, making it easier
to decode and execute them in a pipelined fashion.
• This uniformity simplifies the hardware design and facilitates
efficient use of resources.
Register Usage
• RISC architectures rely heavily on a set of general-purpose registers.
• Instructions frequently operate on these registers, reducing the need
to access data from memory.
• This minimizes memory-related delays and enhances performance.
Instruction Set Architecture (ISA)…
Examples of RISC Architectures:
1. ARM (Acorn RISC Machine)
2. MIPS (Microprocessor without Interlocked Pipeline Stages)
3. PowerPC
4. SPARC (Scalable Processor Architecture)
Advantages of RISC:
Simplicity
• The reduced and simplified instruction set leads to simpler hardware
design.
High Performance
• Single-cycle execution and pipelining contribute to high-performance
computing.
Instruction Set Architecture (ISA)…
Disadvantages of RISC:

Code Size

• Due to the reduced instruction set, RISC code might be larger than
equivalent CISC code, though this is often mitigated by efficient instruction
encoding.

Programming Challenges

• Some operations that might be expressed in a single CISC instruction may


require multiple RISC instructions, potentially making programming less
intuitive.
Instruction Set Architecture (ISA)…
Evolution

• Modern RISC processors have evolved to incorporate features traditionally


associated with CISC architectures.
• SIMD (Single Instruction, Multiple Data) instructions and more complex
instructions, to achieve a balance between simplicity and performance.
Von Neumann vs. Harvard Architecture
The Von Neumann architecture is a fundamental concept in
computer science and architecture.

Here are easy details about the Von Neumann architecture:


Named After a Pioneer
• The Von Neumann architecture is named after John von
Neumann, a Hungarian-American mathematician and
computer scientist.
Basic Idea
• It's a design concept for building computers where the
program instructions and data share the same memory
space.
Von Neumann vs. Harvard Architecture...
Main Components:
Memory (RAM)
• Stores both program instructions and data.
Central Processing Unit (CPU)
• Executes instructions fetched from memory.
Control Unit
• Manages the flow of data and instructions between the CPU and memory.
Arithmetic and Logic Unit (ALU)
• Performs arithmetic and logical operations.
Stored Program Concept
• Programs are stored in memory, and the CPU fetches and executes instructions
sequentially.
Von Neumann vs. Harvard Architecture…

Sequential Execution
• Instructions are processed one at a time, in order, from the
memory.
Fetch-Decode-Execute Cycle
• The CPU follows a cycle of fetching an instruction from memory,
decoding it to understand the operation, and then executing it.
Flexibility
• The architecture allows for a wide range of applications by
changing the stored program in memory.
Von Neumann vs. Harvard Architecture…
•.
Characteristics:

Stored Program
• Programs are stored in memory and treated as data.
Sequential Execution
• Instructions are executed one after the other.
Single Data Bus
• A single bus is used for both instruction and data transfer.
Von Neumann Bottleneck
• The sequential nature can lead to performance limitations.
Von Neumann vs. Harvard Architecture…

Example
• Many modern computers, including personal computers, follow the Von
Neumann architecture.
Impact
• The Von Neumann architecture laid the foundation for the development
of modern computers and is a standard model for most general-purpose
computers today.
• The Von Neumann architecture is a classic design where programs and
data share the same memory, and the CPU executes instructions
sequentially.
Von Neumann vs. Harvard Architecture…
Harvard Architecture

• The Harvard Architecture is a computer architecture design that separates the


storage and processing of instruction and data into distinct memory systems.
• This is in contrast to the Von Neumann Architecture, where program instructions
and data share the same memory.

Key characteristics

Separate Instruction and Data Memory

1. Harvard Architecture has separate memory units for storing program


instructions and data.
2. This separation allows the CPU to fetch instructions and access data
simultaneously.
Von Neumann vs. Harvard Architecture…
Harvard Architecture…
Advantages
Simultaneous Access: Since instructions and data have dedicated paths, the
CPU can fetch an instruction while simultaneously accessing or modifying data.
Parallelism: The architecture inherently supports parallel processing, which
can lead to improved performance.
Components
Instruction Memory (Program Memory): Stores the program
instructions that the CPU executes.
Data Memory (RAM): Stores data used by the program during execution.
Von Neumann vs. Harvard Architecture…
Harvard Architecture…
Instruction Fetch and Execute
• The CPU can fetch an instruction from the instruction
memory while simultaneously accessing or modifying data in
the data memory.
Types of Harvard Architecture:
• Modified Harvard Architecture: While strictly separated
in principle, some systems may have limited connections
between the instruction and data memory for efficiency,
leading to a modified Harvard Architecture
Von Neumann vs. Harvard Architecture…
Harvard Architecture…
Common in Embedded Systems
• It used in embedded systems, microcontrollers, and digital signal processors
(DSPs) where efficiency and real-time processing are critical.
Examples of Harvard Architecture
• Harvard Mark I: One of the earliest examples of the Harvard Architecture
was the Harvard Mark I electromechanical computer, developed in the
1940s.
• Microcontrollers: Many microcontrollers, such as those used in
embedded systems, follow the Harvard Architecture's
Von Neumann vs. Harvard Architecture…
Harvard Architecture…
Disadvantages
1. Complexity: Implementing a strict Harvard Architecture can be more
complex than Von Neumann Architecture, especially in systems requiring
dynamic modification of code.
Harvard vs. Von Neumann
1. Von Neumann Bottleneck: The separation in Harvard Architecture helps
overcome the Von Neumann bottleneck, where the CPU can be slowed
down by the need to share a single memory bus for both instructions and
data.
Von Neumann vs. Harvard Architecture…
Harvard Architecture…
Evolution

• Some modern processors use elements of both Harvard and Von Neumann
architectures, creating hybrid architectures to optimize performance.
• The Harvard Architecture provides separate memory for instructions and data,
enabling simultaneous access and potentially improving processing speed,
making it particularly suitable for real-time and embedded systems.
THE END

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