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Time-Dependent Behaviour of Digital Circuits With Feedback: DOC112: Computer Hardware Lecture 06 Slide 1

1. The document discusses time-dependent behavior in digital circuits with feedback using various models including switch-and-delay and variable resistance. 2. It analyzes a "curious circuit" where the output feeds back into the input, first showing it leads to impossible outputs using Boolean algebra, then exploring it can oscillate using switch-and-delay modeling and settle at an invalid value using variable resistance modeling. 3. It also analyzes a more useful circuit with feedback that can have stable states using a transition table and diagram showing its behavior over time changes in inputs.

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Taqi Shah
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95 views

Time-Dependent Behaviour of Digital Circuits With Feedback: DOC112: Computer Hardware Lecture 06 Slide 1

1. The document discusses time-dependent behavior in digital circuits with feedback using various models including switch-and-delay and variable resistance. 2. It analyzes a "curious circuit" where the output feeds back into the input, first showing it leads to impossible outputs using Boolean algebra, then exploring it can oscillate using switch-and-delay modeling and settle at an invalid value using variable resistance modeling. 3. It also analyzes a more useful circuit with feedback that can have stable states using a transition table and diagram showing its behavior over time changes in inputs.

Uploaded by

Taqi Shah
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Lecture 6

Time-Dependent Behaviour of Digital Circuits with Feedback

DOC112: Computer Hardware Lecture 06

Slide 1

In this lecture we will:


Examine the behaviour of a digital circuit in which connections between gate outputs and inputs create a loop which we call feedback. Remember, it is perfectly legal to connect any gate output to any gate input as long as outputs are not connected together. . knowing this, student "V. Mischievous" presented me (on paper) the following circuit:

DOC112: Computer Hardware Lecture 06

Slide 2

A Curious Circuit

What is the output of this circuit? If input A is logic 0, R is logic 1, [0, 1] input to a NAND gate produces logic 1 and R is logic 1 .. ok..

DOC112: Computer Hardware Lecture 06

Slide 3

A Curious Circuit

Given that A=1 Boolean algebra tells us: R = (R.A)' = (R.1)' = R' Impossible! Now what????
DOC112: Computer Hardware Lecture 06 Slide 4

Engineering Approach
When a model (like the Boolean algebra model of a digital gate) breaks down, and its behaviour is unpredictable, we must go down one "physical description" level and examine how the actual physical device was constructed. This may help us to predict what will happen. So what were those models from the last lecture?
DOC112: Computer Hardware Lecture 06 Slide 5

Quasi-Physical Models

Switch and Delay

Variable Resistance

These are needed only to construct a logical model which can be used to analyse unusual behaviour in the laboratory.
DOC112: Computer Hardware Lecture 06 Slide 6

The Switch and Delay Model


This model only really differs from Boolean algebra by the inclusion of a time delay between input (left hand side) and output (right hand side). Its time behaviour is described by the following example:

DOC112: Computer Hardware Lecture 06

Slide 7

The variable resistance model


This gives us a more accurate representation of the real behaviour

We no longer have a valid Boolean signal output when changing from 0 to 1 and back.
DOC112: Computer Hardware Lecture 06 Slide 8

Analogue Model
The variable resistance model is not digital but analogue. The variable resistor can be adjusted continuously. To interpret its behaviour as a digital circuit we need to introduce the concept of a noise margin.

DOC112: Computer Hardware Lecture 06

Slide 9

Noise Margin
The noise margin gives us a definite threshold (1.7volts) above which we know that our signal represents a Boolean 1, and similarly a a definite threshold (0.5Volts) below which we know our signal represents Boolean 0. We aim to design our circuits so that they operate well away from the threshold, so normally we aim to make Boolean 1 around 3.5 Volts, and Boolean 0 around 0.3 Volts

DOC112: Computer Hardware Lecture 06

Slide 10

Potential Dividers
For any input voltage, the variable resistance model acts like a potential divider. So:

Rt is made up of the transistor resistance (Rvar) and the input resistance of the next gate (Rload)
DOC112: Computer Hardware Lecture 06 Slide 11

Putting in some real resistances


For typical resistances the circuit seems to work well with good noise margins.

DOC112: Computer Hardware Lecture 06

Slide 12

Fan-Out
The fan-out of a gate is the number of different gate inputs to which it is connected. If a transistor is connected to n gates, the circuit becomes:

DOC112: Computer Hardware Lecture 06

Slide 13

Fan-Out
Resistors in parallel combine according to the inverse law: 1/R = 1/R1 + 1/R2 + 1/R3 + . . . So if a gate output is connected to 10 gate inputs the load resistance becomes 1/10 of a single gate. The operating voltages become:

DOC112: Computer Hardware Lecture 06

Slide 14

Problem Time!
Given that Rsource=1000 Ohms, estimate the value of Rt when the circuit will fail, ie when the output voltage corresponding to Boolean 1 will be below 1.7.

Given Rvar is 3000 Ohms for logic 1 and Rload for a single gate (fanout=1) is 10000 Ohms, estimate the fan-out that will cause a failure.
DOC112: Computer Hardware Lecture 06 Slide 15

Solution
The output voltage is calculated by a potential divider. Vout = 5Rt/(Rsource+Rt) = 1.7 (5-1.7)Rt = 1.7Rsource Rt = (1.7/3.3) Rsource ~ Rsource/2 Rt is approximately 500 Ohms

DOC112: Computer Hardware Lecture 06

Slide 16

Solution 2
1/Rload + 1/Rvar = 1/Rt Rt=500 Ohms causes failure 1/Rload + 1/3000 = 1/500 Rload = 600 For a fan out of n, Rload = 10000/n Do n = 10000/600 ~ 17

DOC112: Computer Hardware Lecture 06

Slide 17

Fan-Out
Another undesirable property of large fan-outs is that the time delay increases. This is because the load capacitor increases.

Time delay is directly proportional to the load capacitor. Capacitors in parallel add.

DOC112: Computer Hardware Lecture 06

Slide 18

Returning to the curious circuit:

Analysis using Switch-and-Delay Model


Let A=1, and assume that R=1 initially The gate senses inputs 11 and waits a bit (delay!) The output stage switches to the correct output: R=0 The gate senses inputs 01 and waits a bit (delay!) The output stage switches to the correct output: R=1 and so on We have oscillation !
DOC112: Computer Hardware Lecture 06 Slide 19

Analysis using the Variable Resistor Model


We assume that the input of our circuit A=1; therefore, the NAND gate is equivalent to an inverter:

Vin Vin=(Vout)'

Vout

DOC112: Computer Hardware Lecture 06

Slide 20

Analysis using the Variable Resistor Model


We CAN solve this impossible looking problem graphically, since Vin=Vout represents a straight line through the origin.

What this model says is that the output of this circuit will settle at an invalid digital value around 1.2 volts.
DOC112: Computer Hardware Lecture 06 Slide 21

So, what will happen in the lab?


The most likely result is that a bad digital output value would result. However, we do not not know for certain unless a very very very high frequency oscilloscope is connected to the output of the circuit. Any oscillation will be very fast and difficult to detect.

DOC112: Computer Hardware Lecture 06

Slide 22

Feedback Circuits
The curious circuit we have been studying seems pretty useless! However we have at least learned how to begin to analyse circuits with feedback. For the moment we will ignore all the problems caused by fan-out, and use the simpler switch and delay model for our analysis.

DOC112: Computer Hardware Lecture 06

Slide 23

Analysis of Digital Circuits with Feedback


1.Assign names to the independent inputs of the circuit and to all its gate outputs. 2.Create a table with two columns of numbers. The first column is labelled NOW and has all the possible combinations of 1s and 0s for the independent inputs and gate outputs. 3.Calculate the values the gate outputs will become after the gate delays; this will be the NEXT column of values. 4.Find stable, bistable, and unstable states.
DOC112: Computer Hardware Lecture 06 Slide 24

Analysis of our Curious Circuit

Transition Table
A R (now)
0 0 1 1 0 1 0 1

Transition Diagram
00 01 10 Stable

A R (next)
0 0 1 1 1 1 1 0

11

Bistable
Slide 25

DOC112: Computer Hardware Lecture 06

Analysis of a More Useful Circuit

The Boolean Equations for this circuit are: S = (AR) R = (SB)

We have four variables so there will be sixteen states.


DOC112: Computer Hardware Lecture 06 Slide 26

Transition Table of a More Useful Circuit


A B S R (now) 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1
DOC112: Computer Hardware Lecture 06

A BS R (next) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 1 1 0 1 1 1 0 1 1 0 0 1 1 0 1 0 1 1 1 0 0 1 1 0 1 1 1 0 0 1 1 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0

Stable Stable Stable

Stable
Slide 27

The Transition Diagram


From the Transition Table we can construct the Transition Diagram
A B S R (now) 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 A BS R (next) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 1 1 0 1 1 1 0 1 1 0 0 1 1 0 1 0 1 1 1 0 0 1 1 0 1 1 1 0 0 1 1 1 1 1 1 1 0 1 1 1 1 0 1 1 0 0

DOC112: Computer Hardware Lecture 06

Slide 28

Conclusions
From the diagram we see the following:
Input Input Input Input

00 -> Output 11 01 -> Output 10 10 -> Output 01 11: Hold or oscillate

Next time we will use this to make a memory


DOC112: Computer Hardware Lecture 06 Slide 29

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