September 21, 2004

Technical Material for SC Service Training on Power Block

[Power block]
This block uses the same circuit structure and ICs as those of DX-NT400E basically.
The differences from DX-NT400E are power-factor transformer, forward transformer, choke coil, and fuse rating.

1. Applied standards
For safety: EN60950 (Europe)
UL60950 (North America)
J60950 (Japan)
For EMC: EN55022 Class B, EN55024 (Europe)
FCC Part 15 Subpart B Class A
ICES-003 Digital Apparatus Class A
J55022 Class A

2. Function and operation of each circuit

2.1 Power-factor correction circuit
2.1.1 Outline of the circuit operation
FA5500 is an IC for controlling the power-factor correction converter that uses a step-up chopper, and it uses
the critical mode for its operation. With the schematic circuit diagram shown in Figure 1, this section describes
the outline of the operation of FA5501, dividing it into two operation types; switching operation and power-
factor correction operation.

(1) Switching operation

FA5501 carries out switching operation in the critical mode that utilizes self-excited vibration without the
help of an oscillator. Figure 2 shows the outline of the waveforms observed at each pin during switching
operation in a steady state. The process of switching operation is as follows.

t1. When Q1 turns on, the current of the inductor (L1) will start rising from zero.
t2. When this current reaches a reference value of the current comparator (CUR.comp.) that is determined
according to the output from the multiplier (MUL), a reset signal will be supplied to the R-S flip-flop
and Q1 will turn off. When Q1 turns off, the voltage of L1 will reverse and the current of L1 will
decrease, supplying a current to the output side via D1. During this process, the voltage of the
auxiliary winding will also reverse, generating a positive voltage.
t3. When the current of L1 returns to zero completely, the voltage of L1 will resonate with the parasitic
capacitor in the circuit, dropping rapidly. The voltage Vsub of the auxiliary winding that is added to
L1 will also drop rapidly.
t4. When Vsub drops to the internal reference voltage of 1.33 V, the output from the zero current detector
(ZCD.comp) will reverse. A set signal will be supplied to the R-S flip-flop at the falling edge of this
output, turning on Q1 again, and the process will move on to the next switching cycle. (Repeat from
t1.)

FA5501 continues its switching operation in the critical mode by repeating the process from t1 to t4.
In the power-factor correction circuit in the critical mode, the switching frequency always keeps varying
depending on each instantaneous value of the AC input voltage. In addition, the switching frequency also
varies with change in the input voltage or the load.

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 Figure 1. Schematic circuit diagram
Figure 2. Switching operation,
Waveform at each pin (Summary)

(2) Power-factor correction operation

As described in the section of switching operation, the current flowing through the inductor shows repeated
triangular waves. The average value of this current showing repeated triangular waves ( IL1(mean)) will be one
half of the peak value (IL1(peak)).
By controlling the peak value of the inductor current so that it shows a sinusoidal wave and removing the
ripple current associated with switching, it is possible to make the waveform of the current flowing from
the AC power source sinusoidal. In the actual circuitry, the multiplier (MUL) inside FA5501 is used to
make the waveform of the inductor current sinusoidal at its peak.
C3 makes the voltage of the COMP terminal, which is an output of the error amplifier (ERRAMP), almost
dc voltage in a steady state. This voltage is input to the multiplier. To the other input terminal of the
multiplier, a wave that is a rectified AC input voltage is input. As a result, the multiplier outputs a
sinusoidal wave in proportion to the AC input voltage; such sinusoidal wave is the product of the above-
mentioned two waves.
This sinusoidal voltage wave that is output from the multiplier is input to the current comparator
(CUR.comp) as a reference of the inductor current.
As a consequence, the inductor current will show a sinusoidal repeated triangular wave at its peak (I L1(peak)).
By removing the switching ripple from the current of the inductor L1 using C1 and averaging the resulting
current, the current flowing from the ac input voltage will become almost sinusoidal, resulting in corrected
power-factor.

Enlarged

Sinusoidal wave

Ripple current associated Sinusoidal wave

with switching is removed

by C1.

(Almost dc)

Figure 3. Power-factor Figure 4. Concept of waves at each part in

correction waveform operation
(Summary)
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2.1.2 Operation of each block
(1) Error amplifier
FA5501 uses a transconductance amplifier as an error amplifier that is for keeping the output voltage
constant. The transconductance amplifier receives voltage as an input signal and supplies current as an
output signal.
The non-inverting input terminal is connected to the internal reference voltage of 2.5 V (typ.) within
FA5501. The non-inverting input terminal receives the output voltage from the power-factor correction
converter, and usually such output voltage from the converter is divided by resistors and then input to this
terminal. Moreover, the inverting input terminal is connected to the constant current source of 2.5 µA
within FA5501 for the purpose of detecting FB short.
The output of the error amplifier is connected to the multiplier. The output range of the error amplifier that
is determined by the dynamic range of the multiplier is usually 2.04 to 3.54 V (typ.). In order to prevent
excessive drop of the output voltage of the error amplifier in case of occurrence of a transient condition
such as abrupt change in the load, diodes are provided between the input and output of the error amplifier.
The output voltage of the power-factor correction converter usually contains a large amount of ripples that
have the frequency twice as high as that of the AC line (that is 50 or 60 Hz in general). When such ripple
components having the frequency twice as high as that of the AC line appear to a large degree in the output
of the error amplifier, the power-factor correction converter does not operate with stability. To deal with
this, by providing a capacitor between GND and the 2-pin (COMP), which is an output of the error
amplifier, and by setting the cutoff frequency to approx. 20 Hz, such ripple components are prevented from
appearing in the output of the error amplifier.

Figure 5. Peripheral circuits of the error

amplifier

(2) Overvoltage protection circuit

This circuit is for limiting the output voltage of the power-factor correction converter when such output
exceeds a predetermined value.
When the converter starts operating or the load abruptly changes, the output voltage of the converter may
rise exceeding a predetermined value. In such cases, this circuit prevents the output voltage from further
rising to protect the circuitry.
As shown in Figure 5, the overvoltage protection circuit consists of the comparator (OVP) and the
reference voltage. This reference voltage is set to be 1.09 times higher than the reference voltage of the
error amplifier.
The voltage at the FB terminal is usually almost same as the reference voltage of 2.5 V of the error
amplifier. While the output voltage rises for some reason and the voltage at the FB terminal exceeds the
comparator reference voltage, the output voltage of the comparator (OVP) will reverse during such period
of time, stopping the OUT pulse. When the output voltage drops to a normal value, the OUT pulse will be
output again.

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(3) FB short detection circuit
For example, in the circuit shown in Figure 6, if a failure such as a short circuit in R2 of the resistor
voltage dividing circuit and an open-circuit failure in R1 should occur, causing the voltage not to be input
to the FB terminal, the error amplifier fails to keep the voltage constant and its output voltage abnormally
rises. In such cases, the overvoltage protection circuit also fails to operate because detection of the output
voltage is not carried out correctly. To prevent such failure, FA5501 is equipped with an FB short
detection circuit.
This circuit consists of a reference voltage of 0.3 V (typ.) and a comparator (SP). When the input voltage
of the FB terminal drops to 0.3 V or lower because of a short circuit in R2 or an open-circuit failure in R1,
the output from the comparator (SP) will reverse to stop FA5501 from outputting.
Because the power-factor correction converter uses a step-up chopper, a voltage equivalent to the input
voltage is supplied to the output even before this converter starts operating. It means that a voltage is
always applied to the FB terminal and this circuit does not operate as long as the circuitry operates
correctly.
In addition, if an open-circuit failure occurs between the FB terminal and the resistor voltage dividing
circuit, the voltage at the FB terminal is forced to drop by the constant current source of 2.5 µA, which is
connected to the FB terminal within FA5501, causing the circuitry to stop operating.
Once the voltage at the FB terminal drops to almost zero and FA5501 stops its output, the OUT pulse is not
output again unless the voltage at the FB terminal returns to a normal value.

Output stop Open

Detection

Short

Figure 6. FB short detection circuit

(4) Multiplier
The multiplier is a circuit to make the input current to be a sinusoidal wave.
One input is connected to the MUL terminal, which receives a rectified and then divided AC input voltage.
The other input is connected to the output of the error amplifier within FA5501. The error amplifier usually
supplies dc outputs, and the multiplier outputs sinusoidal voltage of which amplitude varies depending on
the output voltage of the error amplifier. This output voltage of the multiplier is a reference of the current
comparator and it is used to keep the input voltage sinusoidal.
In consideration of the dynamic range of the multiplier, the peak voltage that is input to the MUL terminal
shall be 2.5 V or less in normal use.
Rectified AC input voltage contains a large amount of noise caused by switching of Q1. To eliminate the
effect of such noise, the filtering capacitor C6 is usually connected.

Figure 7. Multiplier

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(5) Current detecting comparator
One input of the comparator is connected to the output of the multiplier, which is used as a current
reference, within FA5501. The other input is connected to the IS terminal, which supplies this input with a
source current of MOSFET that is later converted into a voltage by the detecting resistor R s. In every
switching cycle, when the current of MOSFET reaches a reference value that is determined by the output of
the multiplier, the output of the current comparator will reverse and a reset signal will be supplied to the R-
S flip-flop. As a result, MOSFET will turn off and the on-period of MOSFET in the relevant cycle will
end.
The upper limit of the reference voltage of the current comparator is kept 1.8 V within FA5501.
Due to this, the maximum value of the current of MOSFET is determined by the following equation even in
case of occurrence of a transient condition such as startup of the converter and abrupt change in the input
voltage or the load.
Id (max) = 1.8/Rs
As a prevention of malfunction due to noise, a CR filter is usually connected between the IS terminal and
the detecting resistor Rs.

Output circuit block

MUL
output

Figure 8. Current comparator

(6) Zero-current detecting circuit

FA5501 carries out switching operation in the critical mode that utilizes not frequencies that are fixed by
the oscillator but self-excited vibration.
The zero-current detector is a circuit that detects when the inductor current becomes zero for the purpose of
operation in the critical mode.
The ZCD terminal is supplied with a voltage of an auxiliary winding that is provided for the inductor using
the polarity as shown in Figure 9. Then, a positive voltage develops at this winding during the period over
which MOSFET is off. After that, when the inductor current returns to zero, the voltage at the auxiliary
winding will drop rapidly. ZCD.comp detects such voltage drop and supplies a set signal to the R-S flip-
flop to turn on MOSFET to go on to the next cycle.

Clamp circuit

Figure 9. Zero-current detecting circuit

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 The voltage at the auxiliary winding varies greatly depending on the circuitry and the input voltage. To
deal with such variation, a clamp circuit is provided with the upper limit of 5.7 V (typ.) and the lower limit
of 0.6 V (typ.).
According to the rated current of the clamp circuit, a resistor for controlling the current shall be provided
between the clamp circuit and the auxiliary winding.
During the period over which MOSFET is on, a negative voltage develops at the auxiliary winding. Then,
a current flows from the clamp circuit to clamp the voltage at the ZCD terminal to be 0.6 V (typ.).
During the period over which MOSFET is off, a positive voltage develops at the auxiliary winding. Then, a
current flows to the clamp circuit to clamp the voltage at the ZCD terminal to be 5.7 V (typ.).
To endure correct operation of FA5501, the current of the clamp circuit shall be kept 3 mA or less. If it
exceeds 3 mA, the input current may be distorted.
In addition, due to the temperature characteristics of the clamp circuit, the range of the operating
temperature may vary depending on the value of the resistor R5 for controlling the current.
During period over which MOSFET is off
During period over which MOSFET is on
Clamp circuit
Clamp circuit
Clamp circuit
Clamp circuit
current
current

Figure 11. Zero-current detector clamp circuit (2)

Figure 10. Zero-current detector clamp circuit (1)

(7) Light-load control circuit

If no offset voltage is present in the output of the multiplier that provides a reference value of the current
comparator, the current supplied to the power-factor correction converter is almost zero when the load is
not applied to the converter at all.
Actually however, an offset voltage may appear because of variation in FA5501. When such offset voltage
is positive, an input current corresponding to the offset voltage flows into the converter even under no-load
or light-load conditions. In such cases, because the input current is excessive, the output voltage of the
converter rises abnormally.
To prevent such phenomenon, a light-load control circuit (AOC) is provided. The output voltage of the
error amplifier is 2 V or more in normal use. When this output voltage of the error amplifier drops to 2 V
or less, the light-load control circuit starts operating.
If a positive offset voltage is present in the output of the multiplier, the output voltage of the error amplifier
drops to 2 V or less when the output of the power-factor correction converter is subject to no load or light
load. Then, the light-load control circuit corrects the offset voltage on the current comparator’s side.
Owing to such process, even under no-load or light-load conditions, the output voltage of the power-factor
correction converter is prevented from rising abnormally and is always kept constant.
In addition, the correction amount varies linearly depending on the output of the voltage error amplifier,
allowing the circuitry to operate with stability.
Conceptual illustration where a positive offset voltage is present in the output of the multiplier:
Power-factor correction converter
Output voltage Vo

Characteristics of
AC input current

Input current With the light-load the output voltage

AC input current

Without the light-load

control circuit
control circuit
Without the light-load
control circuit
Rated load
Rated load

Effect by the light-load

control circuit
No load
With the light-load control circuit
Current corresponding to
the offset voltage No load

Time Time Power-factor correction converter

1/2 cycle of the AC input voltage 1/2 cycle of the AC input voltage Output power Po
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Figure 12. Operation of the light-load control circuit
(8) Restart timer
FA5501 utilizes self-excited vibration without the help of an oscillator, and it turns on MOSFET using the
signal from the zero-current detector in a steady state.

However, a trigger signal of some kind is required for generating an ON-signal at the time of startup or for
ensuring stable operation under light-load conditions.
FA5501 is equipped with a restart timer to generate a trigger signal automatically when the output of
FA5501 remains off for a period of 200 µs or longer. With this trigger signal, it is possible to keep stable
operation at the time of startup and under light-load conditions.

(9) Under-voltage lockout circuit

An under-voltage lockout circuit is provided as a prevention of erroneous operations of the circuitry in the
case where the power supply voltage drops.
The circuitry starts operating when the power supply voltage reaches 13 V (typ.) from zero. If the voltage
drops after the start of the operation, this circuit stops operating when the voltage drops to 9 V (typ.).
During the period over which the under-voltage lockout circuit is operating to stop FA5501 operating, the
level of the OUT terminal becomes low to shut off the output.
In addition, the current consumption of FA5501 decreases to be as small as 20 µA.

(10)Output circuit block

This output circuit block uses a push-pull circuit configuration and it is capable of driving MOSFET
directly. The maximum peak current of this block is 1.0 A for the sink and 0.5 A for the source.

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2.2 Forward converter
2.2.1 Operation of each block
(1) Oscillator block
The oscillator in this block is a triangular wave oscillator that utilizes charge and discharge of the
integrated capacitor, and the oscillating frequency can be set optionally using the value of the resistor that
is connected to the RT terminal (Figure 1). Oscillation is repeated within the range between approx. 3 V
and 1 V, and the slope of the waves in charge and discharge are almost same (Figure 2). The oscillating
frequency can be set optionally by varying this slope using the resistor connected to the RT terminal.
(When Rt is increased, the frequency becomes lower; when Rt is decreased, the frequency becomes
higher.)
The relation between Rt and the fixed oscillating frequency is shown below.
fo  4880/(Rt+1.4) [kHz] (1)
Rt  (4880/ fo)-1.4 [kΩ] (2)
It is provided that f0 is a fixed frequency (kHz), and Rt is a timing resistance (kΩ).
Because this oscillator has no terminals, the waveform can not be observed externally.
The output from the oscillator is supplied to the PWM comparator.

Rt = Small Rt = Large

Figure 1 Figure 2

(2) PWM comparator block

The PWM comparator has four input terminals as shown in Figure 3. The CS terminal voltage (2), the FB
terminal voltage (3), and the DT voltage (4) are respectively compared with the oscillator output (1), and
the lowest voltage of these three voltages will be given the highest priority. The output of the PWM
comparator becomes high during the period over which such lowest voltage is lower than the oscillator
output, and it becomes low during the period over which such lowest voltage is higher than the oscillator
output as shown in Figure 4. During the period over which the output of the PWM comparator is low, the
OUT terminal of FA5510 becomes high.
At the time of startup, the CS terminal voltage (2) initiates the soft-start sequence and the width of the
output pulse becomes larger gradually. In normal operation, the pulse width is determined based on the
conditions of the FB terminal voltage (3) within the range of the maximum duty cycle (46%) that is
determined by the DT voltage (4), and the output voltage is stabilized.

(3) FB terminal voltage

(4) DT voltage (4) DT voltage

(3) FB terminal voltage PWM comparator
(2) CS terminal voltage output
(1) Oscillator output (1) Oscillator output
(2) CS terminal voltage

Figure 3 PWM comparator output

OUT terminal output

Figure 4
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9
(3) CS terminal circuit block
The CS terminal is connected to the capacitor Cs as shown in Figure 5. The CS terminal voltage varies
depending on the charging voltage of the capacitor Cs.
At the time of power-on, the capacitor Cs starts to be charged by the constant current source (5.2 µA),
accompanied by gradual rise of the CS terminal voltage as shown in Figure 6. The CS terminal voltage is
supplied to the PWM comparator (which has a feature to output the lowest voltage of those it receives),
and the soft-start sequence is initiated with the CS terminal voltage ranged between 1.0 V and VTHCSM
(1.92 V). In normal operation, the CS terminal voltage is clamped at 4.0 V by the internal Zener diode.
When the output voltage drops and the FB voltage rises to 3.5 V or above because of overload or other
causes, such clamping voltage of 4.0 V is canceled and the CS terminal voltage rises to 9.5 V. In addition,
the CS terminal is connected to the latching comparator C2, which will reverse causing the 5V REF circuit
to turn off and the output to be shut off when the CS terminal voltage rises to 8.5 V or over. Besides the
comparator C2, the CS terminal is connected to the comparator C1, so it is possible to turn off the 5V REF
circuit and shut off the output by lowering the CS terminal voltage to 0.68 V or less. Therefore, the
comparator C1 can be used for ON/OFF control.
In conclusion, the CS terminal can be used, depending on its voltage, for soft-start of the power source,
shut-off under over load conditions, and ON/OFF control.
(ON/OFF control is not available yet.)
CS terminal voltage Vcs [V]

Overload and
overvoltage shutoff

Overload and
Output Instantaneous
overvoltage
block overload and
overvoltage

Soft-start

Time t
OFF mode

Figure 6
Figure 5

Each of the major functions of the CS terminal is described below.

(i) Soft-start function

Figure 7 shows the soft-start circuit block, and Figure 8 shows the timing chart at the time of soft-
start. The CS terminal is connected to the capacitor Cs, which starts to be charged by the constant
current source (5.2 µA) upon power-on. Upon the start of charging, the CS terminal voltage rises
gradually as the capacitor Cs is charged as shown by the timing chart. In addition, the CS terminal
voltage is supplied to the PWM comparator (which has a feature to output the lowest voltage of those
it receives) inside FA5510, and the width of the output pulse becomes larger and the soft-start
sequence is initiated as shown by the timing chart.
The time ts, which is an approximate time required for the soft-start sequence that is from the startup
to the point of time when the width of the output pulse becomes larger by 30%, is obtained by the
following expression.
ts  310 Cs [ms] (3)
It is provided that Cs is a soft-start capacitor (µF).

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 FB terminal voltage

DT voltage

Oscillator output
CS terminal voltage
Output
block

OUT terminal voltage

Figure 7 Figure 8

(ii) Overload shutoff function

Figure 9 shows the overload shutoff circuit block, and Figure 10 shows the timing chart of each block
under overload conditions.
When the output voltage drops because of overload, short circuit, or other causes, the FB terminal
voltage will rise. When such rising voltage exceeds the reference voltage (3.5 V) of the comparator
C3, the output of the comparator C3 becomes low, causing the SW to be turned off. Concurrently, by
the function of the Zener diode, the clamping of the CS terminal voltage at 4.0 V is canceled, and the
capacitor Cs starts to be charged by the constant current source (5.2 µA) again, causing the CS
terminal voltage to rise. When the CS terminal voltage exceeds the reference voltage (8.5 V) of the
comparator C2, the output of the comparator C2 will reverse, causing the 5V REF circuit to turn off.
Then, FA5510 is turned off and put into the latch mode, causing the output to be shut off. The current
consumption of FA5510 in this process is 45 µA (typ.) (Vcc=10 V), and this current shall be supplied
via a startup resistor. At this point, the output of FA5510 is off (or low voltage).
Overload shutoff operation can be reset by dropping the power voltage Vcc to the OFF threshold
voltage (9.0 V) or less or forcibly dropping the CS terminal voltage to 7.9 V or less.
The time tOL, which is from the occurrence of short circuit of the output during operation to the point
of time when the output circuit is turned off, is obtained by the following expression.
tOL  870 Cs [ms] (4)
It is provided that Cs is a soft-start capacitor (µF).

Comparator C2
Reference voltage
(8.5V)

CS terminal voltage

DT voltage
FB terminal voltage

Oscillator output

OUT terminal output

Output
block
5VREF voltage

Overload detection
Overload shutoff

Figure 10
Figure 9

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(4) Current limiting circuit block
This circuit is a pulse-by-pulse overcurrent limiting circuit that detects the peak value of the pulsed drain
current of the main switching MOSFET and it holds the detection voltage of +0.24 V to the GND level as
shown in Figure 13.
The drain current of MOSFET is input to the IS terminal of FA5510 as a voltage signal via the resistor Rs.
When this detection voltage exceeds the reference voltage of +0.24 V of the comparator C4, the
comparator C4 will start operating and set the flip-flop output Q to high. At that moment, the output is
turned off and the current is shut off. The flip-flop output Q is reset in the next cycle and the output is
turned on again. This process is repeated to limit overcurrent.
Figure 15 shows the timing chart of each component under overcurrent conditions.

CS terminal voltage
OUT
FB terminal voltage Output
terminal
Oscillator output block

Figure 13

CS terminal voltage

DT voltage
FB terminal voltage

Oscillator output

OUT terminal output

Comparator C4
Reference voltage
FA5510/11: +0.24 V
FA5514/15: -0.17V

IS terminal voltage

5VREF voltage

Overcurrent limit Overcurrent limit

Figure 15

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(5) Vcc overvoltage protection circuit block
Vcc overvoltage protection circuit is provided as a prevention of breakdown due to overvoltage. Figure 16
shows the overvoltage protection circuit block, and Figure 17 shows the timing chart under overvoltage
conditions. Overvoltage is detected when the power voltage Vcc rises to 31.8 V or over (Icc = 14 mA)
causing a current to flow to the integrated ZD, the output of the comparator C5 becomes high, and then the
CS terminal voltage rises with the constant current source (0.95 mA). When the CS terminal voltage
exceeds 8.5 V, the output of the comparator C2 becomes high, causing the 5V REF circuit to turn off. As a
result, FA5510 is turned off and put into the latch mode, and the output of FA5510 becomes off (or low
voltage). The current consumption of FA5510 in this process is 45 µA (typ.) (Vcc=10 V), and this current
shall be supplied via a startup resistor.
Overvoltage shutoff operation can be reset by dropping the power voltage to 9.0 V or less or forcibly
dropping the CS terminal voltage to 7.9 V or less.

Comparator C2
Reference voltage
(8.5V)

CS terminal voltage

DT voltage
FB terminal voltage

Oscillator output

OUT terminal output

5VREF voltage
Output
block
Overvoltage detection
Overvoltage shutoff

Figure 17
Figure 16

(6) Under-voltage lockout circuit block (UVLO)

An under-voltage lockout circuit is provided as a prevention of erroneous operations of the circuitry in the
case where the power supply voltage drops. This circuit starts operating when the power supply voltage
rises to 16.5 V (typ.) from zero. In the case of dropping of the power supply voltage, the output is shut off
when it drops to 9.0 V (typ.). When the under-voltage lockout circuit starts operating, the OUT terminal
and the CS terminal become low and are reset.

(7) Output block

The output circuit block uses a push-pull circuit configuration and it can be connected to MOSFET
directly. The absolute maximum rating of the peak current output from the OUT terminal is ±1.5 A. In
terms of characteristics of FA5510, however, the actual peak current output depends on MOSFET to be
used, resistance between the OUT terminal and the gate terminal of MOSFET, power supply voltage, and
temperature conditions. When the power supply voltage is low or the temperature is high, the peak current
output may not reach to the absolute maximum rating of ±1.5 A.
Besides, losses may occur in the output circuit block because of the output current. The actually used
circuitry shall be arranged so that the total loss including losses caused by the operating current of FA5510
does not exceed the rating of FA5510. When the under-voltage lockout circuit stops the circuitry
operating, the output of the OUT terminal becomes low and MOSFET is shut down.

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3. Checkpoints and critical parts in circuit operation
3.1 Sequence and points to check the circuit operation
(1) Check of the power voltages of the power-factor control IC and forward control IC
Before regulation: Voltage across C909: Approx. 26 V dc (with some ripples)
(Primary GND and positive terminal of C909)
After regulation: Voltage across C920: 20 V dc
(Primary GND and positive terminal of C920 (8-pin of IC901))

(2) Check of the voltage output from the power-factor correction circuit
Voltage across C911: Approx. 400 V dc
(Primary GND and positive terminal of C911)

(3) Check of the voltage output from the forward converter circuit
Voltages between 1-pin and 3-pin and between 4-pin and 6-pin of the connector WH: 12 V dc

3.2 List of critical parts

Be sure to use the parts specified in the following list when servicing.
Object/Part Manufacturer/ Type/Model Technical data Standard Mark(s) of
No. Trademark conformity1)

Appliance Emuden Musen INL-13-1 10A, 250V EN 60320 VDE

inlet Kogyo DEMKO
/ J9A1

Primary fuse SkyGate Co., SG5013 T ４ AH, 250V EN 60127-2 SEMKO

/ F9A1 Ltd.

Mains switch Alps Electric SDDJE-3 10A, 250V EN 61058-1 SEMKO

/ S9A1 Co., Ltd.

X-resistor Matsushita ERC12UG105 1.0MΩ, 1/2W - -

/ R9A1 Electronic
Components
Co., Ltd.

- alternate - Kamaya RC1/2U105 1.0MΩ, 1/2W - -

Electric Co.,
Ltd.

Surge Matsushita ERZV10D471 470V - -

absorber Electronic CS
/ SA9A1, Components
SA9A2 Co., Ltd.

Surge Okaya RA-362MS-V7 3600V IEC 60950 With appliance

suppressor
/ RV9A1

X-capacitor Matsushita ECQUL 275V, 0.1μF IEC 60384-14 VDE

/ C9A1 Electric 2nd edition
Industrial Co., Sub class X2
Ltd.

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Object/Part Manufacturer/ Type/Model Technical data Standard Mark(s) of
No. Trademark conformity1)

X-capacitor Matsushita ECQUL 275V, 0.33μF IEC 60384-14 VDE

/ C900, C901 Electric 2nd edition
Industrial Co., Sub class X2
Ltd.

Y-capacitor Murata Mfg. KX 250V, 1000pF IEC 60384-14 SEMKO

/ C9A2, C9A3 Co., Ltd. 2nd edition
Sub class Y1

- alternate - Pan Overseas AH 250V, 1000pF IEC 60384-14 SEMKO

Electronics Co., 2nd edition
Ltd. Sub class Y1

Y-capacitor Murata Mfg. KX 250V, 470pF IEC 60384-14 SEMKO

/ C924, C905, Co., Ltd. 2nd edition
C910 Sub class Y1

- alternate - Pan Overseas AH 250V, 470pF IEC 60384-14 SEMKO

Electronics Co., 2nd edition
Ltd. Sub class Y1

Line filter Murata Mfg. PLA10AS1821 1.7A, 1.8mH - -

/ L9A1,L901 Co., Ltd. R7R2

Line filter Murata Mfg. PLY10AN1121 1.7A, 1.1mH - -

/ L902, L903 Co., Ltd. R7D2

Sub Tabuchi Electric 350P82201 - - -

transformer Co.,Ltd.
/ L904

Isolating Tabuchi Electric 350P82101 Class E IEC 60950 With appliance

transformer Co.,Ltd.
/ T901

Photo coupler Toshiba Corp. TLP421F - EN 60950 SEMKO

/ PC901,
PC902

- alternate - Sharp PC123 - EN 60950 BSI

Corporation
1
) an asterisk indicates a mark which assures the agreed level of surveillance

15