Unit 3

8086 Microprocessor
 Features

• Itis a 16-bit μp.

• 8086 has a 20 bit address bus can access up to 𝟐𝟐𝟎
memory locations (1 MB).
• It provides 16 -bit registers.
• Word size is 16 bits and double word size is 4
bytes.
• It has multiplexed address and data bus AD0- AD15
and A16 – A19.
Contd..
• 8086 is designed to operate in two modes,
Minimum and Maximum.
• It can pre-fetch up to 6 instruction bytes from
memory and queues them in order to speed up
instruction execution.
• It requires +5V power supply.
• A 40 pin package.
• Address ranges from 00000H to FFFFFH
Block Diagram : 8086
 Internal architecture of 8086
• 8086 has two blocks BIU and EU.
• The BIU handles all transactions of data and addresses on the buses for EU.
• The BIU performs all bus operations such as instruction fetching, reading and
writing operands for memory and calculating the addresses of the memory
operands.
The instruction bytes are transferred to the instruction queue.
• EU executes instructions from the instruction system byte queue.
• BIU contains Instruction queue, Segment registers, Instruction pointer,
Address adder.
• EU contains Control circuitry, Instruction decoder, ALU, Pointer and Index
register, Flag register.
 EXECUTION UNIT
• Decodes instructions fetched by the BIU
• Generate control signals,
• Executes instructions.
The main parts are:
• Control Circuitry
• Instruction decoder
• ALU
EXECUTION UNIT – General Purpose Registers
16 bits

8 bits 8 bits

AH AL
AX Accumulator

BH BL Base
BX
CH CL Count
CX

DX DH DL
Data
SP Stack Pointer
Pointer
BP Base Pointer

SI
Source Index
Index
DI Destination Index
7
EXECUTION UNIT – General Purpose Registers
Register Purpose
AX Word multiply, word divide, word I /O
AL Byte multiply, byte divide, byte I/O, decimal arithmetic

AH Byte multiply, byte divide

BX Store address information

CX String operation, loops

CL Variable shift and rotate

DX Word multiply, word divide, indirect I/O

(Used to hold I/O address during I/O instructions. If the result is more than
16-bits, the lower order 16-bits are stored in accumulator and higher order
16-bits are stored in DX register) 9
 Pointer And Index Registers
• used to keep offset addresses.
• Used in various forms of memory addressing.
• In the case of SP and BP the default reference to form a physical
address is the Stack Segment (SS- will be discussed under the BIU)
• The index registers (SI & DI) and the BX generally default to the Data
segment register (DS).
SP: Stack pointer
– Used with SS to access the stack segment
BP: Base Pointer
– Primarily used to access data on the stack
– Can be used to access data in other segments 10
SI: Source
• Index register
– is required for some string operations
– When string operations are performed, the SI register points to memory
locations in the data segment which is addressed by the DS register. Thus,
SI is associated with the DS in string operations.

DI: Destination Index register

• also required for some string operations.
– is
–When string operations are performed, the DI register points to memory
locations in the data segment which is addressed by the ES register. Thus,
DI is associated with the ES in string operations.

The SI and the DI registers may also be used to access data

stored in arrays

11
 EXECUTION UNIT – Flag Register
• A flag is a flip flop which indicates some conditions produced by
the execution of an instruction or controls certain operations of
the EU .
• In 8086 The EU contains a16 bit flag register
9of the 16 are active flags and remaining 7 are undefined.
6flags indicates some conditions- status flags
3flags –control Flags

U U U U OF DF IF TF SF ZF U AF U PF U CF

Sign Auxiliary Carry

Interrupt Trap Zero Parity
Over flow Direction

U - Unused 12
EXECUTION UNIT – Flag Register

Flag Purpose
Carry (CF) Holds the carry after addition or the borrow after subtraction.
Also indicates some error conditions, as dictated by some
programs and procedures .
Parity (PF) PF=0;odd parity, PF=1;even parity.

Auxiliary (AF) Holds the carry (half – carry) after addition or borrow after
subtraction between bit positions 3 and 4 of the result
(for example, in BCD addition or subtraction.)
Zero (ZF) Shows the result of the arithmetic or logic operation.
Z=1; result is zero. Z=0; The result is 0
Sign (SF) Holds the sign of the result after an arithmetic/logic
instruction execution. S=1; negative, S=0 positive
1
3
 Flag Purpose
A control flag.
Trap (TF) Enables the trapping through an on-chip debugging
feature.
A control flag.
Interrupt (IF) Controls the operation of the INTR (interrupt request)
I=0; INTR pin disabled. I=1; INTR pin enabled.
A control flag.
Direction (DF) It selects either the increment or decrement mode for DI
and /or SI registers during the string instructions.
Overflow occurs when signed numbers are added or
Overflow (OF) subtracted. An overflow indicates the result has exceeded
the capacity of the Machine
1
4
BUS INTERFACE UNIT (BIU)
Contains
6-byte Instruction Queue (Q)
The Segment Registers (CS, DS, ES, SS). The Instruction Pointer (IP).
The Address Summing block (Σ)
 THE QUEUE (Q)

• The BIU uses a mechanism known as an instruction stream

queue to implement a pipeline architecture.

• This queue permits pre-fetch of up to 6 bytes of instruction code.

• Whenever the queue of the BIU is not full, it has room for at least
two more bytes and at the same time the EU is not requesting it to
read or write operands from memory, the BIU is free to look ahead
in the program by pre-fetching the next sequential instruction.
 1 Physical Memory
Segmented Memory
6

00000
▪The memory in an 8086/88 based
system is organized as segmented
memory. Code segment (64KB)

▪The CPU 8086 is able to address Data segment (64KB)

1 MB
1Mbyte of memory.
Extra segment (64KB)
▪The Complete physically available
memory may be divided into a Stack segment (64KB)
number of logical segments.

FFFFF
The size of each segment is 64 KB

A segment may be located any where in the memory

Each of these segments can be used for a
specific function.

– Code segment is used for storing the instructions.

– The stack segment is used as a stack and it is
used to store the return addresses.
– The data and extra segments are used for storing
data byte.
The 4 segments are Code, Data, Extra and Stack
segments.
A Segment is a 64kbyte block of memory.

The 16 bit contents of the segment registers in the

BIU actually point to the starting location of a
particular segment.
Segments may be overlapped or non-overlapped
 Segment Registers

• In 8086/88 the processors have 4 segments registers

• Code Segment register (CS), Data Segment register (DS), Extra
Segment register (ES) and Stack Segment (SS) register.

• All are 16 bit registers.

• Each of the Segment registers store the upper 16 bit address of the
starting address of the corresponding segments.
2
0

Memory Address Generation

Offset Value (16 bits)

Segment Register (16 bits) 0000

Adder

Physical Address (20 Bits)

 •
The following examples shows the CS: IP scheme of address
formation:

CS 34BA IP 8AB4 Code segment

34BA0
Inserting a hexadecimal 0H (0000B)
with the CSR or shifting the CSR 8AB4 (offset)
four binary digits left
3D654

34BA0(CS)+
8AB4(IP)
3 D 6 5 4 (next address)
44B9F
Segment and Address register
combination

• CS:IP

• SS:SP SS:BP

• DS:BX DS:SI

• DS:DI (for other than string operations)

• ES:DI (for string operations)

 8086 operating Modes
• There are two available modes of operation for the 8086
microprocessor:

• Minimum mode
• Maximum mode
8086 operating Modes
• Minimum mode operation is obtained by connecting the mode
selection pin to Vcc (logic high), and maximum mode is selected by
grounding this pin.

• Both modes enable different control structures for the 8086

microprocessor.

When the Minimum mode operation is selected, the 8086 provides all
control signals needed to implement the memory and I/O interface.

The maximum mode is unique and designed to be used whenever a

coprocessor exists in a system.
Minimum Operating Mode
• The minimum mode is selected by applying logic 1 to the MN /
MX’ input pin.

• This is a single microprocessor configuration.

• When the Minimum mode operation is selected, the 8086

provides all control signals needed to implement the memory
and I/O interface.
Pin Diagram of 8086
Signals common to both the operating
modes:
Minimum Mode Signals
Minimum Mode Signals
• BHE: stands for Bus High Enable. It is available at pin 34 and used to
indicate the transfer of data using data bus D8-D15. This signal is low
during the first clock cycle, thereafter it is active.
• TEST: This signal is like wait state and is available at pin 23. When this
signal is high, then the processor has to wait for IDLE state, else the
execution continues.
• DEN: It stands for Data Enable and is available at pin 26. It is used to
enable Transreceiver 8286. The transreceiver is a device used to
separate data from the address/data bus.
• DT/R’: It stands for Data Transmit/Receive signal and is available at pin
27. It decides the direction of data flow through the transreceiver.
When it is high, data is transmitted out and vice-a-versa.
 Maximum Operating Mode
• The maximum mode is selected by • Maximum mode operation differs from
applying logic 0 to the MN / MX’ input minimum mode in that some of the control
pin. signals must be externally generated.

• This is a multi microprocessors • This requires the addition of an external

configuration. bus controller—the 8288 bus controller.

• Maximum mode is used only when the • There are not enough pins on the 8086 for
system contains external coprocessors bus control during maximum mode
such as the 8087 arithmetic because new pins and new features have
coprocessor. replaced some of them.
Pin Diagram of 8086 [1]
Signals common to both the operating modes
Maximum Mode Signals
Maximum Mode Signals
 ADDRESSING MODES: 8086
The different ways in which a source operand is denoted in an instruction is
known as addressing modes.

There are 8 different addressing modes in 8086 programming −

Immediate addressing mode

The addressing mode in which the data operand is a part of the instruction itself
is known as immediate addressing mode.
Example
MOV CX, 4929 H, ADD AX, 2387 H, MOV AL, FFH

Register addressing mode

It means that the register is the source of an operand for an instruction.

Example
MOV CX, AX ; copies the contents of the 16-bit AX register into the 16-bit CX
register), ADD BX, AX
Direct addressing mode

The addressing mode in which the effective address of the memory location is
written directly in the instruction.

Example
MOV AX, [1592H], MOV AL, [0300H]

Register indirect addressing mode

This addressing mode allows data to be addressed at any memory location

through an offset address held in any of the following registers: BP, BX, DI &
SI.
Example
MOV AX, [BX] ;
Suppose the register BX contains 4895H, then the contents ; 4895H are
moved to AX
ADD CX, {BX}
Based addressing mode

In this addressing mode, the offset address of the operand is given by the sum
of contents of the BX/BP registers and 8-bit/16-bit displacement.

Example
MOV DX, [BX+04], ADD CL, [BX+08]

Indexed addressing mode

In this addressing mode, the operands offset address is found by adding the
contents of SI or DI register and 8-bit/16-bit displacements.

Example
MOV BX, [SI+16], ADD AL, [DI+16]
Based-index addressing mode

In this addressing mode, the offset address of the operand is computed by

summing the base register to the contents of an Index register.

Example
ADD CX, [AX+SI]
MOV AX, [AX+DI]

Based indexed with displacement mode

In this addressing mode, the operands offset is computed by adding the base
register contents. An Index registers contents and 8 or 16-bit displacement.

Example
MOV AX, [BX+DI+08]
ADD CX, [BX+SI+16]
The 8086 microprocessor supports 8 types of instructions −
• Data Transfer Instructions
• Arithmetic Instructions
• Bit Manipulation Instructions
• String Instructions
• Program Execution Transfer Instructions (Branch & Loop Instructions)
• Processor Control Instructions
• Iteration Control Instructions
• Interrupt Instructions
 8086 Instruction Format
• 8086 Instruction Format vary from 1 to 6 bytes in length.
• Fig. 6.8 shows the instruction formats for 1 to 6 bytes instructions.
• Displacements and operands may be either 8-bits or 16-bits long
depending on the instruction.
• The opcode and the addressing mode is specified using first two
bytes of an instruction.
The opcode/addressing mode byte(s) may be followed by :
• No additional byte
• Two byte EA (For direct addressing only).
• One or two byte displacement
• One or two byte immediate operand
• One or two byte displacement followed by a one or two byte
immediate operand
• Two byte displacement and a two byte segment address (for direct
intersegment addressing only).
 8086 INSTRUCTION SET DATA TRANSFER INSTRUCTIONS
• MOV MOV Destination, Source
• MOV CX, 037AH Put immediate number 037AH to CX
• MOV BL, [437AH] Copy byte in DS at offset 437AH to BL
• MOV AX, BX Copy content of register BX to AX
• MOV DL, [BX] Copy byte from memory at [BX] to DL
• MOV DS, BX Copy word from BX to DS register
• MOV RESULT [BP], AX Copy AX to two memory locations; AL to the first
location, AH to the second; EA of the first memory
location is sum of the displacement represented by
RESULTS and content of BP.
Physical address = EA + SS
• MOV ES: RESULTS [BP], AX Same as the above instruction, but physical address
= EA + ES, because of the segment override prefix ES
 Instruction to transfer a word
• MOV − Used to copy the byte or word from the provided source to the
provided destination.
• PUSH − Used to put a word at the top of the stack.
• POP − Used to get a word from the top of the stack to the provided
location.
• PUSHA − Used to put all the registers into the stack.
• POPA − Used to get words from the stack to all registers.
• XCHG − Used to exchange the data from two locations.
• XLAT − Used to translate a byte in AL using a table in the memory.
 Instructions for input and output port transfer

• IN − Used to read a byte or word from the provided port to the

accumulator.
• OUT − Used to send out a byte or word from the accumulator to the
provided port.
 Instructions to transfer the address
• LEA − Used to load the address of operand into the provided register.
• LDS − Used to load DS register and other provided register from the
memory
• LES − Used to load ES register and other provided register from the
memory.
 Instructions to transfer flag registers
• LAHF − Used to load AH with the low byte of the flag register.
• SAHF − Used to store AH register to low byte of the flag register.
• PUSHF − Used to copy the flag register at the top of the stack.
• POPF − Used to copy a word at the top of the stack to the flag register.
 Arithmetic Instructions
These instructions are used to perform arithmetic operations like addition,
subtraction, multiplication, division, etc.
Instructions to perform addition
• ADD − Used to add the provided byte to byte/word to word.
• ADC − Used to add with carry.
• INC − Used to increment the provided byte/word by 1.
• AAA − Used to adjust ASCII after addition.
• DAA − Used to adjust the decimal after the addition/subtraction operation.
Instructions to perform subtraction
• SUB − Used to subtract the byte from byte/word from word.
• SBB − Used to perform subtraction with borrow.
• DEC − Used to decrement the provided byte/word by 1.
• CMP − Used to compare 2 provided byte/word.
• AAS − Used to adjust ASCII codes after subtraction.
• DAS − Used to adjust decimal after subtraction.
Instruction to perform multiplication
• MUL − Used to multiply unsigned byte by byte/word by word.
• IMUL − Used to multiply signed byte by byte/word by word.
• AAM − Used to adjust ASCII codes after multiplication.
Instructions to perform division
• DIV − Used to divide the unsigned word by byte or unsigned double word by
word.
• IDIV − Used to divide the signed word by byte or signed double word by word.
• AAD − Used to adjust ASCII codes after division.
• CBW − Used to fill the upper byte of the word with the copies of sign bit of
the lower byte.
• CWD − Used to fill the upper word of the double word with the sign bit of the
lower word.
 Bit Manipulation Instructions
• These instructions are used to perform operations where data bits are
involved, i.e. operations like logical, shift, etc. Instructions to perform logical
operation
• NOT − Used to invert each bit of a byte or word.
• AND − Used for adding each bit in a byte/word with the corresponding bit in
another byte/word.
• OR − Used to multiply each bit in a byte/word with the corresponding bit in
another byte/word.
• XOR − Used to perform Exclusive-OR operation over each bit in a byte/word
with the corresponding bit in another byte/word.
• TEST − Used to add operands to update flags, without affecting operands.
Instructions to perform shift operations
• SHL/SAL − Used to shift bits of a byte/word towards left and put
zero(S) in LSBs.
• SHR − Used to shift bits of a byte/word towards the right and put
zero(S) in MSBs.
• SAR − Used to shift bits of a byte/word towards the right and copy
the old MSB into the new MSB.
Instructions to perform rotate operations
• ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to
LSB and to Carry Flag [CF].
• ROR − Used to rotate bits of byte/word towards the right, i.e. LSB to
MSB and to Carry Flag [CF].
• RCR − Used to rotate bits of byte/word towards the right, i.e. LSB to
CF and CF to MSB.
• RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to
CF and CF to LSB.
 String Instructions
• String is a group of bytes/words and their memory is always allocated in a
sequential order.
• REP − Used to repeat the given instruction till CX ≠ 0.
• REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag
ZF = 1.
• MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to
another.
• COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
• INS/INSB/INSW − Used as an input string/byte/word from the I/O port to
the provided memory location.
• OUTS/OUTSB/OUTSW − Used as an output string/byte/word from
the provided memory location to the I/O port.
• SCAS/SCASB/SCASW − Used to scan a string and compare its byte
with a byte in AL or string word with a word in AX.
• LODS/LODSB/LODSW − Used to store the string byte into AL or string
word into AX.
 Program Execution Transfer Instructions (Branch and Loop Instructions)

• These instructions are used to transfer/branch the instructions during

an execution. Instructions to transfer the instruction during an execution
without any condition −
• CALL − Used to call a procedure and save their return address to the
stack.
• RET − Used to return from the procedure to the main program.
• JMP − Used to jump to the provided address to proceed to the next
instruction.
Instructions to transfer the instruction during an execution with some conditions

• JA/JNBE − Used to jump if above/not below/equal instruction satisfies.

• JAE/JNB − Used to jump if above/not below instruction satisfies.
• JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
• JC − Used to jump if carry flag CF = 1
• JE/JZ − Used to jump if equal/zero flag ZF = 1
• JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
• JGE/JNL − Used to jump if greater than/equal/not less than instruction
• JL/JNGE − Used to jump if less than/not greater than/equal instruction
Contd..
• JLE/JNG − Used to jump if less than/equal/if not greater than
instruction
• JNC − Used to jump if no carry flag (CF = 0)
• JNE/JNZ − Used to jump if not equal/zero flag ZF = 0
• JNO − Used to jump if no overflow flag OF = 0
• JNP/JPO − Used to jump if not parity/parity odd PF = 0
• JNS − Used to jump if not sign SF = 0
• JO − Used to jump if overflow flag OF = 1
• JP/JPE − Used to jump if parity/parity even PF = 1
• JS−Used to jump if sign flag SF=1
 Processor Control Instructions
• These instructions are used to control the processor action by
setting/resetting the flag values.
• STC − Used to set carry flag CF to 1
• CLC − Used to clear/reset carry flag CF to 0
• CMC − Used to put complement at the state of carry flag CF.
• STD − Used to set the direction flag DF to 1
• CLD − Used to clear/reset the direction flag DF to 0
• STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
• CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
 Iteration Control Instructions
• These instructions are used to execute the given instructions for
number of times.
• LOOP − Used to loop a group of instructions until the condition
satisfies, i.e., CX = 0
• LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF
= 1 & CX = 0
• LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies
ZF = 0 & CX = 0
• JCXZ − Used to jump to the provided address if CX = 0
Interrupt Instructions
• These instructions are used to call the interrupt during program
execution.
• INT − Used to interrupt the program during execution and calling service
specified.
• INTO − Used to interrupt the program during execution if OF = 1
• IRET − Used to return from interrupt service to the main program
 8086 Interrupt
In 8086 microprocessor following tasks are performed when microprocessor
encounters an interrupt:
• The value of flag register is pushed into the stack.
• The value of starting memory address of CS (Code Segment) is pushed into
the stack.
• The value of IP (Instruction Pointer) is pushed into the stack.
• Interrupt and Trap flag are reset to 0.
The different types of interrupts present in 8086 microprocessor are given by:
• Hardware Interrupts –
Hardware interrupts are those interrupts which are caused by any peripheral
device by sending a signal through a specified pin to the microprocessor. There
are two hardware interrupts in 8086 microprocessor. They are:
• (A) NMI (Non Maskable Interrupt) – It is a single pin non maskable hardware
interrupt which cannot be disabled. It is the highest priority interrupt in 8086
microprocessor. After its execution, this interrupt generates a TYPE 2
interrupt. IP is loaded from word location 00008 H and CS is loaded from the
word location 0000A H.
• (B) INTR (Interrupt Request) – It provides a single interrupt request and is
activated by I/O port. This interrupt can be masked or delayed. It is a level
triggered interrupt. It can receive any interrupt type, so the value of IP and
CS will change on the interrupt type received.
Software Interrupts –
• These are instructions that are inserted within the program to generate
interrupts.
• There are 256 software interrupts in 8086 microprocessor.
• The instructions are of the format INT type where type ranges from 00 to
FF.
Some important software interrupts are:
(A) TYPE 0 corresponds to division by zero(0).
(B) TYPE 1 is used for single step execution for debugging of program.
(C) TYPE 2 represents NMI and is used in power failure conditions.
(D) TYPE 3 represents a break-point interrupt.
(E) TYPE 4 is the overflow interrupt.
 HOW to execute the interrupts

• The 8086 gets the new values of CS and IP register from four memory
addresses.
• When it responds to an interrupt, the 8086 goes to memory locations to get the
CS and IP values for the start of the interrupt service routine.
• In an Interrupt Structure of 8086 system the first 1 Kbyte of memory from
00000H to 003FFH is reserved for storing the starting addresses of
interrupt service routines.
• This block of memory is often called the Interrupt Vector Table in 8086 or
the interrupt pointer table.
• Since 4 bytes are required to store the CS and IP values for each interrupt
service procedure, the table can hold the starting addresses for 256 interrupt
service routines.
Interrupt Vector Table in 8086