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Theory of Computation Computer Networks Object Oriented Software
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and Machine Learning Embedded Systems IoT
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Algorithms Distributed Computing
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Introduction to Operating Professional Elective I Professional Elective V

Systems
Professional Elective II Professional Elective VI
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7th Semester 8th Semester

Human Values and Ethics Project Work/Internship

Elective-Management

Professional Elective II

Professional Elective III

Professional Elective IV
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DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

BE- Computer Science and Engineering

Anna University Regulation: 2021

CS3351- DPCO

II Year/III Semester

Question Bank

Prepared By,

Dr. K. M. Alaaudeen, HOD/CSE

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GRACE COLLEGE OF ENGINEERING

B.E- COMPUTER SCIENCE AND ENGINEERING
CS3351-DIGITAL PRINCIPLES AND COMPUTER ORGANIZATION
UNIT II
2 marks

1. What is sequential circuit?

In sequential circuits the output variables dependent not only on the present input
variables but they also depend up on the past history of these input variables.

2. List the classifications of sequential circuit.

i) Synchronous sequential circuit.
ii) Asynchronous sequential circuit.

3.What is Synchronous sequential

circuit?
A Synchronous sequential circuit is a system whose behavior can be defined
from the knowledge of its signal at discrete instants of time.
4.What is a clocked sequential circuit?
Synchronous sequential circuit that use clock pulses in the inputs of memory
elements are called clocked sequential circuit. One advantage as that they don’t
cause instability problems.
5. What is called latch?
Latch is a simple memory element, which consists of a pair of logic gates
with their inputs and outputs inter connected in a feedback arrangement, which
permits a single bit to be stored.
6. List different types of flip-flops.
i RS flip-flop
ii D flip-flop
iii T flip-flop
iv JKflip-flop

7. What do you mean by triggering of flip-flop?

The state of a flip-flop is switched by a momentary change in the input
signal. This momentary change is called a trigger and the transition it causes is said
to trigger the flip-flop.

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8. What is an excitation table?

During the design process we usually know the transition from present state
to next state and wish to find the flip-flop input conditions that will cause the
required transition. A table which lists the required inputs for a given chance of
state is called an excitation table.

9. Give the excitation table of SR-flip flop?

Present state Next state Flip-flop Inputs
Qn Qn+1 R S
0 0 X 0
0 1 0 1
1 0 1 0
1 1 0 X

10. Define race around condition.

In JK flip-flop output is fed back to the input. Therefore change in the output
results change in the input. Due to this in the positive half of the clock pulse if
both J and K are high then output toggles continuously. This condition is called
‘race around condition’.

11. What is counter?

A counter is used to count pulse and give the output in binary form.

12. What is synchronous counter?

In a synchronous counter, the clock pulse is applied simultaneously to all flip-

flops. The output of the flip-flops change state at the same instant. The speed of
operation is high compared to an asynchronous counter

13. What is Asynchronous counter?

In an Asynchronous counter, the clock pulse is applied to the first flip-flops. The
change of state in the output of this flip-flop serves as a clock pulse to the next flip-
flop and so on. Here all the flip-flops do not change state at the same instant and
hence speed is less.

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14. What is the difference between synchronous and asynchronous

counter?

Synchronous counter:

Clock pulse is applied simultaneously Clock pulse is applied to the first flip-flop,
the change of output is given as clock to next flip-flop

Asynchronous counter:

Speed of operation is high Speed of operation is low.

15. Name the different types of counter.

a) Synchronous counter

b) Asynchronous counter

i) Up counter ii) Down counter iii) Modulo – N counter iv) Up/Down counter

16. What is Johnson counter?

It is a ring counter in which the inverted output is fed into the input. It is also
known as a twisted ring counter.

17. Define Flip flop.

The basic unit for storage is flip flop. A flip-flop maintains its output state either
at1 or 0 until directed by an input signal to change its state.

18. What is Shift Register?

A register capable of shifting its binary data in one or both directions is known as a
shift register. The logical design of a shift register includes a series of flip-flops,
with the output of one flip-flop linked to the input of the next flip-flop.

Types of Shift Register:

SISO (Serial Input Serial Output)

SIPO (Serial Input Parallel Output)

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PISO( Parallel Input Serial Output)

PIPO (Parallel Input Parallel Output)

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Part B

1. Draw the logic circuits and the excitation tables for the T, JK, RS flip-flops.
2. Design a MOD-10/5 Synchronous counter using JK flip- flops. Write
execution table and state table.
3. i)What is race around condition in J-Kflip flop? How it is eliminated?
ii)Why gated D latch is called transparent latch? Explain with the logic
diagram.
4. Explain what is universal shift register? Explain its working.
5. Implement T flipflop using D flipflop and JK flipflop using D flipflop.
6. i) A sequential circuit with two D flip-flops A and B, one input x and one output z
is specified by the following next-state and output equations: A(t+1)= A′+B,
B(t+1)=B′x, z=A+B′ (1) Draw the logic diagram of the circuit (2) Draw the state
table (3) Draw the state diagram of the circuit ii) Explain the difference between a
state table, characteristics table and excitation table.
7. Design three bit synchronous counter with T flip flop and draw the diagram.
8. Convert SR flip-flop to T flip-flop
9. Convert JK Flip Flop into D & T Flip Flop
10. Design a synchronous counter that counts the sequence
000,001,010,011,100,101,110,111,000 using D flipflop.
11. Design a binary counter using T flip flops to count in the following
sequences: (i) 000, 001, 010, 011, 100, 101, 111, 000 (ii) 000, 100, 111,
010, 011, 000
12. Design a sequential circuit using RS flip flop for the state table with minimum flip
flop.

Prese
nt Next Outpu
State State t
x=0 x=1 x=0 x=
1
A A B 0 0
B C D 0 0
C A D 0 0
D E F 0 1
E A F 0 1
F G F 0 1
G A F 0 1

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 Digital Principles and Computer Organization

Unit I: Combinational Logic

Combinational Circuits | Karnaugh Map Minimization | Simplification of SOP
Expression | Simplification of POS Expression | Five - Variable K-Map | Summary of Rules for
K-Map Simplification | Limitations of Karnaugh Map | NAND-NAND Implementation | NOR-NOR
Implementation | Analysis Procedure | Design Procedure | Binary Adder Subtractor | Code
Conversion | Magnitude Comparator | Decoders | Encoders | Multiplexers | Demultiplexers | Two
marks Questions with Answers |

Unit II (a): Synchronous Sequential Logic

Introduction to Sequential Circuits | One-Bit Memory Cell | Latches | Flip-Flops | Various
Representation of Flip-Flops | Realization of One Flip-Flop using Other Flip-Flop | Applications
of Flip-Flops | Two marks Questions with Answers | Threading Issues |
Unit II (b): Analysis & Design of Clocked Sequential Circuits
Introduction of Analysis & Design of Clocked Sequential Circuits | Clocked Sequential
Circuits | Analysis of Clocked Sequential Circuits | Design of Clocked Sequential Circuits | Two
marks Questions with Answers |
Unit II (c): Registers
Introduction of Registers | Shift Registers | Types of Shift Registers | Universal Shift
Register | Applications of Shift Registers | Ring Counters | Johnson or Twisting Ring or Switch
Tail Counter | Two marks Questions with Answers |
Unit II (d): Counters
Introduction of Counters | Ripple/Asynchronous Counters | Design of Ripple (Synchronous)
Counters | Synchronous Counters | Design of Synchronous Counters | Two marks Questions
with Answers |

Unit III: Computer Fundamentals

Functional Units of Digital Computer | Von Neumann Architecture | Operation of the Computer
Hardware | Operands of the Computer Hardware | Instructions | Instruction Set Architecture
(ISA) | Memory Locations and Addresses | Memory Operations | Instruction and Instruction
Sequencing | Addressing Modes | Encoding of Machine Instructions | Interaction Between
Assembly and Higher Level Language | Two marks Questions with Answers |

Unit IV: Processor

Instruction Execution | Basic MIPS Implementation | Building a Data Path | Designing a Control
Unit | Hardwired Control | Microprogrammed Control | Comparison Between Hardwired and
Microprogrammed Control Units | Pipelining | Pipelined Datapath and Control | Handling Data
Hazards | Handling Control Hazards | Two marks Questions with Answers |

Unit V: Memory and I/O

Memory Concept | Memory Hierarchy | Memory Technologies | Cache Memories | Virtual
Memory | Accessing I/O | Programmed I/O | Interrupt I/O | Parallel and Serial Interface | Direct
Memory Access (DMA) | Interconnection Standards | Two marks Questions with Answers |
 Civil
CSE
Home Mech
e
EEE
ECE

2nd Semester 3rd Semester

1st Semester
Professional English II Discrete Mathematics
Professional English I
Statistics and Numerical
Methods Digital Principles and
Matrices and Calculus
Computer Organization
Engineering Graphics
Engineering Physics
Foundation of Data
Physics for Information
Science Science
Engineering Chemistry

Physics
Basic for Engineering
Electrical and Data Structure
Problem Solving and Science Engineering
Electronics
Python Programming Object Oriented
Programming in C
Programming

4th Semester 5th Semester 6th Semester

Theory of Computation Computer Networks Object Oriented Software
Engineering
Artificial Intelligence Compiler Design
and Machine Learning Embedded Systems IoT
Cryptography and
Database Management Cyber Security Open Elective I
System
Professional Elective III
Algorithms Distributed Computing
Professional Elective IV

Introduction to Operating Professional Elective I Professional Elective V

Systems
Professional Elective II Professional Elective VI
Environmental Sciences
and sustainability Mandatory Course I Mandatory Course II

7th Semester 8th Semester

Human Values and Ethics Project Work/Internship

Elective-Management

Professional Elective II

Professional Elective III

Professional Elective IV