NAME:RAVAL OM PRAGNESHBHAI

ENROLLMENT NUMBER:220280152057
TOPIC:DIGITAL FUNDAMENTALS

-EXPERIMENT 1
-THEORY:
Logic gates are fundamental building blocks of
digital circuits and are based on Boolean algebra.
Here's a brief overview of some common logic
gates:

1. AND Gate
- Description: Output is true only when all inputs
are true.
- Boolean Expression:Y=A.B
- Truth Table:

|A|B|Y |
|---|---|------|
|0|0| 0 |
|0|1| 0 |
|1|0| 0 |
|1|1| 1 |

2. OR Gate :
- Description:Output is true if at least one input
is true.
- Boolean Expression:Y = A + B
- Truth Table:

|A|B| Y |
|---|---|------|
|0|0| 0 |
|0|1| 1 |
|1|0| 1 |
|1|1| 1 |

3. NOT Gate:
- Description: Output is the inverse of the input.
- Boolean Expression: Y = A'
- Truth Table:

|A| Y |
|---|----|
|0| 1 |
|1| 0 |
4. NAND Gate:
- Description:Functions as an AND gate followed
by a NOT gate.
- Boolean Expression:Y=(A.B)'
- Truth Table:

|A|B| Y |
|---|---|---- |
|0|0| 1 |
|0|1| 1 |
|1|0| 1 |
|1|1| 0 |

5. NOR Gate:
- Description:Functions as an OR gate followed by
a NOT gate.
- Boolean Expression:Y=(A+B)'
- Truth Table:

|A|B|Y |
|---|--|-----|
|0|0| 1 |
|0|1| 0 |
|1|0| 0 |
|1|1| 0 |

6. XOR Gate:
- Description: Outputs true if inputs are different.
- Boolean Expression: Y = A'B+AB'
- Truth Table:

|A|B|Y |
|---|---|----|
|0|0| 0 |
|0|1| 1 |
|1|0| 1 |
|1|1| 0 |

7. XNOR Gate:
-Description: Outputs true if both inputs are equal.
- Boolean Expression:Y+AB+A'B'
- Truth Table:

|A|B|Y |
|---|---| ----|
|0|0| 1 |
|0|1| 0 |
|1|0| 0 |
|1|1| 1 |

IMPLEMENTATION:
--THEORY:
1)Sum of Products (SOP):

Definition:
-SOP is a way of representing Boolean functions by
expressing them as the logical OR (sum) of product
terms.
-Each product term is a logical AND of one or more
literals (variables or their complements).

-The general form of a SOP expression is given by:

F(A,B,C,…)=∑(m1,m2,m3..............)
-Here m1,m2,m3.....are product terms, and ∑
denotes logical OR.

Example:
-Consider a 2-input AND gate with inputs A and B.
The SOP expression for the AND gate is
F(A,B)=A⋅B.

Truth Table to SOP:

-To obtain the SOP expression for a Boolean
function, one can examine the rows in the truth
table where the output is 1 and form product terms.

2) Product of sum(POS):
Definition:
-POS is another way of representing Boolean
functions by expressing them as the logical AND
(product) of sum terms.
-Each sum term is a logical OR of one or more
literals (variables or their complements).
-The general form of a POS expression is given by:

F(A,B,C,…)=∏(M1,M2,M3...........)
-Here, M1,M2,M3.... are sum terms and ∏ denotes
logical AND.

-IMPLEMENTATION:
HERE IS HANDWRITTEN SOLUTION:
-IMPLEMENTATION IN LOGISIM
-THEORY
Karnaugh Map (K-Map) is a graphical method used
for simplifying Boolean functions and minimizing
the number of logic gates in a digital circuit. The
method is particularly effective for functions with a
small number of variables. Here's a step-by-step
explanation of how to solve a Boolean function
using the K-Map method:

1. Understand the Boolean Function:

Begin with the Boolean function you want to
simplify. The function should be in its canonical
form or written as a sum-of-products (SOP)
expression.
2. Identify Variables and Create the Karnaugh Map:
Identify the variables in your Boolean function and
create a K-Map with appropriate rows and columns
based on the number of variables.
For n variables, the K-Map will have 2 ^n cells.
3. Fill in the K-Map:
Use the truth table of the Boolean function to fill in
the values for each cell in the K-Map.
The cells in the K-Map represent all possible
combinations of input values.
4. Group Ones:
Identify groups (rectangles) of adjacent "1" cells in
the K-Map. The groups can be any size, and they
must be powers of 2 (1, 2, 4, 8, etc.).
5. Formulate Implicants:
For each group, formulate an implicant (product
term) that covers all the cells in the group. This
implicant represents a term in the simplified
Boolean function.
6. Find Essential Prime Implicants:
Identify the essential prime implicants, which are
implicants that cover a "1" cell that is not covered
by any other implicant.
7. Formulate Simplified Expression:
Combine the essential prime implicants to form the
simplified Boolean expression.
If there are still uncovered cells, select additional
non-essential prime implicants to cover them.
8. Check for Optimization:
Review the simplified expression to see if further
optimization is possible by combining terms.

-HANDWRITTEN SOLUTION

-IMPLEMENTATION IN LOGISIM:
-THEORY:
Certainly!The Quine-McCluskey method is a systematic and iterative
approach for simplifying Boolean functions. It is used to minimize the
number of terms in a Boolean expression, leading to a more efficient
representation of digital circuits. The method is especially effective for
functions with a larger number of variables. Here's a step-by-step
description of the Quine-McCluskey method:

1. Create a Truth Table:

List all possible combinations of inputs and calculate the corresponding
output values based on the given Boolean function.
2. Identify Prime Implicants:
Group adjacent "1" cells in the truth table. Each group represents a
potential prime implicant.
A prime implicant is a product term that covers at least one "1" cell and
cannot be combined with other terms to cover the same cells.
3. Formulate Essential Prime Implicants:
Choose prime implicants that cover all "1" cells in the truth table.
Identify the minimum set of prime implicants necessary to cover all "1"
cells.
These are the essential prime implicants.
4. Generate the Prime Implicant Chart:
List the prime implicants and the corresponding "1" cells they cover.
Create a chart with rows representing prime implicants and columns
representing "1" cells.
5. Determine Essential Prime Implicant Rows:
Identify rows in the chart that have only one prime implicant covering a
particular "1" cell. These are essential prime implicant rows.
6. Formulate Simplified Expression:
Use the essential prime implicants to form a sum-of-products (SOP)
expression.
Include any remaining terms that are necessary to cover any uncovered
"1" cells.
7. Optimize if Possible:
Look for opportunities to simplify the expression further by combining
terms.
Use Boolean algebra rules to perform additional simplifications.

-HANDWRITTEN SOLUTION:
-CIRCUIT IMPLEMENTED IN LOGISIM
-THEORY:
BCD Code (Binary-Coded Decimal):

BCD Code (Binary-Coded Decimal):

BCD is a binary representation of decimal digits in which each decimal

digit is represented by a fixed number of binary bits (usually four bits).

Decimal BCD
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

Excess-3 Code:

Excess-3 code is a binary-coded decimal (BCD) code in which each

decimal digit is represented by its corresponding 4-bit binary code plus
3 (excess-3). It is also known as XS-3 or Gray code 8421.

Decimal Excess-3
0 0011
1 0100
2 0101
3 0110
4 0111
5 1000
6 1001
7 1010
8 1011
9 1100

BCD TO EXCESS CONVERTER:

-A BCD to excess-3 code converter is a digital circuit that takes a Binary-Coded
Decimal (BCD) input and produces the corresponding Excess-3 output. The
conversion involves adding 0011 (3 in binary) to each 4-bit BCD group.
-Below is the truth table for the same:

->IMPLEMENTATION IN LOGISIM:
->THEORY:
BCD Code (Binary-Coded Decimal):

BCD Code (Binary-Coded Decimal):

-BCD is a binary representation of decimal digits in which each decimal
digit is represented by a fixed number of binary bits (usually four bits).

Decimal BCD
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
Gray Code:
-Gray code, also known as reflected binary code or unit distance code, is
a binary numeral system where two successive values differ in only one
bit. The advantage of Gray code is that it minimizes errors in binary
systems, as only one bit changes at a time during the transition from
one value to the next.
-Consecutive Numbers Differ by One Bit:
In Gray code, as you move from one number to the next, only one bit
changes. This property reduces the likelihood of errors during
transitions.

Applications:
Gray code is commonly used in rotary encoders, where it helps in
reducing errors when the encoder changes its position.

Example:
Let's take a 3-bit Gray code sequence:
Decimal Binary Gray Code
0 000 000
1 001 001
2 010 011
3 011 010
4 100 110
5 101 111
6 110 101
7 111 100
BCD to Gray Code Converter:
A BCD to Gray code converter is a combinational circuit that takes a
Binary Coded Decimal (BCD) input and produces the corresponding Gray
code output. BCD is a binary representation of decimal digits, where
each decimal digit is represented by a 4-bit binary code.

Truth Table:
Let's consider a 4-bit BCD to Gray code converter. The input has four bits
(A, B, C, D), and the output has four bits (G0, G1, G2, G3) representing
the Gray code.
A B C D G0 G1 G2 G3
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 0
0 1 0 1 0 1 1 1
0 1 1 0 0 1 0 1
0 1 1 1 0 1 0 0
1 0 0 0 1 1 0 0
1 0 0 1 1 1 0 1
1 0 1 0 1 1 1 1
1 0 1 1 1 1 1 0
1 1 0 0 1 0 1 1
1 1 0 1 1 0 1 0
1 1 1 0 1 0 0 1

Circuit:
The circuit for a 4-bit BCD to Gray code converter is built using XOR
gates. Each output bit (G0, G1, G2, G3) is generated by XORing specific
BCD input bits.
For example:

G0 = A
G1 = A XOR B
G2 = B XOR C
G3 = C XOR D
This way, the XOR gates create the Gray code outputs based on the BCD
input.

Remember that the circuit design might vary based on specific

requirements and implementations. The given truth table and circuit
examples are for educational purposes and may need adjustments based
on the actual implementation.

->IMPLEMENTATION:
->Theory:

-HALF ADDER
=>A half adder is a fundamental digital circuit used in computer
systems to add two binary digits.

=>It has two inputs, A and B, representing the binary digits to

be added.

=>The half adder produces two outputs: the sum (S) and the
carry (C).

=>The sum (S) is the result of the addition modulo 2, also

known as the XOR operation.

=>The carry (C) indicates whether there is a carry out of the

addition, which is determined using the AND operation.

=>Let's explore the truth table for a half adder to understand its behavior

A B sum carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
It is observed that:

The Sum (S) output is 1 when there is an odd number of

1s among the inputs (A and B)

The Carry (C) output is 1 only when both A and B are 1,

indicating a carry out of the addition.

-Implementation of half adder:

-FULL ADDER

=>A full adder is a more complex digital circuit used in computer

systems to add three binary digits.

=>It has three inputs: A, B, and Cin (Carry-in), representing the

binary digits to be added along with a carry input from a previous
stage.

=>The full adder produces two outputs: the sum (S) and the carry out
(Cout).

=>The sum (S) is the result of adding the three inputs, which is
determined using XOR and AND operations.

=>The carry out (Cout) indicates whether there is a carry generated

from the addition, which is also determined using XOR and AND
operations.

=>Let's explore the truth table for a full adder to understand its
behavior.
A B Cin SUM Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

->IMPLEMENTATION
->THEORY:
-HALF SUBTRACTOR
=>A half subtractor is a digital circuit used in digital electronics to subtract two
single-bit binary numbers. It's one ofthe fundamental building blocks in digital
circuit design, particularly in the construction of more complex
subtraction and arithmetic units. The half subtractor performs the subtraction of
two binary digits, taking into account the borrow generated during the
subtraction.

=>Here are the key components of a half subtractor:

=>Two Inputs (A and B): These inputs represent the two binary numbers that
need to be subtracted. A is the
minuend (the number from which subtraction is done), and B is the subtrahend
(the number to be subtracted).

=>Two Outputs (Difference and Borrow):

Difference (D): This output represents the result of subtracting B from A. It is the
binary difference between A and B.
=>Borrow (B_out): This output indicates whether there is a borrow generated
during the subtraction. If A is smaller than B, a borrow is generated, and B_out is
set to 1; otherwise, it's 0.

HERE IS THE TRUTH TABLE OF HALF SUBTRACTOR:

A B DIFF B_out
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

Observation:
B_out is the resut of and operation between A’ anB
Diff is result of XOR operation between A and B

IMPLEMENTATION

-FULL SUBTRACTOR:
=>A Full Subtractor is a digital circuit used in digital electronics and digital
arithmetic to subtract three single-bit binary numbers: the minuend (A), the
subtrahend (B), and a borrow-in (B_in).
=>It is more complex than a Half Subtractor, which only subtracts two numbers
and computes a borrow. The Full Subtractor, on the other hand, can perform
complete binary subtraction, considering both the inputs and any borrow from a
previous subtraction.

=>Here are the key components and characteristics of a Full Subtractor:

=>Inputs:

A (Minuend): The number from which subtraction is performed.

B (Subtrahend): The number to be subtracted.
B_in (Borrow-in): A borrow input from a previous subtraction operation or from
another part of a larger digital circuit

=>Outputs:

Difference (D): This output represents the result of subtracting B from A, including
any borrow from B_in.
Borrow-out (B_out): Indicates whether there is a borrow generated during the
subtraction. If A is smaller
than (or equal to) B, or if B_in is 1, a borrow is generated, and B_out is set to 1;
otherwise, it's 0.

-Here is truth table for the full subtractor

A B Bin DIFF Bout
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

-OBSERVATION:
DIFF is the result of XOR operation between A XOR B and Bin
Bout=A’B’Bin+A’BBin’+A’BBin+ABBin

-IMPLEMENTATION:
->THEORY:

Multiplier
A binary multiplier is a combinational logic circuit used in
digital systems to perform the multiplication of two binary
numbers. These are most commonly used in various
applications especially in the field of digital signal processing
to perform the various algorithms.

Commercial applications like computers, mobiles, high speed

calculators and some general purpose processors require
binary multipliers.

Compared with addition and subtraction, multiplication is a

complex process. In multiplication process, the number which
is to be multiplied by the other number is called as
multiplicand and the number multiplied is called as multiplier.
Similar to the multiplication of decimal numbers, binary
multiplication follows the same process for producing a product
result of the two binary numbers. The binary multiplication is
much easier as it contains only 0s and 1s. The four
fundamental rules for binary multiplication are

0 × 0 = 0
0 × 1 = 0
1 × 0 = 0
1 × 1 = 1

The multiplication of two binary numbers can be performed by

using two common methods, namely partial product addition
and shifting, and using parallel multipliers.

Before discussing about the types, let us look at the unsigned

binary numbers multiplication process. Consider a two 4 bit
binary numbers as 1010 and 1011, and its multiplication of
these two is given as

From the above multiplication, partial products are generated

for each digit in the multiplier. Then all these partial products
are added to produce the final product value. In the partial
product multiplication, when the multiplier bit zero, the partial
product is zero, and when the multiplier bit is 1, the resulted
partial product is the multiplicand.

As similar to the decimal numbers, each successive partial

product is shifted one position left relative to the preceding
partial product before summing all partial products.
Therefore, this multiplication uses n-shifts and adds to multiply
n-bit binary number. The combinational circuit implemented to
perform such multiplication is called as an array multiplier or
combinational multiplier.

Let us consider two unsigned 2 bit binary numbers A and B to

generalize the multiplication process. The multiplicand A is
equal to A1A0 and the multiplier B is equal to B1B0. The figure
below shows the multiplication process of two 2 bit binary
numbers.

This process involves the multiplication of two digits and the

addition of digits with or without carry. After the multiplication
of the each bit to the multiplicand, partial products are
generated, and then these products are added to produce the
total sum which represents the binary multiplication value.

This multiplication is implemented by combinational circuit

such that the multiplication is performed with AND gates
whereas the addition is carried out by using half adders as
shown in figure.
The first partial product is obtained by the AND gate which is
nothing but a least significant bit of the multiplication result.
Since the second partial product is shifted to the left position,
the first partial second term and second partial product first
term is added by half adder and produce the sum output along
with the carry out.

This carry out is added at the next half adder as an input as

shown in figure. Likewise, it produces the multiplication result
of two binary numbers by using the simple circuit
configuration. The multiplication of the two 2 bit number
results a 4-bit binary number.
 ->THEORY:
-A digital comparator is a combinational circuit that compares two binary numbers
to determine their relationship (greater than, less than, or equal). Let's explore
the theory of a digital comparator with a focus on a 1-bit comparator for
simplicity.

1-Bit Digital Comparator:

A 1-bit comparator compares two single-bit binary numbers, A and B. The output
of the comparator indicates whether A is greater than, equal to, or less than B.

-Inputs:
A and B: The binary numbers to be compared.
Outputs:
A > B: High (1) if A is greater than B, Low (0) otherwise.
A = B: High (1) if A is equal to B, Low (0) otherwise.
A < B: High (1) if A is less than B, Low (0) otherwise.

Truth table for 1 bit comparator is as follows:

A B A>B A<B A=B
0 0 0 0 1
0 1 0 1 0
1 0 1 0 0
1 1 0 0 1
The circuit for a 1-bit comparator typically involves the use of XOR, AND, and OR
gates. The XOR gates compare corresponding bits of A and B, and the AND and
OR gates combine these results to produce the outputs.
A>B=A⋅ B'
A=B= A'B'+AB
A<B= A'B
n-Bit Digital Comparator:
For larger binary numbers, you can extend the concept of a 1-bit comparator to
create an n-bit comparator by cascading multiple 1-bit comparators. Each stage
compares corresponding bits of the two n-bit numbers.

The outputs of the individual stages are used to determine the overall relationship
between the two n-bit numbers (greater than, equal to, or less than).

Example:
For a 4-bit comparator, you would have four 1-bit comparators connected in
series. The outputs from these comparators are then combined to determine the
relationship between the two 4-bit numbers.

The general approach is to start by comparing the most significant bits and
propagate the results through the less significant bits if needed.

-IMPLEMENTATION: