JECRC UNIVERSITY, Jaipur

BCA I Semester
UNIT-4 Assignment
Subject: - Computer Organization and Architecture
Course Code: BCA115C
Date of Release: 2/12/2022 Submission Date: 07/12/2022

PART-A (1x20=20marks)

1. In a six-stage pipeline assuming that there are no branch instructions. If we want to execute 15
instructions. What is the time required to execute these instructions?
a. 16
b. 15
c. 21
d. 20
2. Dynamic pipeline allows
a. Multiples functions to evaluate
b. Only stream line connection
c. To perform fixed function
d. None of these
3. Array processor is represented in
a. SIMD
b. MISC
c. MIMD
d. None of these
4. What is the Basic difference between vector and array processors?
a. Register
b. Pipelining
c. Both A & B
d. None of these
5. ................. is an implementation technique whereby multiple instructions are overlapped during an
execution.
6. The vector stride value is required
a. to deal with the length of vectors
b. to find the parallelism in vectors
c. to access the elements in multi-dimensional vectors
d. None of these
7. The instruction execution flow in the pipeline processor is represented by
a. Flow chart
b. Data flow diagram
c. Reservation table
d. Time space diagram
8. ______ have been developed specifically for pipelined systems.
a. Utility software
b. Speed up utilities
c. Optimizing compilers
d. None of the mentioned
9. The pipelining process is also called as ______
a. Superscalar operation
 b. Assembly line operation
c. Von Neumann cycle
d. None of the mentioned
10. The fetch and execution cycles are interleaved with the help of ________
a. Modification in processor architecture
b. Clock
c. Special unit
d. Control unit
11. In pipelining the task which requires the least time is performed first. (True/False)
12. If a unit completes its task before the allotted time period, then _______
a. It’ll perform some other task in the remaining time
b. Its time gets reallocated to a different task
c. It’ll remain idle for the remaining time
d. None of the mentioned
13. The situation wherein the data of operands are not available is called ______
a. Data hazard
b. Stock
c. Deadlock
d. Structural hazard
14. Which is a method of decomposing a sequential process into sub operations:
a. Pipeline
b. CISC
c. RISC
d. Database
15. Which types of register holds a single vector containing at least two read ports and one write ports:
a. Data system
b. Data base
c. Memory
d. Vector register
16. Parallel computing means doing several takes simultaneously thus improving the performance of the
____________:
a. Data system
b. Computer system
c. Memory
d. Vector register
17. Which processor is a peripheral device attached to a computer so that the performance of a computer
can be improved for numerical computations:
a. Attached array processor
b. SIMD array processor
c. Both
d. None
18. Which processor has a single instruction multiple data stream organization that manipulates the
common instruction by means of multiple functional units:
a. Attached array processor
b. SIMD array processor
c. Both
d. None
19. In the case of a left arithmetic shift , zeros are Shifted to the____________:
a. Left
b. Right
c. Up
 d. Down
20. In the case of a right arithmetic shift the sign bit values are shifted to the ____________:
a. Left
b. Right
c. Up
d. Down

PART-B (5x2=10 marks)

PART-C (5x6=30marks)
1. Explain 4-stage pipelining in a computer with suitable example.
2. Describe the phase-time diagram with suitable figure and example.
3. Write a short note on vector processing with its features.
4. What is pipeline. Perform the Ai*Bi+Ci task with suitable figure.
5. Consider a processor with 64 registers and an instruction set of size twelve. Each instruction has five
distinct fields, namely, opcode, two source register identifiers, one destination register identifier, and a
twelve-bit immediate value. Each instruction must be stored in memory in a byte-aligned fashion. If a
program has 100 instructions, Find the amount of memory (in bytes) consumed by the program text.

PART-D (2x10=20marks)
1.(a)Explain Arithmetic pipeline with suitable figure and example.
(b)Write a note on pipeline hurdles with definition of each terms.

2. A machine has a 32-bit architecture, with 1-word long instructions. It has 64 registers, each of which
is 32 bits long. It needs to support 45 instructions, which have an immediate operand in addition to
two register operands. Assuming that the immediate operand is an unsigned integer, Find the
maximum value of the immediate operand.