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5th sem 20

The document outlines an examination paper for the course Microprocessors & Microcontrollers (AEIE3103) for B.Tech students in their 5th semester. It includes multiple-choice questions, programming tasks, and theoretical questions across five groups, requiring students to answer a selection from each group. The total marks for the exam are 70, with specific instructions on how to approach the questions.

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anshumandas1718
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8 views3 pages

5th sem 20

The document outlines an examination paper for the course Microprocessors & Microcontrollers (AEIE3103) for B.Tech students in their 5th semester. It includes multiple-choice questions, programming tasks, and theoretical questions across five groups, requiring students to answer a selection from each group. The total marks for the exam are 70, with specific instructions on how to approach the questions.

Uploaded by

anshumandas1718
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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B.

TECH/AEIE/5TH SEM/AEIE 3103/2020


B.TECH/AEIE/5TH SEM/AEIE 3103/2020

MICROPROCESSORS & MICROCONTROLLERS


(AEIE3103)
Time Allotted : 3 hrs Full Marks : 70
Figures out of the right margin indicate full marks.
Candidates are required to answer Group A and
any 5 (five) from Group B to E, taking at least one from each group.
Candidates are required to give answer in their own words as far as practicable.

Group – A
(Multiple Choice Type Questions)

1. Choose the correct alternative for the following: 10 × 1 = 10


(i) In 8085 µP number of register pair is
(a) 2 (b) 3 (c) 6 (d) 8.
(ii) AC flag is used in which following instruction?
(a) ADD C (b) DAD D (c) DAA (d) ADC C
(iii) Which pin of 8085 µP is used to acknowledge INTR?
(a) HLDA (b) 𝐼𝑂/𝑀 (c) HOLD (d) INTA
(iv) Among the followings which one is a vectored interrupt-?
(a) INTR (b) TRAP (c) READY (d) HOLD
(v) If the operating frequency of 8085 is 2 MHz, then the time required to execute
ANA M instruction is
(a) 3.5 µsec (b) 7 µsec (c) 10 µsec (d) 14 µsec
(vi) In 8255 Mode 2 is called
(a) Bit set reset mode (b) Simple data transfer mode
(c) IO mode with handshake signal (d) Bidirectional mode.
(vii) In 8051 µC if RS1=1 and RS0=0 then the selected register bank is-
(a) Bank 0 (b) Bank 1 (c) Bank 2 (d) Bank 3.
(viii) If the operating frequency of 8085 is 2 MHz, then the time required to execute
an instruction of 10T states is-
(a) 3 µsec (b) 5 µsec (c) 10 µsec (d) 15 µsec
(ix) In 8051 µC number of I/O port is
(a) 2 (b) 3 (c) 4 (d) 5
(x) After reset operation content of SP register in 8051 µC is
(a) 00H (b) 07H (c) 0000H (d) FFH.
AEIE 3103 1
B.TECH/AEIE/5TH SEM/AEIE 3103/2020
Group – B
2. (a) Based on the size of the instruction classify the different instructions of 8085 µP
with one suitable example.
(b) Write a program to store the last two digits of your autonomy roll number and
registration number in memory location 8000H and 8001H respectively.
Multiply the content of 8000H with 8001H. Store the result in memory location
starting from 8002H.
(c) With suitable example explain the process of data storage in a stack memory.
3 + 7 + 2 = 12

3. (a) Define opcode and operand with one suitable example.


(b) Store the last two digits of your registration number in memory location 8000H.
Write a program to count the number of 1’s and 0’s present in the content of
memory location 8000H. Store the result in memory location 9000H.
(c) With one suitable example explain the process of subroutine call in 8085 µP.
2 + 6 + 4 = 12

Group – C
4. (a) Draw the timing diagram of XRA M instruction. Assume that the opcode of the
instruction is XXH and it is stored in memory location 8000H.Also calculate the
time required to execute the instruction where the clock frequency is 3 MHz.
(b) What are the differences between memory mapped IO and IO mapped IO
schemes?
(c) What is the advantage of partial address decoding over absolute address
decoding?
(6 + 1) + 3 + 2 = 12

5. (a) Design an interface between 8085 µP and one 8KB ROM memory chip using 3:8
decoder to generate the chip select signal. The first address in the ROM memory
chip is 0000H.
(b) Interface one 7 segment display and 8 DIP switches with 8085 µP. Select
suitable address.
6 + 6 = 12

Group – D
6. (a) Draw and discus the control word register (CWR) format of 8255 PPI in I/O
mode.
(b) Draw the interfacing circuit to connect two LEDs to PC0 and PC7 line of 8255 PPI.
Write an assembly language program for 8085 µP to periodically turn ON and
OFF two LEDs by setting 8255 PPI in BSR mode.
AEIE 3103 2
B.TECH/AEIE/5TH SEM/AEIE 3103/2020
(c) Write the control word value of 8255 PPI to set Port A as input in mode 1 and
Port B as output in mode 1.
Write the 8085 µP instructions to load the above control word value in the CWR
register. Assume Port A address is F0H.
3 + (3 + 3) + (1 + 2) = 12

7. (a) Draw and discus the control word register (CWR) format of 8255 PPI in BSR
mode.
(b) Explain Write a program to set PC1 line and after some delay reset PC3 line of
8255 PPI.
(c) Interface 8 LEDs to 8085 µP using 8255 PPI. Write a program blink the LEDs
with delay continuously.
3 + 3 + (2 + 4) = 12

Group – E
8. (a) Write the main features of 8051 µC.
(b) Write the name of different general purpose registers in 8051 µC.
(c) What is the function of EA signal in 8051 C?
(d) Draw and discuss the flag register of 8051 C.
4 + 2 + 2 + 4 = 12

9. (a) Write an assembly level program for 8051 C to cut paste a block of 10 byte data
from one memory to another memory location (internal RAM) in reverse order.
(b) What is the function of RS0 and RS1 bits in the PSW register of 8051 C?
(c) Write short notes on (any one)
(i) Internal RAM of 8051 C.
(ii) Serial data communication in 8051 C.
5 + 2 + 5 = 12

Department &
Submission link:
Section
https://classroom.google.com/c/MTIxODk4ODA4NzU1/a/MjcxMDE4
AEIE
NDk2NjQw/details

AEIE 3103 3

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