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3. Gate Level Minimization

Chapter 3 discusses gate-level minimization techniques in digital design, focusing on methods such as the Karnaugh map (K-map) for simplifying Boolean functions. It covers the importance of minimizing gate count and delay for cost and performance improvements, as well as the use of NAND and NOR gates in circuit implementation. Additionally, the chapter introduces the Quine-McCluskey method for minimizing functions with more than four variables, providing a systematic approach to logic simplification.

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0% found this document useful (0 votes)
8 views

3. Gate Level Minimization

Chapter 3 discusses gate-level minimization techniques in digital design, focusing on methods such as the Karnaugh map (K-map) for simplifying Boolean functions. It covers the importance of minimizing gate count and delay for cost and performance improvements, as well as the use of NAND and NOR gates in circuit implementation. Additionally, the chapter introduces the Quine-McCluskey method for minimizing functions with more than four variables, providing a systematic approach to logic simplification.

Uploaded by

ziad.ahmed1204
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CHAPTER-3

Gate-Level Minimization

Digital Design (with an introduction to the Verilog HDL) 6th Edition,


M. Morris Mano, Michael D. Ciletti

• Dr. Kalpana Settu


Assistant Professor
ECE, IIITDM Kancheepuram
Outline
• The Map Method
• Four Variable K-map
• Product of Sums
• Don’t Care Conditions
• NAND & NOR Implementation
• And-Or-Invert & Or-And-Invert
• Exclusive-OR Function
• Hardware Description Language

2
Why Logic Minimization?
❑ Gate-level minimization is the design task of finding an optimal
gate-level implementation of the Boolean functions describing a
digital circuit.
❑ Minimize the number of gates used
→ Reduce gate count = reduce cost
❑ Minimize total delay (critical path delay)
→ Reduce delay = improve performance

3
The Map Method
❑ The truth table representation of a function is unique, but the function can be
expressed in many different algebraic forms.
❑ The complexity of the digital logic gates is directly related to the complexity of
the algebraic expression of a function.
❑ Gate-level minimization is the design task of finding an optimal gate-level
implementation of the Boolean functions.
❑ The map method provides a simple, straightforward procedure for minimizing
Boolean functions.

4
The Map Method (Karnaugh map or K-map)
❑ The map method is also known as the Karnaugh map or K-map.
❑ Provide a straightforward procedure for minimizing Boolean functions.
Maurice Karnaugh introduced it in 1953 as a refinement of Edward Veitch's 1952 Veitch
diagram.
❑ A Karnaugh map (K-map) is a diagram made up of squares, with each square
representing one minterm of the function.
❑ Example: Two-variable K-map (4 minterms)

❑ The simplified expressions are always in one of the two standard forms:
➢ Sum of Products (SOP)
➢ Product of Sums (POS)

5
Two-Variable K-Map
❑ Two-variable function has four minterms
➢ Four squares in the map for those minterms
❑ The corresponding minterm of each square is determined by the bit status shown
outside
• In K-map, the adjacent squares represent
minterms that differ by one variable
• Minterms in adjacent squares can be combined

➢ 1 square = 1 minterm = two literals


➢ 2 adjacent squares = 1 term = one literal
➢ 4 adjacent squares = 1

6
Two-Variable K-Map
➢ In the K-map, mark the squares whose minterms belong to a given function.
➢ Example: (a) xy (b) x + y
f = xy = m3 f = x + y = m1 + m2 + m3

7
Two-Variable K-Map
• Simplify the Boolean function F(x,y) = σ(0,2,3)

F(x,y) = x + y’
1 1

8
Three-Variable K-Map
❑ In the three variable K-map, there are eight minterms for three binary variables.
❑ Watch the sequence!! Only one bit changes in value from one adjacent column to
the next.
❑ The minterms are arranged, not in a binary sequence, but in a sequence similar to the
Gray code.

9
Three-Variable K-Map
❑ To simplify the final expression!
→ Recognize: Any two adjacent squares in the map differ by only one variable, which is
primed in one square and unprimed in the other.
→ The sum of two minterms in adjacent squares can be simplified to a single
product term.

The two squares differ by the variable y,


which can be removed when the sum of
the two minterms are formed.

10
Example 3.1 of K-map

1 1

1 1

11
Three Variable K-Map
❑ In certain cases, two squares in the map are considered to be adjacent even though
they do not touch each other.

❑ m0 is adjacent to m2 because their minterms differ by one variable.

❑ m4 is adjacent to m6

12
Example 3.2 of K-map

1 1 1

13
Three Variable K-Map
❑ Four adjacent squares in the three-variable map→ represents the logical sum of four
minterms → results in an expression with only one literal.

14
Example 3.3 of K-map

15
Example 3.4 of K-map
➢ If a function is not expressed in sum-of-minterms form, it is possible to use the map to obtain the
minterms of the function and then simplify the function to an expression with a minimum number
of terms.

1 1 1

1 1

16
Three Variable K-Map
❑ A larger number of adjacent squares are combined, we obtain a product term with
fewer literals.
➢ 1 square = 1 minterm = three literals.
➢ 2 adjacent squares = 1 term = two literals.
➢ 4 adjacent squares = 1 term = one literal.
➢ 8 adjacent squares encompass the entire map and produce a function that is
always equal to 1.
❑ It is obviously to know the number of adjacent squares is combined in a power of two
such as 1,2,4, and 8.

17
Four Variable K-map
❑ The same rule: only one bit changes in value from one column to the next.

4 variables: w, x, y, z

1 square = 1 minterm = 4 literals


2 adjacent squares = 1 term = 3 literals
4 adjacent squares = 1 term = 2 literals
8 adjacent squares = 1 term = 1 literal
16 adjacent squares = 1

18
Example 3.5 of K-map

➢We can use the same 1 1 1


square more than once!
1 1 1

1 1 1

1 1

19
Example 3.5 of K-map
❑ Using a fewer number of squares isn’t a good idea.

Can be Simplified
further!

F = y’ + w’yz’ + wxyz’

20
Example 3.6 of K-map

1 1 1

1 1 1

21
Prime Implicants

• In choosing adjacent squares in a map, we must ensure that


(1) all the minterms of the function are covered when we combine the
squares,
(2) the number of terms in the expression is minimized, and
(3) there are no redundant terms (i.e., minterms already covered by other
terms).
• A prime implicant is a product term obtained by combining the
maximum possible number of adjacent squares in the map.
• If a minterm in a square is covered by only one prime implicant, that
prime implicant is said to be essential.

22
Prime Implicants
❑ A prime implicant is a product term obtained by combining the maximum possible
number of adjacent squares in the map.
❑ If a minterm in a square is covered by only one prime implicant, that prime implicant
is said to be essential.

23
Prime Implicants

❑ For finding the simplified expression


❑ first determine all the essential prime implicants
❑ logical sum of all the essential prime implicants, plus other prime implicants that may be needed
to cover any remaining minterms not covered by the essential prime implicants.

24
Prime Implicants

1 1 1

1 1

1 1
BD, B’D’, CD, AD, AB’, B’C : Prime Implicants (PI)
BD, B’D’ : Essential Prime Implicants (EPI) 1 1 1 1
CD, AD, AB’, B’C : Non-Essential Prime Implicants
or
Selective Prime Implicant (SPI)

25
Five-Variable K-Map
❑ Maps for more than four variables are not as simple to use as maps for four or
fewer variables.
❑ A five-variable map needs 32 squares and a six-variable map needs 64 squares.
❑ Maps with four or more variables need too many squares and are impractical to
use.
Maps with six or more variables need too many
squares and are impractical to use.

26
Product of Sums
❑ K-map is mainly designed for expressing a function in sum-of-products. We need to
take a few extra steps for expressing a function in product-of-sums.
Steps:
1. Express the function F in minterms. Fill them in K-map with “1”. Fill the rest with “0”.
2. Use the same way to combine the squares marked “0”.
3. The obtained result will be F’. Apply the DeMorgan’s theorem and we can obtain F in
product-of-sums.

27
Example 3.7 of Product-of-Sums

➢ Step-1: mark
“0” & “1”

28
Example 3.7 of Product-of-Sums

➢ combine “1” for Sum


of Products

Answer (a)

29
Example 3.7 of Product-of-Sums

➢ Step2, combine “0”

➢ Step3, convert F’ into F


by DeMorgan

Answer (b)

30
Logic Gates of Example 3.7

31
Simplify Product-of-Maxterms
➢ Example: Convert product-of-maxterms canonical form to a simplified function.

1. Step-1: mark “0” & “1”


2. Combine “1’s” to get sum-of-products

3. Merge “0” to get F’ and use DeMorgan to


obtain product-of-sums.

32
Don’t Care Conditions

➢ In some applications, minterms of a function is not specified.


➢ It is customary to call the unspecified minterms of a function “don’t-care conditions”.
➢ To distinguish the don’t-care condition from 1’s and 0’s, an X is used.
➢ “Don’t-care minterms” may be assumed to be either 0 or 1.

33
Example of “Don’t Care Condition”

F = yz + w’x’ F = yz + w’z

34
Quine‐McCluskey (QM) Method
for Logic Minimization
• Minimizing Boolean functions using Karnaugh maps is practical only
for up to four or five variables. Also, the Karnaugh map method does
not lend itself to be automated in the form of a computer program.
• The Quine-McCluskey method is more practical for logic
simplification of functions with more than four or five variables. It also
has the advantage of being easily implemented with a computer or
programmable calculator.
• The Quine-McCluskey method is functionally similar to Karnaugh
mapping, but the tabular form makes it more efficient for use in
computer algorithms.
• This method is sometimes referred to as the tabulation method.

Digital Fundamentals by Thomas L. Floyd 35


Quine‐McCluskey (QM) Method
• To apply the Quine-McCluskey method, first write the
function in standard minterm (SOP) form.

• STEP-1: The minterms that appear in the function are listed


in the right column.

Digital Fundamentals by Thomas L. Floyd 36


Quine‐McCluskey (QM) Method
STEP-1 • STEP-2: Arrange the minterms in the original
expression in groups according to the
number of 1s in each minterm.

Digital Fundamentals by Thomas L. Floyd 37


STEP-2
Quine‐McCluskey (QM) Method
• STEP-3: Third, compare adjacent groups, looking to see if any minterms
are the same in every position except one. If they are, place a checkmark
by those two minterms, as shown in Table 4–11.
• You should check each minterm against all others in the following
group, but it is not necessary to check any groups that are not adjacent.
• In the column labeled First Level, you will have a list of the minterm
names and the binary equivalent with an x as the placeholder for the
literal that differs.
• In the example, minterm m1 in Group 1 (0001) is
identical to m3 in Group 2 (0011) except for the C
position, so place a check mark by these two
minterms and enter 00x1 in the column labeled
First Level.
• If a given term can be used more than once, it
should be.
Essential Prime
Implicants (EPI)

38
Quine‐McCluskey (QM) Method
STEP-4
• The terms listed in the First Level have
been used to form a reduced table (Table
4–12) with one less group than before.
• The number of 1s remaining in the First
Level are counted and used to form three
new groups.
• Terms in the new groups are compared
against terms in the adjacent group
down. We need to compare these terms
only if the x is in the same relative
position in adjacent groups; otherwise go
on. The terms that are unchecked will form other terms in the
• If the two expressions differ by exactly final reduced expression. The first unchecked term is read as
one position, a check mark is placed next A’B’D. The next one is read as A’C’D. The last unchecked term
to both terms as before and all of the
minterms are listed in the Second Level is ABD. Recall that m10 was an essential prime implicant, so is
list. picked up in the final expression.

Digital Fundamentals by Thomas L. Floyd 39


Quine‐McCluskey (QM) Method
• Although this expression is correct, it may not be the minimum possible expression. There is a
final check that can eliminate any unnecessary terms. The terms for the expression are written
into a prime implicant table, with minterms for each prime implicant checked, as shown in
Table 4–13.

• If a minterm has a single check mark, then the prime implicant is essential and must be
included in the final expression. The term ABD must be included because m15 is only covered by
it. Likewise m10 is only covered by AB’CD’, so it must be in the final expression. Notice that the
two minterms in A’C’D are covered by the prime implicants in the first two rows, so this term is
unnecessary.

Digital Fundamentals by Thomas L. Floyd 40


NAND & NOR Implementation

• Digital circuits are frequently constructed with NAND or NOR gates


rather than with AND and OR gates.
• NAND and NOR gates are easier to fabricate and are the basic gates
used in IC digital logic families.
• The NAND and NOR gates are said to be universal gate because any
logic circuit can be implemented with it.

41
NAND Circuits
➢The NAND gate is said to be a universal gate because any logic
circuit can be implemented with it.
➢Logical operations AND, OR, and complement can be obtained with
NAND gates alone.

42
NAND Circuits
➢A convenient way to implement a Boolean function with NAND
gates is to obtain the simplified Boolean function in terms of
Boolean operators and then convert the function to NAND logic.
➢AND-invert → NAND; invert-OR →NAND
➢In part (b), we can place a bubble (NOT) in each input and apply the
DeMorgan’s theorem, then get a Boolean function in NAND type.

43
Converted to NAND Gates
• The implementation of Boolean functions with NAND gates requires
that the functions be in sum-of-products form.

𝑭 = 𝑨𝑩 ’ 𝑪𝑫 ’ ’ = 𝑨𝑩 + 𝑪𝑫

44
Two Level NAND Gates Implementation

45
Multilevel NAND Circuits

46
Multilevel NAND Circuits

The general procedure for converting a multilevel AND–OR diagram into an all-
NAND diagram using mixed notation is as follows:
1. Convert all AND gates to NAND gates with AND-invert graphic symbols.
2. Convert all OR gates to NAND gates with invert-OR graphic symbols.
3. Check all the bubbles in the diagram. For every bubble that is not
compensated by another small circle along the same line, insert an inverter (a
one-input NAND gate) or complement the input literal.

47
Multilevel NAND Circuits

48
NOR Implementation
• The NOR gate is another universal gate that can be used to
implement any Boolean function.
• A two-level implementation with NOR gates requires a function in a
form of product-of-sums.

49
Two-Level NOR Implementation

50
Multi-Level NOR Implementation

NOR

51
The End

Reference:
1. Digital Design (with an introduction to the Verilog HDL) 6th Edition, M. Morris Mano,
Michael D. Ciletti

Note: The slides are supporting materials for the course “Digital Circuits” at IIITDM Kancheepuram.
Distribution without permission is prohibited.

52

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