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EE618 CMOS Analog IC Design Assignment 2

The document outlines the design of a Common Source NMOS Amplifier using GPDK 45nm technology, specifying requirements for gain, DC output voltage, and bias current. It details the schematic and symbol creation, along with the necessary analyses including DC, AC, and transient analyses. Additionally, it includes instructions for corner simulations, layout design, and post-layout extraction with corresponding checks and results.

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EE618 CMOS Analog IC Design Assignment 2

The document outlines the design of a Common Source NMOS Amplifier using GPDK 45nm technology, specifying requirements for gain, DC output voltage, and bias current. It details the schematic and symbol creation, along with the necessary analyses including DC, AC, and transient analyses. Additionally, it includes instructions for corner simulations, layout design, and post-layout extraction with corresponding checks and results.

Uploaded by

abhijeetdarekar2000
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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EE618 CMOS Analog IC Design Assignment 2

24M1209 Abhijeet Darekar

Question : Consider a Common Source NMOS Amplifier with Resistive load as shown in figure 1.
Design the Amplifier in GPDK 45nm technology to meet the following specifications:

Gain @ 10KHz (Vout/Vin) ≥ 18dB

- VOUT, DC = 800mV ± 10mV

- ID1,DC (M1 DC Bias Current) = 116uA ± 10uA (Suggested)

Solution:
MB M1
Finger Width 750nm 750nm
Length 400nm 400nm
Fingers 4 20 (in order to obtain given
DC operating point)
Multiplier 1 1
1) Design the Schematic & Symbol of the “Amplifier” part enclosed in RED as a separate cell. Use
appropriate pins to bring out the connections. Attach a screenshot of annotated schematic showing W
and L.

Solution:

SCHEMATIC

SYMBOL
2) Instantiate this as a symbol in another “Testbench” schematic, and connect the remainder of the
circuit to perform the following analysis:

• DC Analysis – Attach the “Amplifier” schematic screenshot with annotated DC operating points.

• AC Analysis – Plot the small signal gain (in dB) against frequency ranging from 10Hz to 100MHz.
Annotate gain @ 10KHz, 3dB cut-off points and unity gain frequency.

• Transient Analysis – Apply a 10mV amplitude, 10KHz input signal and plot the output waveform; report
the gain by measuring peak-to-peak output and input voltage.

DC Analysis:

Number of fingers calculated for M1 to obtain given DC operating point are 20.

AC Analysis:
Transient Analysis:
3) Run Corner Simulations for the following 6 cases: Typical, Fast, Slow for both 0°C and 100°C. Append
all the AC analysis plots together, and all the transient analysis plots together.

AC Analysis Magnitude Plot:

AC Analysis Phase Plot:


Transient Analysis (Input Voltage):
Transient Analysis (Output Voltage):
4) Design the Layout of the “Amplifier” part (enclosed in RED) and perform DRC and LVS check. Attach a
screenshot of clean results.

LVS Check Window:


5) Perform C+CC Post Layout Extraction (PEX) and redo the analysis in 2) (except DC analysis) and
append the results of 5) to the corresponding plots in 2).

AC Analysis Magnitude Plot:

Transient Analysis:

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