RVS COLLEGE OF ENGINEERING AND TECHNOLOGY

Kumarankottam Campus, Kannampalayam (Po), Coimbatore – 641 402

(ApprovedbyAICTE,NewDelhi&AffiliatedtoAnnaUniversity,Chennai)
NAAC AccreditedandISO21001:2018 certifiedInstitution

DEPARTMENT

OF

ELECTRONICS AND COMMUNICATION

ENGINEERING

REGULATION : 2021
CEC337 / DSP ARCHITECTURE AND PROGRAMMING

Prepared By:

V.VENKATESWARAN
AP/ECE
RVSCET
 Syllabus

CEC337 DSP ARCHITECTURE AND PROGRAMMING

COURSE OBJECTIVES:

● To learn C, Assembly & Linear Assembly Language.

● To learn TMS320C54XX,TMS320C67XX DSP Development board
● To learn Code Composer Studio(CCS)

LIST OF EXPERIMENTS:

1. Real-Time Sine Wave Generation

2. Programming examples using C, Assembly and linear assembly
3. Implementation of moving average filter
4. FIR implementation with a Pseudorandom noise sequence as input to a filter
5. Fixed point implementation of IIR filter
6. FFT of Real-Time input signal

COURSE OUTCOMES
At the end of this course, the students will be able to:
CO1: Understand the architectural features of DSP Processors.
CO2: Comprehend the organization of TMS320C54xx DSP processors
CO3: Build solutions using TMS320C6x DSP Processor
CO4: Implement DSP Algorithms
CO5: Study the applications of DSP Processors
EXP. EQUIPMENT / MACHINE /
NAME OF EXPERIMENTS
NO. TO BE USED

1 INTRODUCTION TO TMS320C6713 DSK & TMS320C67XX DSK & Code Composer

CODE COMPOSER STUDIO Studio
2 SINE GENERATION WITH TABLE VALUES TMS320C67XX DSK & Code Composer
GENERATED WITHIN THE PROGRAM Studio
3 PROGRAMMING EXAMPLES USING C, TMS320C67XX DSK & Code Composer
ASSEMBLY AND LINEAR ASSEMBLY Studio
3.1 EFFICIENT DOT PRODUCT PROGRAM TMS320C67XX DSK & Code Composer
CALLING C FUNCTION Studio
3.2 SUM OF N + (N - 1) + (N - 2) + . . . + 1, USING C TMS320C67XX DSK & Code Composer
CALLING AN ASSEMBLY FUNCTION Studio
3.3 32-BIT PSEUDORANDOM NOISE TMS320C67XX DSK & Code Composer
GENERATION USING C CALLING AN Studio
ASSEMBLY FUNCTION
3.4 DOT PRODUCT USING C FUNCTION TMS320C67XX DSK & Code Composer
CALLING A LINEAR ASSEMBLYFUNCTION Studio
3.5 FACTORIAL USING C CALLING A LINEAR TMS320C67XX DSK & Code Composer
ASSEMBLY FUNCTION Studio
4 IMPLEMENTATION OF MOVING AVERAGE TMS320C67XX DSK & Code Composer
FILTER Studio
5 FIR IMPLEMENTATION WITH A TMS320C67XX DSK & Code Composer
PSEUDORANDOM NOISE Studio
SEQUENCE AS INPUT TO A FILTER
6 FIXED POINT IMPLEMENTATION OF IIR TMS320C67XX DSK & Code Composer
FILTER Studio
7 FFT OF REAL-TIME INPUT SIGNAL TMS320C67XX DSK & Code Composer
Studio
8 IMPLEMENTATION OF LINEAR TMS320C67XX DSK & Code Composer
CONVOLUTION Studio
Expt. No: 1 INTRODUCTION TO TMS320C6713 DSK & CODE COMPOSER STUDIO
Date :

AIM:

To learn about the TMS320C6713 DSK and Code Composer Studio (CCS).

TMS320C6713 DSK BOARD FEATURES

Package Contents

The C6713™ DSK builds on TI's industry-leading line of low cost, easy-to-use DSP Starter
Kit (DSK) development boards. The high-performance board features the TMS320C6713 floating-
point DSP. Capable of performing 1350 million floating-point operations per second (MFLOPS),
the C6713 DSP makes the C6713 DSK the most powerful DSK development board.

The DSK is USB port interfaced platform that allows to efficiently develop and test
applications for the C6713. The DSK consists of a C6713-based printed circuit board that will
serve as a hardware reference design for TI’s customers’ products. With extensive host PC and
target DSP software support, including bundled TI tools, the DSK provides ease-of-use and
capabilities that are attractive to DSP engineers.

The following checklist details items that are shipped with the C6713 DSK.
 ➢ TMS320C6713 DSK TMS320C6713 DSK development board
➢ Other hardware External 5VDC power supply & IEEE 1284 compliant male-to-female
cable
➢ CD-ROM Code Composer Studio DSK tools
➢ Technical reference manual

The C6713 DSK has a TMS320C6713 DSP onboard that allows full-speed verification of
code with Code Composer Studio. The C6713 DSK provides:
➢ A USB Interface
➢ SDRAM and Flash ROM
➢ An analog interface circuit for Data conversion (AIC)
➢ An I/O port
➢ Embedded JTAG emulation support

Connectors on the C6713 DSK provide DSP external memory interface (EMIF) and peripheral
signals that enable its functionality to be expanded with custom or third party daughter boards.
The DSK provides a C6713 hardware reference design that can assist you in the development of
your own C6713-based products. In addition to providing a reference for interfacing the DSP to
various types of memories and peripherals, the design also addresses power, clock, JTAG, and
parallel peripheral interfaces. The C6713 DSK includes a stereo codec.

This analog interface circuit (AIC) has the following characteristics:

High-Performance Stereo Codec

➢ 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)

➢ 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz)
➢ 1.42 V – 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core Voltages
➢ 2.7 V – 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer
Voltages
➢ 8-kHz – 96-kHz Sampling-Frequency Support

Software Control Via TI McBSP-Compatible Multiprotocol Serial Port

➢ I 2 C-Compatible and SPI-Compatible Serial-Port Protocols

➢ Glueless Interface to TI McBSPs

Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface

➢ I 2 S-Compatible Interface Requiring Only One McBSP for both ADC and DAC
➢ Standard I 2 S, MSB, or LSB Justified-Data Transfers
➢ 16/20/24/32-Bit Word Lengths

The TMS320C6713™ DSP compose the floating-point DSP generation in the

TMS320C6000™ DSP platform. The C6713 device is based on the high-performance, advanced
very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making
this DSP an excellent choice for multichannel and multifunction applications.
The 6713 DSK is a low-cost standalone development platform that enables customers to
evaluate and develop applications for the TI C67XX DSP family. The DSK also serves as a
hardware reference design for the TMS320C6713 DSP. Schematics, logic equations and
application notes are available to ease hardware development and reduce time to market.

Operating at 225 MHz, the C6713 delivers up to 1350 million floating-point operations per
second (MFLOPS), 1800 million instructions per second (MIPS), and with dual fixed-floating-
point multipliers up to 450 million multiply-accumulate operations per second (MMACS).The
DSK uses the 32-bit EMIF for the SDRAM (CE0) and daughter card expansion interface (CE2
and CE3). The Flash is attached to CE1 of the EMIF in 8-bit mode.

An on-board AIC23 codec allows the DSP to transmit and receive analog signals. McBSP0
is used for the codec control interface and McBSP1 is used for data. Analog audio I/O is done
through four 3.5mm audio jacks that correspond to microphone input, line input, line output and
headphone output. The codec can select the microphone or the line input as the active input. The
analog output is driven to both the line out (fixed gain) and headphone (adjustable gain)
connectors. McBSP1 can be re-routed to the expansion connectors in software.

A programmable logic device called a CPLD is used to implement glue logic that ties the
board components together. The CPLD has a register based user interface that lets the user
configure the board by reading and writing to the CPLD registers. The registers reside at the
midpoint of CE1.

The DSK includes 4 LEDs and 4 DIP switches as a simple way to provide the user with
interactive feedback. Both are accessed by reading and writing to the CPLD registers. An included
5V external power supply is used to power the board. On-board voltage regulators provide the
1.26V DSP core voltage, 3.3V digital and 3.3V analog voltages.
 TMS320C6713 DSK Overview Block Diagram
A voltage supervisor monitors the internally generated voltage, and will hold the boards in
reset until the supplies are within operating specifications and the reset button is released. If
desired, JP1 and JP2 can be used as power test points for the core and I/O power supplies.

Code Composer communicates with the DSK through an embedded JTAG emulator with
a USB host interface. The DSK can also be used with an external emulator through the external
JTAG connector.

TMS320C6713 DSP Features

Highest-Performance Floating-Point Digital Signal Processor (DSP):

➢ Eight 32-Bit Instructions/Cycle
➢ 32/64-Bit Data Word
➢ 300-, 225-, 200-MHz (GDP), and 225-, 200-, 167-MHz (PYP) Clock Rates
➢ 3.3-, 4.4-, 5-, 6-Instruction Cycle Times
➢ 2400/1800, 1800/1350, 1600/1200, and 1336/1000 MIPS /MFLOPS
➢ Rich Peripheral Set, Optimized for Audio
➢ Highly Optimized C/C++ Compiler
➢ Extended Temperature Devices Available

Advanced Very Long Instruction Word (VLIW) TMS320C67x™ DSP Core

Eight Independent Functional Units:
➢ Two ALUs (Fixed-Point)
➢ Four ALUs (Floating- and Fixed-Point)
➢ Two Multipliers (Floating- and Fixed-Point)
➢ Load-Store Architecture With 32 32-Bit General-Purpose Registers
➢ Instruction Packing Reduces Code Size
➢ All Instructions Conditional

Instruction Set Features

➢ Native Instructions for IEEE 754
➢ Single- and Double-Precision
➢ Byte-Addressable (8-, 16-, 32-Bit Data)
➢ 8-Bit Overflow Protection
➢ Saturation; Bit-Field Extract, Set, Clear; Bit-Counting; Normalization

L1/L2 Memory Architecture

➢ 4K-Byte L1P Program Cache (Direct-Mapped)
 ➢ 4K-Byte L1D Data Cache (2-Way)
➢ 256K-Byte L2 Memory Total: 64K-Byte L2 Unified Cache/Mapped RAM, and 192K-
Byte Additional L2 Mapped RAM

Device Configuration
➢ Boot Mode: HPI, 8-, 16-, 32-Bit ROM Boot
➢ Endianness: Little Endian/Big Endian

32-Bit External Memory Interface (EMIF)

➢ Glueless Interface to SRAM, EPROM, Flash, SBSRAM, and SDRAM
➢ 512M-Byte Total Addressable External Memory Space
Enhanced Direct-Memory-Access (EDMA) Controller (16 Independent Channels)
16-Bit Host-Port Interface (HPI)
Two Multichannel Buffered Serial Ports (McBSPs)
➢ Two Independent Clock Zones Each (1 TX and 1 RX)

Eight Serial Data Pins Per Port:

Individually Assignable to any of the Clock Zones
Each Clock Zone Includes:
➢ Programmable Clock Generator
➢ Programmable Frame Sync Generator
➢ TDM Streams From 2-32 Time Slots
➢ Support for Slot Bits Size8, 12, 16, 20, 24, 28, 32:
➢ Data Formatter for Bit Manipulation

Wide Variety of I2S and Similar Bit Stream Formats

Integrated Digital Audio Interface Transmitter (DIT) Supports:
➢ S/PDIF, IEC60958-1, AES-3, CP-430 Formats
➢ Up to 16 transmit pins
➢ Enhanced Channel Status/User Data
Extensive Error Checking and Recovery
Two Inter-Integrated Circuit Bus (I2C Bus™) Multi-Master and Slave Interfaces
Two 32-Bit General-Purpose Timers
Dedicated GPIO Module With 16 pins (External Interrupt Capable)
Flexible Phase-Locked-Loop (PLL) Based Clock Generator Module
IEEE-1149.1 (JTAG ) Boundary-Scan-Compatible
Package Options:
➢ 208-Pin Power PAD™ Plastic (Low-Profile) Quad Flat pack (PYP)
 ➢ 272-BGA Packages (GDP and ZDP)
0.13-μm/6-Level Copper Metal Process
➢ CMOS Technology
3.3-V I/Os, 1.2-V Internal (GDP & PYP)
3.3-V I/Os, 1.4-V Internal (GDP)(300 MHz only)

INTRODUCTION TO CODE COMPOSER STUDIO

Code Composer Studio (CCS) is the first fully industrially development environment (IDE) with
DSP specific functionalities. This led us to edit, build, debug profile and manages projects from a
single unified environment.
Other features are
➢ Graphical signal analysis
➢ Injection and extraction of data signals by a file IO Multiprocessor debugging
➢ Automatic testing
➢ Customization via 'C' interpretive scripting language.

TMS Processor: This is TI industry leading line of low cost easy to use. DSP start kit development
boards with Floating point DSP, Capable of performing 1350 million floating point operations ina
second.

CODE COMPOSER FEATURES INCLUDE:

o IDE
o Debug IDE
o Advanced watch windows
o Integrated editor
o File I/O, Probe Points, and graphical algorithm scope probes
o Advanced graphical signal analysis
o Interactive profiling
o Automated testing and customization via scripting
o Visual project management system
o Compile in the background while editing and debugging
o Multi-processor debugging
o Help on the target DSP
Note:-
Launch the DSK help file by opening the following file using Windows Explorer.
C:\CCStudio_v3.1\docs\hlp\c6713dsk.hlp
Documents for Reference:
 ❖ spru509 ---Code Composer Studio getting started guide.
❖ spru189 ---TMS320C6000 CPU & Instruction set guide
❖ spru190 ---TMS320C6000 Peripherals guide
❖ slws106d---Codec(TLV320AIC23) Data Manual.
❖ spru402--- Programmer’s Reference Guide.
❖ sprs186j--- TMS320C6713 DSP
Soft Copy of datasheets are available at : C:\CCStudio_v3.1\docs\pdf.

PROCEDURE FOR SIMULATION OF THE C PROGRAMS WITH CCS

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build

STEPS FOR INTERFACING:

1. Connect the kit to USB(metal pin). power(black pin) supply,line in, line out.
2. Go to setup icon select family 67xx, platform DSK and all, save and quit, don't open CCS
studio
3. Run diagnostics--->start --->if everything is correct you will get "pass".
4. Open CCS studio ,go to debug---->connect -- >check for green color.
5. Projet---> new--->type project name-->select TMS320067XX,executable file .out---- >
finish.
6. File --->new--->DSP/BIOS configuration--->select DSK67XX---->select DSK6713.cdb---
>ok.
7. file---->save as---->file name.cdb in your project folder.
8. Project--->add files to the project---->select files of type .cdb with icon DSK6713.c--- >
double click on.
9. To create new source file: file--->new--->source file--->type FIR program --- >save as
filename.c.
10. Right click on source--->add files to the project -- >select filename.c and open.
11. Open file with path CCSstudio v 3.1--->c6000--->DSK6713--->include--->file type *.*---
>we get a set of files. In that select DSK6713_aic 23,DSK6713 files-->copy both.
Gotoyour project folder, paste these two files and close it.
12. Right click on libraries--->add files to the project-->ccstudio v 3.1-->c6000--> DSK6713-
->lib--->DSK6713bsl in *.o or *.l -- >select and open.
13. Go to generated files folder -- >open .c file copy the first line
#include<"configuration.h">
Go to source file paste it as first line of your c program remove the line
#include"XYZCGG.h".
14. Save the source program.
15.Compile,build and check for zero errors.
16. Switch on CRO and signal generator set the signal generator output up to 2V and less than
10KHz (around 5KHz) connect right channel, left channel and neutral properly.
17. Run the program.
 Expt. No: 2 SINE GENERATION WITH TABLE VALUES GENERATED
WITHIN THE PROGRAM
Date :

AIM:
To generate Sine wave forms by using TMS320C6713 DSP processor and Code
Composer Studio (CCS).

APPARATUS REQUIRED:

➢ TMS320C6713 DSP processor kit.

➢ Code Composer Studio (CCS).
➢ CRO with probe

PROCEDURE:

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build
OUTPUT:
PROGRAM:

#include "DSK6713_AIC23.h" //codec-DSK support file

Uint32 fs=DSK6713_AIC23_FREQ_8KHZ; //set sampling rate
#include <math.h>
#define table_size (short)10 //set table size
short sine_table[table_size]; //sine table array
int i;
interrupt void c_int11() //interrupt service routine
{
output_sample(sine_table[i]); //output each sine value
if (i < table_size - 1) ++i; //incr index until end of table
else i = 0; //reinit index if end of table
return; //return from interrupt
}
void main()
{
float pi=3.14159;
for(i = 0; i < table_size; i++)
sine_table[i] = 10000*sin(2.0*pi*i/table_size); //scaled values
i = 0;
comm_intr(); //init DSK, codec, McBSP
while(1); //infinite loop
}

RESULT:
Thus the Sine Wave was generated using TMS320C6713 DSP Processor.
Expt. No: 3 PROGRAMMING EXAMPLES USING C, ASSEMBLY AND
LINEAR ASSEMBLY

AIM:

To Perform a Programming examples Using C, Assembly and Linear Assembly

by using TMS320C6713 DSP Processor and Code Composer Studio (CCS).

APPARATUS REQUIRED:

➢ Personal Computer (PC)

➢ TMS320C6713 DSP processor kit.
➢ Code Composer Studio (CCS).

PROCEDURE:

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build
 Expt. No: 3.1 EFFICIENT DOT PRODUCT PROGRAM CALLING C FUNCTION
Date :

PROGRAM:
//dotpopt.c Optimized dot product of two arrays

#include <stdio.h>
#include <dotp4.h> //header file with data
#define count 4
short x[count] = {x_array}; //declare 1st array
short y[count] = {y_array}; //declare 2nd array
volatile int result = 0; //result
main()
{
result = dotpfunc(x,y,count); //call optimized function
printf("result = %d decimal \n", result); //print result
}

//dotpfunc.c Optimized dot product function

int dotpfunc(const short *a, const short *b, int ncount)

{
int sum = 0;
int i;
_nassert((int)(a)%4 == 0);
_nassert((int)(b)%4 == 0);
_nassert((int)(ncount)%4 == 0);
for ( i = 0; i < ncount; i++)
{
sum += (a[i] * b[i]); //sum of products
}
return (sum); //return sum as result
}
Expt. No: 3.2 SUM OF N + (N - 1) + (N - 2) + . . . + 1, USING C CALLING AN
ASSEMBLY FUNCTION
Date :

PROGRAM:

//Sum.c Finds n+(n-1)+...+1. Calls ASM function sumfunc

#include <stdio.h>
main()
{
short n=6; //set value
short result; //result from asm function
result = sumfunc(n); //call ASM function sumfunc
printf("sum = %d", result); //print result from asm function
}

;Sumfunc.asm Assembly function to find n + (n-1) + ... + 1

.def _sumfunc ;function called from C

_sumfunc: MV .L1 A4,A1 ;setup n as loop counter
SUB .S1 A1,1,A1 ;decrement n
LOOP: ADD .L1 A4,A1,A4 ;accumulate in A4
SUB .S1 A1,1,A1 ;decrement loop counter
[A1] B .S2 LOOP ;branch to LOOP if A1#0
NOP 5 ;five NOPs for delay slots
B .S2 B3 ;return to calling routine
NOP 5 ;five NOPs for delay slots
.end
Expt. No: 3.3 32-BIT PSEUDORANDOM NOISE GENERATION USING C CALLING
AN ASSEMBLY FUNCTION
Date :

PROGRAM:

//Noisegen_casm.c Pseudorandom noise generation calling ASM function

#include "dsk6713_aic23.h" //codec-DSK support file

Uint32 fs=DSK6713_AIC23_FREQ_48KHZ; //set sampling rate
int previous_seed;
short pos = 16000, neg = -16000; //scaling noise level
interrupt void c_int11()
{
previous_seed = noisefunc(previous_seed); //call ASM function
if(previous_seed & 0x01) output_sample(pos); //positive scaling
else output_sample(neg); //negative scaling
}
void main ()
{
comm_intr(); //init DSK,codec,McBSP
previous_seed = noisefunc(0x7E521603); //call ASM function
while (1); //infinite loop
}

;Noisegen_casmfunc.asm Noise generation C-called function

.def _noisefunc ;ASM function called from C

_noisefunc ZERO A2 ;init A2 for seed manipulation
MV A4,A1 ;seed in A1
SHR A1,17,A1 ;shift right 17->bit 17 to LSB
ADD A1,A2,A2 ;add A1 to A2 => A2
SHR A1,11,A1 ;shift right 11->bit 28 to LSB
ADD A1,A2,A2 ;add again
SHR A1,2,A1 ;shift right 2->bit 30 to LSB
ADD A1,A2,A2
SHR A1,1,A1 ;shift right 1->bit 31 to LSB
ADD A1,A2,A2
AND A2,1,A2 ;Mask LSB of A2
SHL A4,1,A4 ;shift seed left 1
OR A2,A4,A4 ;Put A2 into LSB of A4
B B3 ;return to calling function
NOP 5 ;5 delays for branch
Expt. No: 3.4 DOT PRODUCT USING C FUNCTION CALLING A LINEAR
ASSEMBLYFUNCTION
Date :

PROGRAM:

//Dotp4clasm.c Multiplies two arrays using C calling linear ASM func

short dotp4clasmfunc(short *a,short *b,short ncount); //prototype

#include <stdio.h> //for printing statement
#include "dotp4.h" //arrays of data values
#define count 4 //number of data values
short x[count] = {x_array}; //declare 1st array
short y[count] = {y_array}; //declare 2nd array
volatile int result = 0; //result
main()
{
result = dotp4clasmfunc(x,y,count); //call linear ASM func
printf("result = %d decimal \n", result); //print result
}

;Dotp4clasmfunc.sa Linear assembly function to multiply two arrays

.ref _dotp4clasmfunc ;ASM func called from C

_dotp4clasmfunc: .cproc ap,bp,count ;start section linear ASM
.reg a,b,prod,sum ;asm optimizer directive
zero sum ;init sum of products
loop: ldh *ap++,a ;pointer to 1st array->a
ldh *bp++,b ;pointer to 2nd array->b
mpy a,b,prod ;product = a*b
add prod,sum,sum ;sum of products -->sum
sub count,1,count ;decrement counter
[count] b loop ;loop back if count # 0
.return sum ;return sum as result
.endproc
Expt. No: 3.5 FACTORIAL USING C CALLING A LINEAR ASSEMBLY FUNCTION
Date :

PROGRAM:

//Factclasm.c Factorial of number. Calls linear ASM function

#include <stdio.h> //for print statement

void main()
{
short number = 7; //set value
short result; //result of factorial
result = factclasmfunc(number); //call ASM function factlasmfunc
printf("factorial = %d", result); //result from linear ASM function
}

;Factclasmfunc.sa Linear ASM function called from C to find factorial

.ref _factclasmfunc ;Linear ASM func called from C

_factclasmfunc: .cproc number ;start of linear ASM function
.reg a,b ;asm optimizer directive
mv number,b ;setup loop count in b
mv number,a ;move number to a
sub b,1,b ;decrement loop counter
loop: mpy a,b,a ;n(n-1)
sub b,1,b ;decrement loop counter
[b] b loop ;loop back to loop if count #0
.return a ;result to calling function
.endproc ;end of linear ASM function

RESULT:
Thus the Programming examples Using C, Assembly and Linear Assembly is performed
using TMS320C6713 DSP processor and CCS.
Expt. No: 4 IMPLEMENTATION OF MOVING AVERAGE FILTER
Date :

AIM:

To design and implement a moving average filter by using TMS320C6713 DSK & Code
Composer Studio (CCS).

APPARATUS REQUIRED:

➢ Personal Computer (PC)

➢ TMS320C6713 DSP processor kit.
➢ Code Composer Studio (CCS).

PROCEDURE:

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build
THEORY:

The difference equation of the Simple Moving Average filter is derived from the
mathematical definition of the average of N values: the sum of the values divided by the number
of values. In this equation, movAvg is the current output, X[n] is the current input, X[n-1] is the
previous input, etc. N is the length of the average.

movAvg=-x[n]+x[n−1]+...+x[n−N]/(N+1)

N + 1 is the length of the filter

The MA filter perform three important functions:

1) It takes M input points, computes the average of those M-points and produces a single output
point
2) Due to the computation/calculations involved , the filter introduces a definite amount of delay
3) The filter acts as a Low Pass Filter (with poor frequency domain response and a good time
domain response)
PROGRAM:
#include <stdio.h>

int movingAvg(int *ptrArrNumbers, long *ptrSum, int pos, int len, int nextNum)
{
//Subtract the oldest number from the prev sum, add the new number
*ptrSum = *ptrSum - ptrArrNumbers[pos] + nextNum;
//Assign the nextNum to the position in the array
ptrArrNumbers[pos] = nextNum;
//return the average
return *ptrSum / len;
}

int main(int argc, char *argv[])

{
// a sample array of numbers. The represent "readings" from a sensor over time
int sample[] = {50, 10, 20, 18, 20, 100, 18, 10, 13, 500, 50, 40, 10};
// the size of this array represents how many numbers will be used
// to calculate the average
int arrNumbers[5] = {0};

int pos = 0;
int newAvg = 0;
long sum = 0;
int len = sizeof(arrNumbers) / sizeof(int);
int count = sizeof(sample) / sizeof(int);

for(int i = 0; i < count; i++){

newAvg = movingAvg(arrNumbers, &sum, pos, len, sample[i]);
printf("The new average is %d\n", newAvg);
pos++;
if (pos >= len){
pos = 0;
}
}

return 0;
}

RESULT:
Thus the moving average filter is implemented using TMS320C6713 DSK & CCS.
Expt. No: 5 FIR IMPLEMENTATION WITH A PSEUDORANDOM NOISE
SEQUENCE AS INPUT TO A FILTER
Date :

AIM:

To design and implement a FIR filter with a Pseudorandom Noise Sequence as input to a
filter.

APPARATUS REQUIRED:

➢ Personal Computer (PC)

➢ TMS320C6713 DSP processor kit.
➢ Code Composer Studio (CCS).

PROCEDURE:

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build
THEORY:

Finite Impulse Response (FIR) Filter:

The FIR filters are of non-recursive type, where by the present output sample is
depending on the present input sample and previous input samples. The transfer function of a FIR
causal filter is given by,

Where h(n) is the impulse response of the filter.

The Fourier transform of h(n) is

In the design of FIR filters most commonly used approach is using windows. The desired
frequency response Hd(ejw) of a filter is periodic in frequency and can be expanded in Fourier
series.
The resultant series is given by,

And known as Fourier coefficients having infinite length. One possible way of obtaining FIR
filter is to truncate the infinite Fourier series at n = ± [(N-1)/2] Where N is the length of the desired
sequence.
The Fourier coefficients of the filter are modified by multiplying the infinite impulse response
with a finite weighing sequence w(n) called a window.
Where w(n) = w(-n) ≠ 0 for |n| ≤ [(N-1)/2] = 0 for |n| > [(N-1)/2]
After multiplying w(n) with hd(n), we get a finite duration sequence h(n) that satisfies the desired
magnitude response,
h(n) = hd(n) w(n) for |n| ≤ [(N-1)/2] = 0 for |n| > [(N-1)/2]
The frequency response H(ejw) of the filter can be obtained by convolution of Hd(ejw) and
W(ejw) is given by, H(ejw) = Hd(ejw) * W(ejw).
PROGRAM:

//FIRPRN.c FIR with internally generated input noise sequence

#include "DSK6713_AIC23.h" //codec-dsk support file

Uint32 fs=DSK6713_AIC23_FREQ_8KHZ; //set sampling rate
#include "bp55.cof" //BP @ Fs/4 coeff file in float
#include "noise_gen.h" //header file for noise sequence
short dly[N], fb; //delay samples,feedback variable
shift_reg sreg;
short prn(void) //pseudorandom noise generation
{
short prnseq; //for pseudorandom sequence
if(sreg.bt.b0) prnseq = -16000; //scaled negative noise level
else prnseq = 16000; //scaled positive noise level
fb =(sreg.bt.b0)^(sreg.bt.b1); //XOR bits 0,1
fb ^=(sreg.bt.b11)^(sreg.bt.b13); //with bits 11,13 ->fb
sreg.regval<<=1; //shift register 1 bit to left
sreg.bt.b0 = fb; //close feedback path
return prnseq; //return generated sequence
}
interrupt void c_int11() //ISR
{
int i, yn = 0; //initialize filter's output
dly[0] = prn(); //input noise sequence
for (i = 0; i< N; i++)
yn +=(h[i]*dly[i]); //y(n)+= h(i)*x(n-i)
for (i = N-1; i > 0; i--) //start @ bottom of buffer
dly[i] = dly[i-1]; //data move to update delays
output_sample((short)yn); //output filter
return; //return from interrupt
}
void main()
{
short i;
sreg.regval = 0xFFFF; //shift register to nominal values
fb = 1; //initial feedback value
for (i = 0; i<N; i++)
dly[i] = 0; //init buffer
comm_intr(); //init DSK, codec, McBSP
while(1); //infinite loop
}
//bp55.cof Coefficients for FIR bandpass filter centered @ Fs/4

#define N 55 //number of coefficients

float h[N]=
{1.7619E-017, 7.0567E-003, 2.2150E-018,-1.0962E-002, 4.0310E-017,
1.3946E-002, 7.1787E-018,-1.4588E-002, 3.9928E-017, 1.1474E-002,
5.9881E-018,-3.5159E-003,-6.6174E-018,-9.7476E-003,-1.7919E-017,
2.7932E-002,-9.4329E-017,-4.9740E-002, 3.3834E-017, 7.3066E-002,
-3.6228E-017,-9.5284E-002, 3.2194E-017, 1.1365E-001,-2.2165E-017,
-1.2576E-001, 7.8980E-018, 1.3000E-001, 7.8980E-018,-1.2576E-001,
-2.2165E-017, 1.1365E-001, 3.2194E-017,-9.5284E-002,-3.6228E-017,
7.3066E-002, 3.3834E-017,-4.9740E-002,-9.4329E-017, 2.7932E-002,
-1.7919E-017,-9.7476E-003,-6.6174E-018,-3.5159E-003, 5.9881E-018,
1.1474E-002, 3.9928E-017,-1.4588E-002, 7.1787E-018, 1.3946E-002,
4.0310E-017,-1.0962E-002, 2.2150E-018, 7.0567E-003, 1.7619E-017};

OUTPUT FREQUENCY RESPONSE

RESULT:
Thus the FIR filter with a Pseudorandom Noise Sequence as input to a filter is
designed and implemented using TMS320C6713 DSK & CCS.
Expt. No: 6 FIXED POINT IMPLEMENTATION OF IIR FILTER
Date :

AIM:

To design and implement a Fixed Point IIR filter by using Code Composer Studio.

APPARATUS REQUIRED:

➢ Personal Computer (PC)

➢ TMS320C6713 DSP processor kit.
➢ Code Composer Studio (CCS).

PROCEDURE:

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build
THEORY:

The filters designed by considering all the infinite samples of impulse response are
called IIR filters. The impulse response is obtained by taking inverse Fourier Transform of ideal
frequency response. The popular methods for such filter design use the technique of transforming
the analog filter to an equivalent digital filter. We know that the analog filter with transfer function
Ha(s) is stable if all its poles lie in the left half of the s-plane. Consequently, if the conversion
technique is to be effective, it should possess the following desirable properties.

1. The imaginary axis in the s-plane should map into the unit circle in the z-plane .Thus there
will be a direct relationship between the two frequency variables in the two domains.
2. The left half of the s-plane should map into the interior of the unit circle in the z- plane.
Thus a suitable analog filter will be converted to a stable digital filter

The IIR filter is a discrete time system that is designed to pass the spectral content of the input
signal in a specified band of frequencies. Based on the frequency response the filters are classified
into four types. They are Low pass; High pass, Band pass, and Band stop filters. A number of
solutions to the approximation problem of analog filter design are well developed. The popular
among them are Butterworth and Chebyshev approximation. For designing a digital IIR filter, first
an equivalent analog filter is designed using any one of the approximation technique and the given
specifications. The result of the analog filter design will be an analog filter transfer function Ha(s)
.The analog transfer function is converted to digital transfer function H(z) using either Bilinear or
Impulse invariant transformation . The digital transfer function H(z) can be realized in a software
that runs on a digital hardware (or it can be implemented in firmware).

PROGRAM:

//IIR.c IIR filter using cascaded Direct Form II

#include "DSK6713_AIC23.h" //codec-DSK support file

Uint32 fs=DSK6713_AIC23_FREQ_8KHZ; //set sampling rate
#include "bs1750.cof" //BS @ 1750 Hz coefficient file
short dly[stages][2] = {0}; //delay samples per stage
interrupt void c_int11() //ISR
{
short i, input;
int un, yn;
input = input_sample(); //input to 1st stage
for (i = 0; i < stages; i++) //repeat for each stage
{
un=input-((b[i][0]*dly[i][0])>>15) - ((b[i][1]*dly[i][1])>>15);
yn=((a[i][0]*un)>>15)+((a[i][1]*dly[i][0])>>15)+((a[i][2]*dly[i][1])>>15);
dly[i][1] = dly[i][0]; //update delays
dly[i][0] = un; //update delays
input = yn; //intermed out->in to next stage
output_sample((short)yn); //output final result for time n
return; //return from ISR
}
void main()
{
comm_intr(); //init DSK, codec, McBSP
while(1); //infinite loop
}

//bs1750.cof IIR bandstop coefficient file, centered at 1,750 Hz

#define stages 5 //number of 2nd-order stages

int a[stages][3]= { //numerator coefficients
{27940, -10910, 27940}, //a10, a11, a12 for 1st stage
{32768, -11841, 32768}, //a20, a21, a22 for 2nd stage
{32768, -13744, 32768}, //a30, a31, a32 for 3rd stage
{32768, -11338, 32768}, //a40, a41, a42 for 4th stage
{32768, -14239, 32768} };
int b[stages][2]= { //denominator coefficients
{-11417, 25710}, //b11, b12 for 1st stage
{-9204, 31581}, //b21, b22 for 2nd stage
{-15860, 31605}, //b31, b32 for 3rd stage
{-10221, 32581}, //b41, b42 for 4th stage
{-15258, 32584} } ; //b51, b52 for 5th stage

RESULT:
Thus the Fixed Point IIR filter is designed and implemented using TMS320C6713
DSK & CCS.
Expt. No: 7 FFT OF REAL-TIME INPUT SIGNAL
Date :

AIM:

To compute the FFT of real-time input signal by using Code Composer Studio.

APPARATUS REQUIRED:

➢ Personal Computer (PC)

➢ TMS320C6713 DSP processor kit.
➢ Code Composer Studio (CCS).

PROCEDURE:

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build
THEORY:

DFT of a sequence

Where N= Length of sequence.

K= Frequency Coefficient.
n = Samples in time domain.

There are two methods.

1. Decimation in time (DIT ) FFT.
2. Decimation in Frequency (DIF) FFT.

For DFT
The no of multiplications in DFT = N2.
The no of Additions in DFT = N (N-1).

For FFT.
The no of multiplication = N/2 log 2N.
The no of additions = N log2 N.

FFT ALGORITHM

The FFT has a fairly easy algorithm to implement, and it is shown step by step in the list below.
This version of the FFT is the Decimation in Time Method
1. Pad input sequence, of N samples, with Zero’s until the number of samples is the nearest power
of two. e.g. 500 samples are padded to 512 (2^9)
2. Bit reverse the input sequence. e.g. 3 = 011 goes to 110 = 6
3. Compute (N / 2) two sample DFT's from the shuffled inputs. See "Shuffled Inputs"
4. Compute (N / 4) four sample DFT's from the two sample DFT's. See "Shuffled Inputs"
5. Compute (N / 2) eight sample DFT's from the four sample DFT's. See "Shuffled Inputs"
6. Until the all the samples combine into one N-sample DFT
PROGRAM:

//FFT256c.c FFT implementation calling a C-coded FFT function

#include "dsk6713_aic23.h"
Uint32 fs=DSK6713_AIC23_FREQ_8KHZ;
#include <math.h>
#define PTS 256 //# of points for FFT
#define PI 3.14159265358979
typedef struct {float real,imag;} COMPLEX;
void FFT(COMPLEX *Y, int n); //FFT prototype
float iobuffer[PTS]; //as input and output buffer
float x1[PTS]; //intermediate buffer
short i; //general purpose index variable
short buffercount = 0; //number of new samples in iobuffer
short flag = 0; //set to 1 by ISR when iobuffer full
COMPLEX w[PTS]; //twiddle constants stored in w
COMPLEX samples[PTS]; //primary working buffer
main()
{
for (i = 0 ; i<PTS ; i++) // set up twiddle constants in w
{
w[i].real = cos(2*PI*i/512.0); //Re component of twiddle constants
w[i].imag =-sin(2*PI*i/512.0); //Im component of twiddle constants
}
comm_intr(); //init DSK, codec, McBSP
while(1) //infinite loop
{
while (flag == 0) ; //wait until iobuffer is full
flag = 0; //reset flag
for (i = 0 ; i < PTS ; i++) //swap buffers
{
samples[i].real=iobuffer[i]; //buffer with new data
iobuffer[i] = x1[i]; //processed frame to iobuffer
}
for (i = 0 ; i < PTS ; i++)
samples[i].imag = 0.0; //imag components = 0
FFT(samples,PTS); //call function FFT.c
for (i = 0 ; i < PTS ; i++) //compute magnitude
{
x1[i] = sqrt(samples[i].real*samples[i].real
+ samples[i].imag*samples[i].imag)/16;
}
x1[0] = 32000.0; //negative spike for reference
} //end of infinite loop
} //end of main
interrupt void c_int11() //ISR
{
output_sample((short)(iobuffer[buffercount])); //output from iobuffer
iobuffer[buffercount++]=(float)((short)input_sample()); //input>iobuffer
if (buffercount >= PTS) //if iobuffer full
{
buffercount = 0; //reinit buffercount
flag = 1; //set flag
}
}

TIME-DOMAIN PLOT:

RESULT:
Thus the FFT of real-time input signal is implemented using CCS.
Expt. No: 8 IMPLEMENTATION OF LINEAR CONVOLUTION
Date :

AIM:

To compute Linear Convolution by using Code Composer Studio.

APPARATUS REQUIRED:

➢ Personal Computer (PC)

➢ TMS320C6713 DSP processor kit.
➢ Code Composer Studio (CCS).

PROCEDURE:

To Create New Project:

Project--->New Project Name : Proj
Location : C:\Ccs
Project Type : Executable
Target : Tms32067xx & Then Click Finish
To Create New Source File:
File -----> New --- >Source File
And Then Type C Program And Save The File In Your Project With '.C' Extension
To Add Source File To The Project:
Project----> Add Files To The Project -- >Open Your Respective File & Then Click Open
To Add Command & Linkage Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\Tutorials\Dsk6713\Hello1\Select
File Type As Linker Command File
To Add Library Files:
Project----> Add Files To The Project -- >C:\Ccstudio-V3.1\C6000\Cgtools\Lib\Rts6700.Lib
To Compile:
Project --->Compile File
To Build A Link:
Project---- > Build
PROGRAM:

#include<stdio.h>
main()
{
int m=6; /*Length of i/p samples sequence*/
int n=6; /*Length of impulse response Co-efficients */
inti=0,j;
int x[15]={1,2,3,4,5,6,0,0,0,0,0,0}; /*Input Signal Samples*/
int h[15]={1,2,3,4,5,6,0,0,0,0,0,0}; /*Impulse Response Co-efficients*/
int y[20];
for(i=0;i<m+n-1;i++)
{
y[i]=0;
for(j=0;j<=i;j++)
y[i]+=x[j]*h[i-j];
}
for(i=0;i<m+n-1;i++)
printf("%d\n",y[i]);
}

RESULT:
Thus the Linear Convolution is implemented using CCS.