Memory Organization

Irfan Rasool
 Introduction to Memory
Memory is a storage device used to store program instructions, data, and results.
Two primary types of memory in computer systems:
● Semiconductor Memories:
○ Characteristics:
■ Faster access time, smaller physical size, lighter, and consumes less power.
○ Usage: Used as the main memory (RAM) in modern computers.
● Magnetic Memories:
○ Characteristics:
■ Slower access time but cheaper compared to semiconductor memories.
○ Usage: Employed as secondary memory (e.g., hard drives) for bulk data storage.

Trend: Semiconductor memories dominate due to advances in technology.

 Memory Structure
● Memory can store N words, each consisting of m bits. This is referred to as N x m memory.
○ Example:
■ 8x4 memory: This configuration has 8 memory locations (words) where each word contains 4 bits
(nibble).
■ The 8 words are stored at unique addresses (0-7).
● Memory Addressing:
○ Each memory location is assigned a unique address.
○ Example: In an 8x4 memory, the 8 memory locations are identified by the addresses 000 to 111
(binary), or 0 to 7 (decimal).
 Address Bus and Memory Addressing
● Address Bus:
○ The address bus is a set of wires through which the memory address is sent from the
microprocessor to the memory.
○ It is unidirectional, meaning the microprocessor sends the addresses but does not receive
anything back via this bus.
○ In a memory with 8 locations, 3 address lines are used, labeled A2, A1, A0.
● Formula for Number of Address Lines:
○ To address N memory locations, we need k address lines, where k satisfies the condition:
2k≥N
○ Example: For 200 memory locations, we need 8 address lines (since 28= 256 covers 200
locations).
 Address Bus and Memory Addressing
Memory Capacity

● The capacity of a memory is calculated based on the number of bits and address lines.
○ k-bit address and m-bit word configuration means:
■ Total memory capacity = 2k×m bits.
● Example:
○ Intel 8085A Microprocessor has 16 address lines, allowing it to address 216 memory locations.
○ 216= 65536 memory locations, which is referred to as 64K memory locations.
○ Memory addresses range from 0000H to FFFFH in hexadecimal.
 Semiconductor Memory Development
● Basic Unit: The smallest unit of information is the bit (0 or 1).
● Flip-Flop:
○ A flip-flop is an electronic circuit that stores a single bit of data. It has two stable states: 0 and 1.
○ D-Type Flip-Flop:
■ Inputs: Data input (D) and clock input (CLK).
■ Outputs: The stored bit (Q) and its complement (Q’).
■ Flip-flops are commonly used to store bits in memory devices.

D-Type Flip-Flop Operation

● D-Type Flip-Flop Behavior:

○ The output Q follows the input D whenever a clock pulse is applied.
○ Characteristic Equation:
Qn+1=Dn
■ The output Q after the clock pulse is equal to the input D before the clock pulse.
● Clock Pulse: The flip-flop only changes its state based on the clock pulse, storing the input value at
the precise moment of the clock’s transition.
Semiconductor Memory Development
 Semiconductor Memory Development
Edge-Triggered Flip-Flop

● Edge-Triggered Flip-Flop:
○ These flip-flops change state during transitions of the clock signal, either on the rising edge (0 →
1 transition) or the falling edge (1 → 0 transition).
○ Types:
■ Positive Edge Triggered: Responds to the rising edge of the clock.
■ Negative Edge Triggered: Responds to the falling edge of the clock.

Level-Triggered Flip-Flop

● Level-Triggered Flip-Flop (Latch):

○ Unlike edge-triggered flip-flops, level-triggered flip-flops follow the input value as long as the clock
is in the triggering state (high or low).
○ Positive Level Triggered:
■ When the clock is high, the output follows the input.
○ Negative Level Triggered:
■ When the clock is low, the output follows the input.
● Transparent Mode: When the clock is at the triggering level, the flip-flop is said to be in "transparent
mode," allowing the input to pass directly to the output.
Semiconductor Memory Development
 Control Signals: Preset and Clear
Control Signals: Preset and Clear

● Preset (PR̅) and Clear (CR̅):

○ These are asynchronous control inputs, meaning they can change the state of the flip-flop
regardless of the clock.
○ Both signals are active low:
■ PR̅: Sets the flip-flop to 1.
■ CR̅: Clears the flip-flop to 0.
○ They override the clock and other synchronous inputs, ensuring the flip-flop reaches the desired
state immediately when activated.
 Latch Example: 74LS373 and Intel 8282
● Octal Latches:
○ 74LS373 and Intel 8282 are examples of
octal (8-bit) latches that store 8 bits of
data.
 m-Bit Register
● D Flip-Flop:
○ Simplest form of flip-flop used to store one bit of information.
○ Stores input data on the active edge of the clock.
● m-Bit Register:
○ Multiple D flip-flops are connected in parallel to form a register.
○ m-Bit Register stores m bits of data (where m can be 4, 6, 8, etc.).
○ A write operation stores data in the register, and a read operation retrieves it.
 Write and Read Operations in Registers
● Write Operation:
○ Data is written into the register when clocked.
○ The data inputs are m-bits wide (D0 to Dm-1).
● Read Operation:
○ Data is read from the register via its outputs (Q0 to Qm-1).
○ Data stored in a register is called a word, and word length refers to the number of bits in that word.
● Data Bus:
○ An m-bit data bus is used to transfer data between the registers and the processor.
○ 8-bit registers are commonly referred to as octal registers.

Memory as a Collection of Registers

● Multiple Registers in IC:

○ Several registers can be grouped into a single IC, sharing common data inputs and a single clock
signal.
○ Memory can be thought of as a collection of addressable registers, each with a unique address.
● Address Decoding:
○ Address decoder logic is used to select a single register for data read/write operations.
○ Only one register is active during a write or read operation, determined by the decoded address.
 Development of a Memory Chip
● Example: 16 x 8 Memory:
○ A memory system with 16
memory locations, each storing
8 bits of data.
○ Address lines: 4 address lines
(A3, A2, A1, A0) are needed to
access 16 unique addresses
(0000 to 1111 in binary).
● Flip-Flop Registers:
○ To implement the 16 x 8 memory,
16 octal (8-bit) D flip-flop
registers are used.
○ Data is written into these
registers via the data bus using
74LS374 D flip-flop ICs.
 Address Decoding using 74LS154 Decoder
● 4-to-16 Line Decoder (74LS154):
○ Decodes the 4-bit address to select
one of the 16 memory locations.
○ The WRITE signal enables the
decoder, allowing data to be written
into the selected register.
● WRITE Operation:
○ Data from the data bus is latched
into the selected memory location
on the low-to-high transition of
the WRITE signal.
● Timing Considerations:
○ Timing of the address and data lines
is critical for proper operation.
○ The address and data must be set
before the low-to-high edge of the
WRITE signal (setup time, ts).
 Memory Write Operation Timing
● Timing Diagram:
○ Shows the relationship between address setup, data bus, and the WRITE signal.
○ Address and data lines must remain valid for some time before and after the WRITE signal
transitions.
● Propagation Delay (tp):
○ After the WRITE operation, the data appears on the output (Q0 to Q7) after a propagation delay
(tp).

Combining Outputs for Memory Read

● Output Data Bus:

○ The outputs (Q0 to Q7) of the 16 memory registers are combined to form a common output data
bus.
○ Bus Contention must be avoided, which happens when multiple registers try to output data
simultaneously.
● Enabling Outputs:
○ Only one register’s output is enabled at a time using the OE pin and a decoder to avoid conflicts
on the output bus.
Memory Write Operation Timing
 Memory Read Operation
READ Signal:
• Instead of the WRITE signal, a READ
signal is used to select the appropriate
memory location for a read operation.
• The selected register places its data on
the output data bus.

High-Z State:
• When the READ signal becomes
inactive, the output bus goes into a
high-impedance (high-Z) state,
ensuring no unwanted data is outputted.
 Bidirectional Data Bus and Chip Enable
● Bidirectional Data Bus:
○ Memory systems often use a single bidirectional
data bus for both reading and writing data.
○ At any instant, either data is written to or read from
memory, but not both.
● Chip Enable (CE):
○ Memory systems can contain multiple memory
chips.
○ The CE (chip enable) signal selects which
memory chip is active for a read or write
operation.

Complete Memory Read-Write System

● Schematic of 16x8 Memory System:

○ Shows the complete design with address lines,
data buses, and control signals (READ, WRITE,
CE).
○ Each memory location is individually selected via
the address decoder, and data is written/read
using the bidirectional bus.
● Commercial Memory Chips:
○ In practical systems, all decoding and storage
elements are combined in a single integrated
memory chip for efficient operation.