Module 2 - BJT AC Analysis

BJT modeling, re transistor model: Common Emitter fixed Configuration, Voltage-Divider Bias, CE
Emitter-Bias Configuration (Excluding P-spice Analysis), Emitter Follower Configuration,
Cascaded Systems. The Hybrid Equivalent model, Approximate Hybrid Equivalent Circuit, Fixed
bias configuration, Voltage-Divider configuration. Hybrid Model.
• Introduction
• The basic construction, appearance, and characteristics of the transistor and dc
biasing of the device have already been discussed.
• We now begin to examine the ac response of the BJT amplifier by reviewing the
models most frequently used to represent the transistor in the sinusoidal ac
domain.
• One of our first concerns in the sinusoidal ac analysis of transistor networks is the
magnitude of the input signal.
• It will determine whether small-signal or large-signal techniques should be
applied.
• There is no set dividing line between the two, but the application and the
magnitude of the variables of interest relative to the scales of the device
characteristics will usually make it quite clear which method is appropriate.
• The small-signal technique is introduced in this chapter.
• There are three models commonly used in the small-signal ac analysis of
transistor networks:
• the re model,
• the hybrid π model, and
• the hybrid equivalent model.
• We emphasize the re model.
• It was demonstrated that the transistor can be employed as an amplifying
device. That is, the output sinusoidal signal is greater than the input
sinusoidal signal, or, stated another way, the output ac power is greater
than the input ac power.
• The question then arises as to how the ac power output can be greater
than the input ac power.
• Conservation of energy dictates that over time the total power output, Po ,
of a system cannot be greater than its power input, Pi , and that the
efficiency defined by η = Po/Pi cannot be greater than 1.
• The factor missing from the discussion above that permits an ac power
output greater than the input ac power is the applied dc power.
• It is the principal contributor to the total output power even though part of it
is dissipated by the device and resistive elements.
• In other words, there is an “exchange” of dc power to the ac domain that
permits establishing a higher output ac power.
• In fact, a conversion efficiency is defined by η = Po(ac)/Pi(dc), where Po(ac) is
the ac power to the load and Pi(dc) is the dc power supplied.
• Perhaps the role of the dc supply can best be
described by first considering the simple dc
network of Fig. 5.1 .
• The resulting direction of flow is indicated in
the figure with a plot of the current i versus
time. Let us now insert a control mechanism
such as that shown in Fig. 5.2 .
• The control mechanism is such that the
application of a relatively small signal to the
control mechanism can result in a substantial
oscillation in the output circuit.
• One can make a complete dc analysis of a
system before considering the ac response.
• Once the dc analysis is complete, the ac
response can be determined using a
completely ac analysis.
• It happens, however, that one of the
components appearing in the ac analysis of
BJT networks will be determined by the dc
conditions, so there is still an important link
between the two types of analysis.
• BJT TRANSISTOR MODELING
• A model is a combination of circuit elements, properly chosen, that
best approximates the actual behavior of a semiconductor device
under specific operating conditions.
• Once the ac equivalent circuit is determined, the schematic symbol for the
device can be replaced by this equivalent circuit and the basic methods of
circuit analysis applied to determine the desired quantities of the network.
• In the formative years of transistor network analysis the hybrid equivalent
network was employed the most frequently.
• Specification sheets included the parameters in their listing, and analysis
was simply a matter of inserting the equivalent circuit with the listed
values.
• The drawback to using this equivalent circuit, however, is that it is defined
for a set of operating conditions that might not match the actual operating
conditions.
• In most cases, this is not a serious flaw because the actual operating
conditions are relatively close to the chosen operating conditions on the
data sheets.
• In addition, there is always a variation in actual resistor values and given
• In time the use of the re model became the more
desirable approach because an important parameter of
the equivalent circuit was determined by the actual
operating conditions rather than using a data sheet
value that in some cases could be quite different.
• Unfortunately, however, one must still turn to the data
sheets for some of the other parameters of the
equivalent circuit.
• The re model also failed to include a feedback term,
which in some cases can be important if not simply
troublesome.
• The re model is really a reduced version of the hybrid pi
model used almost exclusively for high-frequency
analysis.
• This model also includes a connection between output
and input to include the feedback effect of the output
voltage and the input quantities.
• In an effort to demonstrate the effect that the ac
equivalent circuit will have on the analysis to follow,
• Let us assume for the moment that the small-signal ac
equivalent circuit for the transistor has already been
determined.
• Because we are interested only in the ac response of the
circuit, all the dc supplies can be replaced by a zero-potential
equivalent (short circuit) because they determine only the dc
(quiescent level) of the output voltage and not the magnitude
of the swing of the ac output.
• This is clearly demonstrated by Fig. 5.4 . The dc levels were
simply important for determining the proper Q -point of
operation.
• Once determined, the dc levels can be ignored in the ac
analysis of the network. In addition, the coupling capacitors C1
and C2 and bypass capacitor C3 were chosen to have a very
small reactance at the frequency of application.
• Therefore, they, too, may for all practical purposes be replaced
by a low-resistance path or a short circuit.
• Note that this will result in the “shorting out” of the dc biasing
resistor RE .
• We can recall that capacitors assume an “open-circuit”
equivalent under dc steady-state conditions, permitting an
isolation between stages for the dc levels and quiescent
conditions.
• It is important as we progress through the modifications of the network to define
the ac equivalent that the parameters of interest such as Zi, Zo, Ii, and Io as
defined by Fig. 5.5 be carried through properly.
• Even though the network appearance may change, we want to be sure the
quantities we find in the reduced network are the same as defined by the original
network.
• In both networks the input impedance is defined from base to ground, the input
current as the base current of the transistor, the output voltage as the voltage
from collector to ground, and the output current as the current through the load
resistor RC .
• The parameters of Fig. 5.5 can be applied to any system whether it
has one or a thousand components.
• For all the analysis to follow in this text, the directions of the currents,
the polarities of the voltages, and the direction of interest for the
impedance levels are as appearing in Fig. 5.5 .
• In other words, the input current Ii and output current Io are, by
definition, defined to enter the system.
• If, in a particular example, the output current is leaving the system
rather than entering the system as shown in Fig. 5.5 , a minus sign
must be applied.
• The defined polarities for the input and output voltages are also as
appearing in Fig. 5.5 .
• If Vo has the opposite polarity, the minus sign must be applied.
• Note that Zi is the impedance “looking into” the system, whereas Zo is
the impedance “looking back into” the system from the output side.
• By choosing the defined directions for the currents and voltages as
appearing in Fig. 5.5 , both the input impedance and output
impedance are defined as having positive values.
• For example, in Fig. 5.6 the input and output impedances for a
particular system are both resistive.
• For the direction of Ii and Io the resulting voltage across the resistive
elements will have the same polarity as Vi and Vo , respectively.
• If Io had been defined as the opposite direction in Fig. 5.5 a minus sign
would have to be applied.
• For each case Zi = Vi/Ii and Zo = Vo/Io with positive results if they all
have the defined directions and polarity of Fig. 5.5 .
• If the output current of an actual system has a direction opposite to
that of Fig. 5.5 a minus sign must be applied to the result because Vo
must be defined as appearing in Fig. 5.5 .
• If we establish a common
ground and rearrange the
elements of Fig. 5.4 , R1
and R2 will be in parallel,
and RC will appear from
collector to emitter as
shown in Fig. 5.7 .
• Because the components
of the transistor equivalent
circuit appearing in Fig. 5.7
employ familiar
components such as
resistors and independent
controlled sources,
analysis techniques such as
superposition, Thévenin’s
theorem, and so on, can
be applied to determine
the desired quantities.
• Let us further examine Fig. 5.7 and identify the important quantities to be
determined for the system.
• Because we know that the transistor is an amplifying device, we would
expect some indication of how the output voltage Vo is related to the input
voltage Vi —the voltage gain.
• Note in Fig. 5.7 for this configuration that the current gain is defined by
• Ai = Io/Ii.

• In summary, therefore, the ac equivalent of a transistor network is

obtained by:
• Setting all dc sources to zero and replacing them by a short-circuit
equivalent
• Replacing all capacitors by a short-circuit equivalent
• Removing all elements bypassed by the short-circuit equivalents
introduced by steps 1 and 2
• Redrawing the network in a more convenient and logical form
• THE re TRANSISTOR MODEL

• COMMON-EMITTER FIXED-BIAS CONFIGURATION

• The transistor models just introduced will now be used to perform a small-
signal ac analysis of a number of standard transistor network configurations.
• The networks analyzed represent the majority of those appearing in practice.
• Modifications of the standard configurations will be relatively easy to examine
once the content of this chapter is reviewed and understood.
• For each configuration, the effect of an output impedance is examined for
completeness.
• The first configuration to be analyzed in detail is the common-
emitter fixed-bias network of Fig. 5.20 .
• Note that the input signal Vi is applied to the base of
the transistor, whereas the output Vo is off the
collector.
• In addition, recognize that the input current Ii is not
the base current, but the source current, and the
output current Io is the collector current.
• The small-signal ac analysis begins by removing the
dc effects of VCC and replacing the dc blocking
capacitors C1 and C2 by short-circuit equivalents,
resulting in the network of Fig. 5.21 .
• Note in Fig. 5.21 that the common ground of the dc
supply and the transistor emitter terminal permits
the relocation of RB and RC in parallel with the input
and output sections of the transistor, respectively.
• In addition, note the placement of the important
network parameters Zi , Zo , Ii , and Io on the redrawn
network.
• Substituting the re model for the common-emitter configuration of Fig. 5.21
results in the network of Fig. 5.22 .
• The next step is to determine β, re , and ro .
• The magnitude of β is typically obtained from a specification sheet or by direct
measurement using a curve tracer or transistor testing instrument.
• The value of re must be determined from a dc analysis of the system, and the
magnitude of ro is typically obtained from the specification sheet or
characteristics.
• Assuming that β, re , and ro have been determined will result in the following
equations for the important two-port characteristics of the system.
• Zi Figure 5.22 clearly shows that

• For the majority of situations RB is greater than βre by more than a

factor of 10, permitting the following approximation:

• Zo Recall that the output impedance of any system is defined as the

impedance Zo determined when Vi = 0.
• For Fig. 5.22 , when Vi = 0, Ii = Ib = 0, resulting in an open circuit
equivalence for the current source. The result is the configuration of
Fig. 5.23 . We have
• If ro ≥10RC, the approximation RC ||ro RC is frequently applied, and

• Av The resistors ro and RC are in parallel, and

-----Eqn 5.9
• If ro ≥10RC, so that the effect of ro can be ignored,

------Eqn 5.10
• Note the explicit absence of β in Eqs. (5.9) and (5.10), although we
recognize that β must be utilized to determine re .
• Phase Relationship
• The negative sign in the resulting equation for Av reveals that a 180°
phase shift occurs between the input and output signals, as shown in
Fig. 5.24 .
• VOLTAGE-DIVIDER BIAS
• The next configuration to be analyzed is the voltage-divider bias network of
Fig. 5.26 .
• Recall that the name of the configuration is a result of the voltage-divider
bias at the input side to determine the dc level of VB .
• Substituting the re equivalent circuit results in the network of Fig. 5.27 .
• Note the absence of RE due to the low-impedance shorting effect of the
bypass capacitor, CE .
• That is, at the frequency (or frequencies) of operation, the reactance of the
capacitor is so small compared to RE that it is treated as a short circuit
across RE .
• When VCC is set to zero, it places one end of R1 and RC at ground potential
as shown in Fig. 5.27 .
• In addition, note that R1 and R2 remain part of the input circuit, whereas RC
is part of the output circuit.
• The parallel combination of R1 and R2 is defined by
• Zi From Fig. 5.27
• From Fig. 5.27 with Vi set to 0 V, resulting in Ib = 0 mA and βIb = 0 mA,

• If

• Av Because RC and ro are in parallel,

• which you will note is an exact duplicate of the equation obtained for
the fixed-bias configuration.
• For
• Phase Relationship
• The negative sign of Eq. (5.15) reveals a 180° phase shift between Vo
and Vi .
• CE EMITTER-BIAS CONFIGURATION
• The networks examined in this section include an emitter resistor that
may or may not be bypassed in the ac domain.
• We first consider the unbypassed situation and then modify the
resulting equations for the bypassed configuration.
• Unbypassed
• The most fundamental of unbypassed configurations appears in Fig.
5.29 . The re equivalent model is substituted in Fig. 5.30 , but note the
absence of the resistance ro .
• The effect of ro is to make the analysis a great deal more complicated,
and considering the fact that in most situations its effect can be
ignored, it will not be included in the present analysis.
• Applying Kirchhoff’s voltage law to the input
side of Fig. 5.30 results in

• and the input impedance looking into the

network to the right of RB is

• The result as displayed in Fig. 5.31 reveals

that the input impedance of a transistor with
an unbypassed resistor RE is determined by

• Because β is normally much greater than 1,

the approximate equation is
• Because RE is usually greater than re , Eq. (5.18) can be further
reduced to

• Zi Returning to Fig. 5.30 , we have

• Zo With Vi set to zero, Ib = 0, and βIb can be replaced by an open-

circuit equivalent. The result is

• Av

-----Eqn 5.22
• Substituting Zb β(re + RE) gives

• and for the approximation Zb βRE,

• Note the absence of β from the equation for Av demonstrating an

independence in variation of β.

• Phase Relationship
• The negative sign in Eq. (5.22) again reveals a 180° phase shift
between Vo and Vi .
• Effect of ro
• The equations appearing below will clearly reveal the additional
complexity resulting from including ro in the analysis.
• Note in each case, however, that when certain conditions are met,
the equations return to the form just derived.
• The derivation of each equation is beyond the needs.
• Each equation can be derived through careful application of the basic
laws of circuit analysis such as Kirchhoff’s voltage and current laws,
source conversions, Thévenin’s theorem, and so on.
• The equations were included to remove the nagging question of the
effect of ro on the important parameters of a transistor configuration.
• Zi

• Because the ratio RC/ro is always much less than (β + 1),

• For ro ≥ 10(RC + RE),

• which compares directly with Eq. (5.17).
• In other words, if ro ≥ 10(RC + RE), all the equations derived earlier
result. Because β + 1 = β, the following equation is an excellent one
for most applications:
• Zo
• Av
• Bypassed
• If RE of Fig. 5.29 is bypassed by an emitter capacitor CE , the complete
re equivalent model can be substituted, resulting in the same
equivalent network as Fig. 5.22 .
• Equations (5.5) to (5.10) are therefore applicable.
• EMITTER-FOLLOWER CONFIGURATION
• When the output is taken from the emitter terminal of the transistor
as shown in Fig. 5.36 , the network is referred to as an emitter-
follower.
• The output voltage is always slightly less than the input signal due to
the drop from base to emitter, but the approximation Av 1 is usually
a good one.
• Unlike the collector voltage, the emitter voltage is in phase with the
signal Vi .
• That is, both Vo and Vi attain their positive and negative peak values
at the same time.
• The fact that Vo “follows” the magnitude of Vi with an in-phase
relationship accounts for the terminology emitter-follower.
• The most common emitter-follower configuration appears in Fig. 5.36
• In fact, because the collector is grounded for ac analysis, it is actually
a common-collector configuration.
• Other variations of Fig. 5.36 that draw the output off the emitter with
Vo Vi will appear later in this section.
• The emitter-follower configuration is frequently used for impedance-
matching purposes.
• It presents a high impedance at the input and a low impedance at the
output, which is the direct opposite of the standard fixed-bias
configuration.
• The resulting effect is much the same as that obtained with a
transformer, where a load is matched to the source impedance for
maximum power transfer through the system.
• Substituting the re equivalent circuit into the network of Fig. 5.36
results in the network of Fig. 5.37 .
• The effect of ro will be examined later in the section.
• Zi
• The input impedance is determined in the same manner as described
in the preceding section:

• Z o The output impedance is best described by first writing the

equation for the current Ib ,
• If we now construct the network defined by Eq. (5.35), the
configuration of Fig. 5.38 results.
• To determine Zo , Vi is set to zero and
• Because RE is typically much greater than re , the following
approximation is often applied:

• Av
• Figure 5.38 can be used to determine the voltage gain through an
application of the voltage-divider rule:

• Because RE is usually much greater than re , RE + re RE and

• Phase Relationship As revealed by Eq. (5.38) and earlier discussions
of this section, Vo and Vi are in phase for the emitter-follower
configuration.

• Effect of ro
• Zi
• Zo

• Av
• In general, therefore, even though the
condition ro ≥10RE is not satisfied, the results
for Zo and Av are the same, with Zi only slightly
less.
• The results suggest that for most applications
a good approximation for the actual results
can be obtained by simply ignoring the effects
of ro for this configuration.
• The network of Fig. 5.40 is a variation of the
network of Fig. 5.36 , which employs a
voltage-divider input section to set the bias
conditions. Equations (5.31) to (5.34) are
changed only by replacing RB by R’ = R1||R2.
• The network of Fig. 5.41 also provides
the input/output characteristics of an
emitter-follower, but includes a
collector resistor RC .
• In this case RB is again replaced by the
parallel combination of R1 and R2 .
• The input impedance Zi and output
impedance Zo are unaffected by RC
because it is not reflected into the
base or emitter equivalent networks.
• In fact, the only effect of RC is to
determine the Q -point of operation.
• CASCADED SYSTEMS
• The two-port systems approach is particularly useful for cascaded
systems such as that appearing in Fig. 5.67 , where Av1, Av2, Av3, and so
on, are the voltage gains of each stage under loaded conditions.
• That is, Av1 is determined with the input impedance to Av2 acting as
the load on Av1.
• For Av2, Av1 will determine the signal strength and source impedance
at the input to Av2.
• The total gain of the system is then determined by the product of the
individual gains as follows:

• and the total current gain is given by

• No matter how perfect the system design, the application of a
succeeding stage or load to a two-port system will affect the voltage
gain.
• Therefore, there is no possibility of a situation where Av1, Av2, and so
on, of Fig. 5.67 are simply the no-load values.
• The no-load parameters can be used to determine the loaded gains of
each stage, but voltage gain Eq. requires the loaded values.
• The load on stage 1 is Zi2, on stage 2 Zi3, on stage 3 Zin, and so on.
 Reference

Vs – Source voltage
• Note, however, that it is also important that the output impedance of
the first stage is relatively close to the input impedance of the second
stage, otherwise the signal would have been “lost” again by the
voltage-divider action.
• THE HYBRID EQUIVALENT MODEL
• The hybrid equivalent model was mentioned in the earlier sections of this
chapter as one that was used in the early years before the popularity of the
re model developed.
• Today there is a mix of usage depending on the level and direction of the
investigation.
• The re model has the advantage that the parameters are defined by the
actual operating conditions,
• whereas
• The parameters of the hybrid equivalent circuit are defined in general
terms for any operating conditions.
• The re model suffers from the fact that parameters such as the output
impedance and the feedback elements are not available, whereas the
hybrid parameters provide the entire set on the specification sheet.
• In most cases, if the re model is employed, the investigator will simply
examine the specification sheet to have some idea of what the additional
elements might be.
• Consider the hybrid equivalent model
with the general two-port system of
Fig. 5.93 .
• The parameters relating the four
variables are called h-parameters ,
from the word “hybrid.”
• The term hybrid was chosen because
the mixture of variables ( V and I ) in
each equation results in a “hybrid”
set of units of measurement for the h
-parameters.
• A clearer understanding of what the
various h -parameters represent and
how we can determine their
magnitude can be developed by
isolating each and examining the
resulting relationship.
• h11
• If we arbitrarily set Vo = 0 (short circuit the output terminals) and
solve for h11 in Eq. (5.133), we find

• The ratio indicates that the parameter h11 is an impedance parameter

with the units of ohms.
• Because it is the ratio of the input voltage to the input current with
the output terminals shorted , it is called the short-circuit input-
impedance parameter.
• The subscript 11 of h11 refers to the fact that the parameter is
determined by a ratio of quantities measured at the input terminals.
• h12
• If Ii is set equal to zero by opening the input leads, the following results for
h12

• The parameter h12 , therefore, is the ratio of the input voltage to the
output voltage with the input current equal to zero.
• It has no units because it is a ratio of voltage levels and is called the open-
circuit reverse transfer voltage ratio parameter.
• The subscript 12 of h12 indicates that the parameter is a transfer quantity
determined by a ratio of input (1) to output (2) measurements.
• The first integer of the subscript defines the measured quantity to appear
in the numerator; the second integer defines the source of the quantity to
appear in the denominator.
• The term reverse is included because the ratio is an input voltage over an
output voltage rather than the reverse ratio typically of interest.
• h21
• If in Eq. (5.134) Vo is set equal to zero by again shorting the output
terminals, the following results for h21 :

• Note that we now have the ratio of an output quantity to an input

quantity. The term forward will now be used rather than reverse as
indicated for h12 .
• The parameter h21 is the ratio of the output current to the input
current with the output terminals shorted.
• This parameter, like h12 , has no units because it is the ratio of current
levels. It is formally called the short circuit forward transfer current
ratio parameter.
• The subscript 21 again indicates that it is a transfer parameter with
the output quantity (2) in the numerator and the input quantity (1) in
the denominator.
• h22
• The last parameter, h22 , can be found by again opening the input
leads to set I1 = 0 and solving for h22 in Eq. (5.134):

• Because it is the ratio of the output current to the output voltage, it is

the output conductance parameter, and it is measured in siemens (S).
• It is called the open-circuit output admittance parameter.
• The subscript 22 indicates that it is determined by a ratio of output
quantities.
• Because each term of has the unit
volt, let us apply Kirchhoff’s voltage law “in
reverse” to find a circuit that “fits” the
equation.
• Performing this operation results in the circuit
of Fig. 5.94 .
• Because the parameter h11 has the unit ohm,
it is represented by a resistor in Fig. 5.94 .
• The quantity h12 is dimensionless and
therefore simply appears as a multiplying
factor of the “feedback” term in the input
circuit.
• Because each term of Eq.
has the units of current, let us now
apply Kirchhoff’s current law “in
reverse” to obtain the circuit of Fig.
5.95 .
• Because h22 has the units of
admittance, which for the transistor
model is conductance, it is represented
by the resistor symbol.
• Keep in mind, however, that the
resistance in ohms of this resistor is
equal to the reciprocal of conductance
(1 /h22 ).
• The complete “ac” equivalent circuit for the basic three-terminal linear
device is indicated in Fig. 5.96 with a new set of subscripts for the h -
parameters.
• The notation of Fig. 5.96 is of a more practical nature because it relates
the h -parameters to the resulting ratio obtained in the last few
paragraphs.
• The choice of letters is obvious from the following listing:
• h11 input resistance  hi
• h12  reverse transfer voltage ratio  hr
• h21  forward transfer current ratio  hf
• h22  output conductance  ho
• The circuit of Fig. 5.96 is applicable to any linear three-terminal
electronic device or system with no internal independent sources.
• In each case, the bottom of the input and output sections of the
network of Fig. 5.96 can be connected as shown in Fig. 5.97 because
the potential level is the same.
• Essentially, therefore, the transistor model is a three-terminal two-
port system.
• The h -parameters, however, will change with each configuration.
• To distinguish which parameter has been used or which is available, a
second subscript has been added to the h -parameter notation.
• For the common-base configuration, the lowercase letter b was
added, whereas for the common-emitter and common-collector
configurations, the letters e and c were added, respectively.
• The hybrid equivalent network for the common-emitter configuration
appears with the standard notation in Fig. 5.97 .
• Note that Ii = Ib, Io = Ic, and, through an application of Kirchhoff’s
current law, Ie = Ib + Ic.
• The input voltage is now Vbe , with the output voltage Vce.
• For the common-base configuration of Fig. 5.98 , Ii = Ie, Io = Ic with
Veb = Vi and Vcb = Vo.
• The networks of Figs. 5.97 and 5.98 are applicable for pnp or npn
transistors.
• For the common-emitter and common-base
configurations, the magnitude of hr and ho is
often such that the results obtained for the
important parameters such as Zi , Zo , Av , and Ai
are only slightly affected if hr and ho are not
included in the model.
• Because hr is normally a relatively small
quantity, its removal is approximated by hr 0
and hrVo = 0, resulting in a short-circuit
equivalent for the feedback element as shown
in Fig. 5.99 .
• The resistance determined by 1/ho is often
large enough to be ignored in comparison to a
parallel load, permitting its replacement by an
open-circuit equivalent for the CE and CB
models, as shown in Fig. 5.99 .
• The resulting equivalent of Fig. 5.100 is quite
similar to the general structure of the common-
base and common-emitter equivalent circuits
obtained with the re model.
• The hybrid equivalent and the re models for each configuration are
repeated in Fig. 5.101 for comparison.
• It should be reasonably clear from Fig. 5.101a that
• In particular, note that the minus sign in Eq. accounts for the fact that
the current source of the standard hybrid equivalent circuit is pointing
down rather than in the actual direction as shown in the re model of
Fig. 5.101b.
• It is demonstrated that the hybrid parameter hfe (βac) is the least
sensitive of the hybrid parameters to a change in collector current.
• Assuming, therefore, that hfe = β is a constant for the range of
interest, is a fairly good approximation.
• It is hie = βre that will vary significantly with IC and should be
determined at operating levels because it can have a real effect on
the gain levels of a transistor amplifier.
• APPROXIMATE HYBRID EQUIVALENT CIRCUIT
• The analysis using the approximate hybrid equivalent circuit of Fig.
5.104 for the common emitter configuration and of Fig. 5.105 for the
common-base configuration is very similar to that just performed
using the re model.
• A brief overview of some of the most important configurations will be
included in this section to demonstrate the similarities in approach
and the resulting equations.
• Because the various parameters of the hybrid model are specified by
a data sheet or experimental analysis, the dc analysis associated with
use of the re model is not an integral part of the use of the hybrid
parameters.
• In other words, when the problem is presented, the parameters such
as hie , hfe , hib , and so on, are specified.
• The hybrid parameters and components of the re model are related
by the following equations, as discussed earlier in this chapter:
• hie = βre,
• hfe = β,
• hoe = 1/ro,
• hfb = -α, and
• hib = re.
• Fixed-Bias Configuration
• For the fixed-bias configuration of Fig. 5.106 ,
the small-signal ac equivalent network will
appear as shown in Fig. 5.107 using the
approximate common-emitter hybrid
equivalent model.
• Compare the similarities in appearance with
Fig. 5.22 and the re model analysis.
• The similarities suggest that the analyses will
be quite similar, and the results of one can be
directly related to the other.
• Voltage-Divider Configuration
• For the voltage-divider bias configuration of Fig. 5.109 , the resulting
small-signal ac equivalent network will have the same appearance as
Fig. 5.107 , with RB replaced by R| = R1||R2.
• HYBRID π MODEL
• The last transistor model to be introduced is the hybrid π model of
Fig. 5.123 which includes parameters that do not appear in the other
two models primarily to provide a more accurate model for high-
frequency effects.
• rπ , ro , rb , and ru
• The resistors rπ, ro , rb and ru are the resistances between the
indicated terminals of the device when the device is in the active
region. The resistance rπ (using the symbol p to agree with the hybrid
p terminology) is simply βre as introduced for the common-emitter re
model.
• That is,
• The output resistance ro is the output resistance normally appearing
across an applied load.
• Its value, which typically lies between 5k and 40k, is determined from
the hybrid parameter hoe , the Early voltage, or the output
characteristics.
• The resistance rb includes the base contact, base bulk, and base
spreading resistance levels.
• The first is due to the actual connection to the base.
• The second includes the resistance from the external terminal to the
active region of the transistor, and the last is the actual resistance
within the active base region.
• It is typically a few ohms to tens of ohms.
• The resistance ru (the subscript u refers to the union it provides
between collector and base terminals) is a very large resistance and
provides a feedback path from output to input circuits in the
equivalent model.
• It is typically larger than βro, which places it in the megohm range.
• Cπ and Cu
• All the capacitors that appear in Fig. 5.123 are stray parasitic
capacitors between the various junctions of the device.
• They are all capacitive effects that really only come into play at high
frequencies.
• For low to mid-frequencies their reactance is very large, and they can
be considered open circuits.
• The capacitor Cπ across the input terminals can range from a few pF to
tens of pF.
• The capacitor Cu from base to collector is usually limited to a few pF
but is magnified at the input and output by an effect called the Miller
effect.
• βIb or gm Vπ
• It is important to note in Fig. 5.123 that the controlled source can be a voltage-
controlled current source (VCCS) or a current-controlled current source (CCCS),
depending on the parameters employed.
• Note the following parameter equivalence in Fig. 5.123 :

• Take particular note of the fact that the equivalent sources 𝛽𝐼𝑏′ and gmVπ are both
controlled current sources.
• One is controlled by a current at another place in the network and the other by a
voltage at the input side of the network.

• Transconductance is the property of certain electronic components.

Transconductance is the ratio of the current change at the output port to the
voltage change at the input port.
• The equivalence between the two is defined by

• For the broad range of low- to mid-frequency analysis, the effect of

the stray capacitive effects can be ignored due to the very high
reactance levels associated with each.
• The resistance rb is usually small enough with other series elements
to be ignored while the resistance ru is usually large enough
compared to parallel elements to be ignored.
• The result is an equivalent network similar to the re model introduced
and applied in this chapter.
• when high-frequency effects are considered, the hybrid π model will
be the model of choice
• For the two-port system of Fig. 5.61 the polarity
of the voltages and the direction of the currents
are as defined.
• If the currents have a different direction or the
voltages have a different polarity from that
appearing in Fig. 5.61 , a negative sign must be
applied.
• Note again the use of the label AvNL to indicate
that the provided voltage gain will be the no-
load value.
• For amplifiers the parameters of importance
have been sketched within the boundaries of
the two-port system as shown in Fig. 5.62 .
• The input and output resistance of a packaged
amplifier are normally provided along with the
no-load gain.
• They can then be inserted as shown in Fig. 5.62
to represent the seated package.
• For the no-load situation the output voltage is

• due to the fact that I = 0A , resulting in IoRo = 0V.

• The output resistance is defined by Vi = 0V . Under such conditions
the quantity AvNLVi is zero volts also and can be replaced by a short-
circuit equivalent.
• The result is
• Finally, the input impedance Zi simply relates the applied voltage to
the resulting input current and

• For the no-load situation, the current gain is undefined because the
load current is zero.
• There is, however, a no-load voltage gain equal to AvNL.
• The effect of applying a load to a two-port system will result in the
configuration of Fig. 5.63 .
• Ideally, all the parameters of the model are unaffected by changing loads
and levels of source resistance.
• However, for some transistor configurations the applied load can affect the
input resistance, whereas for others the output resistance can be affected
by the source resistance.
• In all cases, however, by simple definition, the no-load gain is unaffected by
the application of any load.
• In any case, once AvNL, Ri , and Ro are defined for a particular configuration,
the equations about to be derived can be employed.
• Applying the voltage-divider rule to the output circuit results in

• Because the ratio RL/(RL + Ro) is always less than 1, we have further
evidence that the loaded voltage gain of an amplifier is always less
than the no-load level.
• The current gain is then determined by

• In general, therefore, the current gain can be obtained from the

voltage gain and impedance parameters Zi and RL .
