Which family has the fastest speed?

TTL
ECL✔
CMOS
DTL

LSI and VLSI devices use the _____ technology.

TTL
ECL
MOS✔
RCL

The most important advantage of CMOS is its _____.

noise immunity
input impedance
low power consumption✔
output impedance

Which characteristic of IC in Digital Circuits represents a function of the switching time of a particular
transistor?
a) Fan – out
b) Fan – in
c) Power dissipation
d) Propagation delay

Answer: d
Explanation: Propagation delay represents a function of the switching time of a particular transistor
or MOSFET. The propagation delay helps in determining the speed of logic circuits

15. Which of the following majorly determines the number of emitters in a TTL digital circuit?
a) Fan – in
b) Fan – out
c) Propagation delay
d) Noise immunity
Answer: a
Explanation: The TTL circuit uses multi – emitter transistors with many emitters in the input. Thus,
the number of emitters is determined by the fan – in. Fan – in determines the number of inputs the
particular gate can handle.

17. What are the basic gates in MOS logic family?

a) NAND and NOR
b) AND and OR
c) NAND and OR
d) AND and NOR

Answer: a
Explanation: The MOS logic family uses the MOSFET devices to perform its operation. NAND and
NOR are the basic gates that are the building blocks of most digital circuits.

18. How must the output of a gate in a TTL digital circuit act when it is HIGH?
a) Acts as a voltage source
b) Acts as a current sink
c) Acts as a current source
d) Acts as a voltage sink

Answer: c
Explanation: If the gate output is high in a TTL circuit, the current must be given to the input of the
gate being driven. Thus, the output must act as a current source. In a normal TTL circuit, about 40μA
of current is drawn from the input from a output that is HIGH.

22. What characteristic will a TTL digital circuit possess due to its multi-emitter transistor?
a) Low capacitance
b) High capacitance
c) Low inductance
d) High inductance

Answer: a
Explanation: TTL circuit uses multi – emitter transistors which have a smaller area. The capacitance
can be represented in terms of area and distance between the plates using the expressions C =
Aε0/d. As “C” is directly proportional to “A”, a smaller area leads to a lower capacitance.

30. How must the output of a gate act when it is LOW in a TTL circuit?
a) Acts as a voltage source
b) Acts as a current sink
c) Acts as a current source
d) Acts as a voltage sink

Answer: b
Explanation: If the gate output is Low in a TTL digital circuit, the gate must be capable of sinking
current drawn from the input of gates. Thus, the output must act as a current sink.

1. The full form of CMOS is ____________

a) Capacitive metal oxide semiconductor
b) Capacitive metallic oxide semiconductor
c) Complementary metal oxide semiconductor
d) Complemented metal oxide semiconductor

Answer: c
Explanation: The full form of CMOS is complementary metal oxide semiconductor. In this type of
device, both n-type and p-type transistors are used in a complementary way.

2. The full form of COS-MOS is ____________

a) Complementary symmetry metal oxide semiconductor
b) Complementary systematic metal oxide semiconductor
c) Capacitive symmetry metal oxide semiconductor
d) Complemented systematic metal oxide semiconductor

Answer: a
Explanation: The full form of COS-MOS is complementary systematic metal oxide semiconductor. In
this type of device, both n-type and p-type transistors are used in a complementary way. Usually, the
transistors used are MOSFETs.

3. CMOS is also sometimes referred to as ____________

a) Capacitive metal oxide semiconductor
b) Capacitive symmetry metal oxide semiconductor
c) Complementary symmetry metal oxide semiconductor
d) Complemented symmetry metal oxide semiconductor

Answer: c
Explanation: CMOS is also sometimes referred to as complementary systematic metal oxide–
semiconductor (COS-MOS). In this type of device, both n-type and p-type transistors are used in a
complementary way. Usually, the transistors used are MOSFETs.

4. CMOS technology is used in ____________

a) Inverter
b) Microprocessor
c) Digital logic
d) Both microprocessor and digital logic

Answer: d
Explanation: CMOS technology is used in Microprocessor, Microcontroller, static RAM and other
digital logic circuits. CMOS technology is also used for several analog circuits such as image sensors
(CMOS sensor), data converters and highly integrated transceivers for many types of
communication.

5. Two important characteristics of CMOS devices are ____________

a) High noise immunity
b) Low static power consumption
c) High resistivity
d) Both high noise immunity and low static power consumption

Answer: d
Explanation: Two important characteristics of CMOS devices are high noise immunity and low static
power consumption. Since one transistor of the pair is always off and the series combination draws
significant power only momentarily during switching between on and off states. Also, the
performance of CMOS is not altered with the presence of noise and thus it has high noise immunity.

6. CMOS behaves as a/an ____________

a) Adder
b) Subtractor
c) Inverter
d) Comparator

Answer: c
Explanation: Since, the outputs of the PMOS and NMOS transistors are complementary such that
when the input is low, the output is high and when the input is high, the output is low. Because of
this behaviour of input and output, the CMOS circuit’s output is the inverse of the input. Whereas,
adders and subtractors are combinational circuits.

7. An important characteristic of a CMOS circuit is the ____________

a) Noise immunity
b) Duality
c) Symmetricity
d) Noise Margin

Answer: b
Explanation: An important characteristic of a CMOS circuit is the duality that exists between its PMOS
transistors and NMOS transistors. Due to the presence of two different types of transistors, the
device has a complementary function.
8. CMOS logic dissipates _______ power than NMOS logic circuits.
a) More
b) Less
c) Equal
d) Very High

Answer: b
Explanation: CMOS logic dissipates less power than NMOS logic circuits because CMOS dissipates
power only when switching (“dynamic power”). Thus, CMOS has less power consumption and is more
efficient.

9. Semiconductors are made of ____________

a) Ge and Si
b) Si and Pb
c) Ge and Pb
d) Pb and Au

Answer: a
Explanation: Semiconductors are made of Silicon (Si) and Germanium (Ge). Semiconductors are
devices having conductivity between conductors and insulators.

10. Which chip were the first RTC and CMOS RAM chip to be used in early IBM computers, capable of
storing a total of 64 bytes?
a) The Samsung 146818
b) The Samsung 146819
c) The Motorola 146818
d) The Motorola 146819

Answer: c
Explanation: The Motorola 146818 was the first RTC and CMOS RAM chip to be used in early IBM
computers; capable of storing a total of 64 bytes.

1. The full form of MOS is ___________

a) Metal oxide semiconductor
b) Metal oxygen semiconductor
c) Metallic oxide semiconductor
d) Metallic oxygen semiconductor

Answer: a
Explanation: The full form of MOS is “Metal Oxide Semiconductor”. It is a type of transistor having 3
layers: a metal conductor, an insulating silicon layer and a semiconductor silicon layer.
2. What are the types of MOSFET devices available?
a) P-type enhancement type MOSFET
b) N-type enhancement type MOSFET
c) Depletion type MOSFET
d) All of the mentioned

Answer: d
Explanation: MOSFET are of two types: enhancement and depletion type. Further, these are
classified into n-type and p-type device. The depletion type is switched on without the application of
gate bias voltage and the enhancement type is switched on with the application of gate voltage.

3. Which insulating layer used in the fabrication of MOSFET?

a) Aluminium oxide
b) Silicon Nitride
c) Silicon dioxide
d) Aluminium Nitrate

Answer: c
Explanation: Silicon dioxide is used as an insulating layer in the fabrication of MOSFET. It gives an
extremely high input resistance in the order of 1010 to 1015 Ω for MOSFET.

4. Which of the following plays an important role in improving the device performance of MOSFET?
a) Dielectric constant
b) Threshold voltage
c) Power supply voltage
d) Gate to drain voltage

Answer: b
Explanation: In MOSFET, the threshold voltage is typically 3 to 6V. This large voltage is not compatible
with the supply of 5V which is used in digital ICs. So, for the improvement of the device’s
performance the magnitude of threshold voltage should be reduced.

5. A technique used to reduce the magnitude of threshold voltage of MOSFET is the ___________
a) Use of complementary MOSFET
b) Use of Silicon nitride
c) Using thin film technology
d) Increasing potential of the channel

Answer: b
Explanation: Silicon nitride is sandwiched between two SiO2 layer and provide necessary barrier. The
dielectric constant of Si3N4 is 7.5, whereas that of SiO2 is 4. This increase in overall dielectric
constant reduces threshold voltage.
6. What is used to higher the speed of operation in MOSFET fabrication?
a) Ceramic gate
b) Silicon dioxide
c) Silicon nitride
d) Poly silicon gate

Answer: d
Explanation: In conventional metal gate small overlap capacitance is present, which lowers the speed
of operation. With the presence of self aligning property of the poly silicon gate it eliminates this
capacitance. Using a process called ion-implantation, polysilicon, the drain and the source get doped.
However, the thin oxide under silicon gate acting as a mask for the process and thus develops the
gate aligning property.

7. Find the sequence of steps involved in fabrication of poly silicon gate MOSFET?

Step 1: Entire wafer surface of a Si3N4 is coated and is etched away with the help of mask to include
source, gate and drain.
Step 2: The contact areas are defined using photolithographic process.
Step 3: Selective etching of Si3N4 and growth of thin oxide.
Step 4: The deposition of poly silicon gate.
Step 5: The growth of thick oxide is called field oxide and P implantation.
Step 6: The metallization and interconnection between substrate and source.

a) 1->5->3->4->2->6
b) 1->3->4->2->5->6
c) 1->5->4->3->2->6
d) 1->4->2->5->3->6

Answer: a
Explanation: These steps are the sequence of steps involved in fabrication of poly silicon gate
MOSFET. With the help of poly silicon gate doping, it highers the speed of operation of the MOSFET.

8. Why MOSFET is preferred over BJT in IC components?

a) MOSFET has low packing density
b) MOSFET has medium packing density
c) MOSFET has high packing density
d) MOSFET has no packing density

Answer: a
Explanation: MOSFET is preferred over BJT because of its low packaging density. Thus, more number
of MOSFET memory cells can be accommodated in a particular area as compared to BJT.
9. Critical defects per unit chip area are ________ for a MOS transistor.
a) High
b) Low
c) Neutral
d) Very High

Answer: b
Explanation: Critical defects per unit chip area is low for a MOS transistor because it involves fewer
steps in the fabrication of a MOS transistor. Also, MOSFET has low packaging density.

10. MOS is being used in ___________

a) LSI
b) VLSI
c) MSI
d) Both LSI and VLSI

Answer: d
Explanation: Since more transistor and circuitry functions can be achieved on a single chip with MOS
technology that is why MOS is being used in LSI and VLSI. LSI stands for Large Scale Integration and
VLSI stands for Very Large Scale Integration.

1. All input of NOR as low produces result as __________

a) Low
b) Mid
c) High
d) Floating

Answer: c
Explanation: All input of NOR as low produces the result as high, whereas, rest all conditions produce
output as low.

2. In RTL NOR gate, the output is at logic 1 only when all the inputs are at __________
a) logic 0
b) logic 1
c) +10V
d) Floating

Answer: a
Explanation: RTL NOR gate behaves as NOR gate and the output of NOR gate will be 1 only when all
the inputs are at logic 0 and in rest conditions of the input, the output is 0.

3. Resistor–transistor logic (RTL) is a class of digital circuits built using _______ as the input network
and _______ as switching devices.
a) Resistors, bipolar junction transistors (BJTs)
b) Bipolar junction transistors (BJTs), Resistors
c) Capacitors, resistors
d) Resistors, capacitors

Answer: a
Explanation: Resistor–transistor logic (RTL) is a class of digital circuits built using resistors as the
input network and bipolar junction transistors (BJTs) as switching devices.

4. RTL consists of a common emitter stage with a _______ connected between the base and the input
voltage source.
a) collector
b) base resistor
c) capacitor
d) inductor

Answer: b
Explanation: RTL consist of a common emitter stage with a base resistor connected between the
base and the input voltage source. The role of base resistor is to expand the negligible transistor
input voltage range (about 0.7 V) to the logical “1” level (about 3.5 V) by converting the input voltage
into a current. Thus, base resistor plays a major role in biasing of the transistor.

5. The role of the _______ is to convert the collector current into a voltage in RTL.
a) Collector resistor
b) Base resistor
c) Capacitor
d) Inductor

Answer: a
Explanation: The role of the collector resistor is to convert the collector current into a voltage; its
resistance is chosen high enough to saturate the transistor and low enough to obtain low output
resistance. Base Resistor is to provide the necessary biasing to the base of the transistor in order to
activate it.

6. The limitations of the one transistor RTL NOR gate are overcome by __________
a) Two-transistor RTL implementation
b) Three-transistor RTL implementation
c) Multi-transistor RTL implementation
d) Four-transistor RTL implementation

Answer: c
Explanation: The limitations of the one transistor RTL NOR gate are overcome by the use of multi
transistor RTL. It consists of a set of parallel connected transistor switches driven by the logic inputs.
7. The primary advantage of RTL technology was that __________
a) It results as low power dissipation
b) It uses a minimum number of resistors
c) It uses a minimum number of transistors
d) It operates swiftly

Answer: c
Explanation: The primary advantage of RTL technology was that it uses a minimum number of
transistors. It consists of registers in large amount and it results in as high power dissipation. The
resistors act as the input network and the transistors performs the switching operation.

8. The disadvantage of RTL is that __________

a) It uses a maximum number of resistors
b) It results in high power dissipation
c) High noise creation
d) It uses a minimum number of transistors

Answer: b
Explanation: The disadvantage of RTL is its high power dissipation when the transistor is switched on
by current flowing in the collector and base resistor. This requires that more current be supplied to
and heat be removed from RTL circuits. In contrast, TTL circuits with “totem-pole” output stage
minimize both of these requirements.

9. TTL circuits with “totem-pole” output stage minimize __________

a) The power dissipation in RTL
b) The time consumption in RTL
c) The speed of transferring rate in RTL
d) Propagation delay in RTL

Answer: a
Explanation: TTL circuits with “totem-pole” output stage minimize the power dissipation and heating
effect in RTL.

10. The minimum number of transistors can be used by 2 input AND gate is __________
a) 2
b) 3
c) 4
d) 5

Answer: a
Explanation: The minimum number of transistors can be used by 2 input AND gate is 2 and
maximum up to 3.
his set of Digital Electronics/Circuits Multiple Choice Questions & Answers (MCQs) focuses on “Diode-
Transistor Logic(DTL)”.

1. Diode–transistor logic (DTL) is the direct ancestor of _____________

a) Register-transistor logic
b) Transistor–transistor logic
c) High threshold logic
d) Emitter Coupled Logic

Answer: b
Explanation: Diode–transistor logic (DTL) is a class of digital circuits that is the direct ancestor of
transistor–transistor logic. To overcome the shortcomings of DTL, TTL came into existence.

2. In DTL logic gating function is performed by ___________

a) Diode
b) Transistor
c) Inductor
d) Capacitor

Answer: a
Explanation: Diode serves as the input network and the switching operation is performed by the
transistor.

3. In DTL amplifying function is performed by ___________

a) Diode
b) Transistor
c) Inductor
d) Capacitor

Answer: b
Explanation: The amplifying and switching function is performed by a transistor and the diode acts
an input network in DTL.

4. How many stages a DTL consist of?

a) 2
b) 3
c) 4
d) 5

Answer: b
Explanation: The DTL circuit shown in the picture consists of three stages: an input diode logic stage,
an intermediate level shifting stage and an output common-emitter amplifier stage.
5. The full form of CTDL is ___________
a) Complemented transistor diode logic
b) Complemented transistor direct logic
c) Complementary transistor diode logic
d) Complementary transistor direct logic

Answer: a
Explanation: The full form of CTDL is Complemented transistor diode logic.

6. The DTL propagation delay is relatively ___________

a) Large
b) Small
c) Moderate
d) Negligible

Answer: a
Explanation: Propagation delay refers to the time taken by the output to change it’s state when the
input is altered. When the transistor goes into saturation from all inputs being high charge is stored
in the base region. When it comes out of saturation (one input goes low) this charge has to be
removed and will dominate the propagation time which results as a large propagation delay. Thus, it
has small clock frequency.

7. The way to speed up DTL is to add an across intermediate resister is ___________

a) Small “speed-up” capacitor
b) Large “speed-up” capacitor
c) Small “speed-up” transistor
d) Large ” speed-up” transistor

Answer: a
Explanation: One way to speed up DTL is to add a small “speed-up” capacitor across intermediate
resister. The capacitor helps to turn off the transistor by removing the stored base charge; the
capacitor also helps to turn on the transistor by increasing the initial base drive.

8. The process to avoid saturating the switching transistor is performed by ___________

a) Baker clamp
b) James R. Biard
c) Chris Brown
d) Totem-Pole

Answer: a
Explanation: Another way to speed up DTL other than adding a small “speed-up” capacitor across
intermediate resister is to avoid saturating the switching transistor which can be done with a Baker
clamp. The name Baker clamp is given at the name of Richard H. Baker, who described it in his 1956
technical report “Maximum Efficiency Switching Circuits”.
9. A major advantage of DTL over the earlier resistor–transistor logic is the ___________
a) Increased fan out
b) Increased fan in
c) Decreased fan out
d) Decreased fan in

Answer: b
Explanation: A major advantage over the earlier resistor–transistor logic is the increased fan in. Fan-
in is the measure of the maximum number of inputs that a single gate output can accept.

10. To increase fan-out of the gate in DTL ___________

a) An additional capacitor may be used
b) An additional resister may be used
c) An additional transistor and diode may be used
d) Only an additional diode may be used

Answer: c
Explanation: To increase fan-out of the gate in DTL, an additional transistor and diode may be used.
Here, the fan out means the number of maximum input that a single gate output can feed.

11. A disadvantage of DTL is ___________

a) The input transistor to the resister
b) The input resister to the transistor
c) The increased fan-in
d) The increased fan-out

Answer: b
Explanation: A disadvantage of DTL is the input resistor to the transistor and its presence tends to
slow the circuit down. Hence limiting the speed at which the transistor is able to switch states. Thus,
the propagation delay increases.

1. Transistor–transistor logic (TTL) is a class of digital circuits built from ____________

a) JFET only
b) Bipolar junction transistors (BJT)
c) Resistors
d) Bipolar junction transistors (BJT) and resistors

Answer: d
Explanation: Transistor–transistor logic (TTL) is a class of digital circuits built from bipolar junction
transistors (BJT) and resistors. However, resistors have a small role to play and both logic gating and
amplifying functions are performed by the transistors.
2. TTL is called transistor–transistor logic because both the logic gating function and the amplifying
function are performed by ____________
a) Resistors
b) Bipolar junction transistors
c) One transistor
d) Resistors and transistors respectively

Answer: b
Explanation: TTL is called transistor–transistor logic because both the logic gating function and the
amplifying function are performed by bipolar junction transistors (BJTs).

3. TTL was invented in 1961 by ____________

a) Baker clamp
b) James L. Buie
c) Chris Brown
d) Frank Wanlass

Answer: b
Explanation: TTL was invented in 1961 by James L Buie.

4. The full form of TCTL is ____________

a) Transistor-coupled transistor logic
b) Transistor-capacitor transistor logic
c) Transistor-complemented transistor logic
d) Transistor-complementary transistor logic

Answer: a
Explanation: The full form of TCTL is transistor-coupled transistor logic.

5. The _______ ancestor to the first personal computers.

a) PARAM 1
b) SATYAM 1
c) KENBAK 1
d) MITS Altair

Answer: c
Explanation: The KENBAK 1, ancestor to the first personal computers.

6. TTL inputs are the emitters of a ____________

a) Transistor-transistor logic
b) Multiple-emitter transistor
c) Resistor-transistor logic
d) Diode-transistor logic

Answer: b
Explanation: TTL inputs are the emitters of a multiple-emitter transistor.

7. TTL is a ____________
a) Current sinking
b) Current sourcing
c) Voltage sinking
d) Voltage sourcing

Answer: a
Explanation: Like DTL, TTL is a current-sinking logic since a current must be drawn from inputs to
bring them to a logic 0 level. Current Sink means it accepts current coming out from a source.

8. Standard TTL circuits operate with a __ volt power supply.

a) 2
b) 4
c) 5
d) 3

Answer: c
Explanation: Standard TTL circuits operate with a 5-volt power supply.

9. TTL devices consume substantially ______ power than equivalent CMOS devices at rest.
a) Less
b) More
c) Equal
d) Very High

Answer: b
Explanation: TTL devices consume substantially more power than equivalent CMOS devices at rest.
Thus, CMOS devices are faster than TTL devices.

10. A TTL gate may operate inadvertently as an ____________

a) Digital amplifier
b) Analog amplifier
c) Inverter
d) Regulator

Answer: b
Explanation: A TTL gate may operate inadvertently as an analog amplifier if the input is connected to
a slowly changing input signal that traverses the unspecified region from 0.7V to 3.3V.
11. The speed of ______ circuits is limited by the tendency of common emitter circuits to go into
saturation.
a) TTL
b) ECL
c) RTL
d) DTL

Answer: a
Explanation: The speed of TTL circuits is limited by the tendency of common emitter circuits to go
into saturation due to the injection of minority carriers into the collector region. Hence, it functions
slowly compared to CMOS devices.

1. The full form of ECL is __________

a) Emitter-collector logic
b) Emitter-complementary logic
c) Emitter-coupled logic
d) Emitter-cored logic

Answer: c
Explanation: The full form of ECL is emitter-coupled logic.

2. Which logic is the fastest of all the logic families?

a) TTL
b) ECL
c) HTL
d) DTL

Answer: b
Explanation: ECL is the fastest of all the logic families because of the emitters of many transistors are
coupled together which results in the highest transmission rate.

3. The full form of CML is __________

a) Complementary mode logic
b) Current mode logic
c) Collector mode logic
d) Collector Mixed Logic

Answer: c
Explanation: The full form of CML is Collector Mode Logic.

4. Sometimes ECL can also be named as __________

a) EEL
b) CEL
c) CML
d) CCL

Answer: c
Explanation: ECL (Emitter Coupled Logic) can also be named as CML(Collector Mode Logic).

5. In an ECL the output is taken from __________

a) Emitter
b) Base
c) Collector
d) Junction of emitter and base

Answer: c
Explanation: Though, the emitter and collector of the ECL are coupled together. So, the output will be
taken from a collector.

6. The ECL behaves as __________

a) NOT gate
b) NOR gate
c) NAND gate
d) AND gate

Answer: b
Explanation: The ECL behaves as NOR gate because if any of the input voltages go high as compared
to the reference voltage, the output is low and the output is high only when all the input voltages are
low.

7. In ECL the fanout capability is __________

a) High
b) Low
c) Zero
d) Sometimes high and sometimes low

Answer: a
Explanation: If the input impedance is high and the output resistance is low; as a result, the
transistors change states quickly, gate delays are low, and the fanout capability is high. Fan-out is the
measure of the maximum number of inputs that a single gate output can accept.

8. ECL’s major disadvantage is that __________

a) It requires more power
b) It’s fanout capability is high
c) It creates more noise
d) It is slow

Answer: a
Explanation: ECL’s major disadvantage is that each gate continuously draws current, which means it
requires (and dissipates) significantly more power than those of other logic families. But ECL logic
gates have clock frequency. Thus, they have a fast operation.

9. The full form of SCFL is __________

a) Source-collector logic
b) Source-coupled logic
c) Source-complementary logic
d) Source Cored Logic

Answer: b
Explanation: The full form of SCFL is source-coupled logic.

10. The equivalent of emitter-coupled logic made out of FETs is called __________
a) CML
b) SCFL
c) FECL
d) EFCL

Answer: b
Explanation: The equivalent of emitter-coupled logic made out of FETs is called Source-coupled
logic(SCFL). Like ECL, SCL is also the fastest among the logic families.

11. ECL was invented in _______ by __________

a) 1956, Baker clamp
b) 1976, James R. Biard
c) 1956, Hannon S. Yourke
d) 1976, Yourke

Answer: c
Explanation: ECL was invented in August 1956 at IBM by Hannon S Yourke.

12. At the time of invention, an ECL was called as __________

a) Source-coupled logic
b) Current Mode Logic
c) Current-steering logic
d) Emitter-coupled logic
Answer: c
Explanation: At the time of invention, an ECL was called a current-steering logic because it involved
current switching.

13. The ECL circuits usually operates with __________

a) Negative voltage
b) Positive voltage
c) Grounded voltage
d) High Voltage

Answer: a
Explanation: The ECL circuits usually operate with negative power supplies (positive end of the
supply is connected to ground), in comparison to other logic families in which negative end of the
supply is grounded. It is done mainly to minimize the influence of the power supply variations on the
logic levels as ECL is more sensitive to noise on the VCC and relatively immune to noise on VEE.

14. Low-voltage positive emitter-coupled logic (LVPECL) is a power optimized version of __________
a) ECL
b) VECL
c) PECL
d) LECL

Answer: c
Explanation: Low voltage positive emitter coupled logic (LVPECL) is a power optimized version of
PECL using a +3.3 V instead of 5 V supply.

15. The logic gating function in DTL is performed by:

a. Diode

b. Inductor

c. Transformer

d. Transistor

Answer: (a) Diode

16. Out of these logic families, which one provides the minimum dissipation of power?

a. TTL

b. JFET

c. CMOS

d. ECL

Answer: (c) CMOS

9. Which insulating layer do we use for fabricating the MOSFET?

a. Aluminium sulphate

b. Silicon Nitride

c. Silicon dioxide

d. Copper sulphate

Answer: (c) Silicon dioxide

82). Where do all the bios settings and configuration details get to store?
CMOS
PMOS
NMOS
None of the above

83). The other names CMOS are ________

CMOS Memory
CMOS Battery
Non-volatile BIOS memory
All of the above

84). The Field Effect Transistor is __________ device

Single terminal device
Double terminal device
Three terminal device
None of the above

Which of these sets of logic gates are known as universal gates?

a. XOR, NAND, OR
b. OR, NOT, XOR
c. NOR, NAND, XNOR
d. NOR, NAND

Answer: d

Explanation: NAND or NOR gates are used to design all other logic gates, so; they are termed universal
gates.

The inverter can be classified as

a. Power Inverter
b. Voltage source Inverter
c. Current source Inverter
d. Both option b and c

Answer: d

Explanation:

Inverter refers to an electronic device that converts direct current (DC) to alternating current (AC). It has
a wide range of applications for small appliances, TVs, DVD players, computer power supply to large
electric power supply like photovoltaic solar cells.

Based on the type of the input source, Inverters are divided into two categories.

1. Current source inverters: In current source inverters, the input is a current source.
2. Voltage source inverters: In voltage source inverters, the input is a voltage source.
412. Propagation delay times can be divided as
A. t(plh) and t(lph)
B. t(lph) and t(phl)
C. t(plh) and t(phl)
D. t(hpl) and t(lph)
Answer» C. t(plh) and t(phl)