Ghulam Ishaq Khan Institute of Engineering

Sciences & Technology

Name: ______________________________

Faculty of Computer Science & Engineering Reg. No:

Signature: ________________________

Date: _____________________

Instructor: Engr. Muhammad Abu Bakar

Maximum Time Allowed (A+B): 165 Minutes

Maximum Marks: 60

Mid Term Exam – Fall 2023

CE221L: Digital Logic Design Lab
Program: BS(DS)
Section: E

Question # 01 Question # 02 Question # 03 Total

(10 Marks) (30 Marks) (20 Marks) Marks
(60)

a (12) b (08) c (05) d (05) a (10) b (05) c (05)

Course Instructor:
Name: ___________________________; Signature: __________________ ; Date: ______________

Paper Vetting Committee:

Name: ___________________________; Signature: __________________ ; Date: ______________

Program HoD:
Name: ___________________________; Signature: __________________ ; Date: ______________
Name:___________________________________ ; Reg. No.:__________________ ; Signature:______________

Paper – A: 15 mins
Question # 01 (10 Marks)
1. What are the High-level and low-level voltages of TTL ICs? (02 Marks)

High Level: _______ to ________

Low Level: ________ to ________

2. TTL series ICs are: (01 Marks)

a) 7400 series c) Both a & b

b) 4000 series d) None of the above

3. What are Universal Gates? Write down their names. (03 Marks)

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4. The idempotent law of Boolean Algebra states that: (02 Marks)

A+A = ___________ & A.A = _____________.

5. In a 3-to-8 line decoder, __________ number of output lines will be active for
the input "011" (binary)? (01 Marks)

6. Which type of encoder is used to convert a 4-bit binary number into its
corresponding BCD (Binary Coded Decimal) representation? (01 Marks)
a) 4-to-2 line encoder
b) Octal encoder
c) Priority encoder
d) BCD encoder

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Name:___________________________________ ; Reg. No.:__________________ ; Signature:______________

Paper – B: 150 mins

Question # 02 (30 Marks)
a) Design a combinational logic circuit on the trainer board, utilizing the given
ICs, to perform a subtraction operation involving three bits. (12 Marks)

b) Complete and verify the given Truth table and Boolean expressions. (8
Marks)

Input Output

X Y Bin D Bout

c) Write down the simplified equations. (5 Marks)

Difference = D = (X’.Y’.BIN) + (X’.Y.B’IN) + (X.Y’.B’IN) + (X.Y.BIN)

= _________________________________________

Borrow-Out = Bout = (X’.Y’.BIN) + (X’.Y.B’IN) + (X’.Y.BIN) + (X.Y.BIN)

= ______________________________________

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Name:___________________________________ ; Reg. No.:__________________ ; Signature:______________

d) Draw the Logic diagram for Full Subtractor circuit. (5 Marks)

Question # 03 (20 Marks)

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Name:___________________________________ ; Reg. No.:__________________ ; Signature:______________

a) Design an XOR gate exclusively using NAND ICs on the trainer board.
(10 Marks)

b) Draw the Logic diagram for the above-implemented XOR gate (i.e., Using
NAND ICs only). (5 Marks)

c) Write down the equation for this circuit (i.e., XOR using NAND only) using
Boolean Algebra and De-Morgans Law. (5 Marks)
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