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Lab9

This lab focuses on simulating R-Type instructions in a single-cycle RISC-V architecture, specifically examining data flow in the datapath. Students are required to use online simulators to run RISC-V assembly code for a 2-input NAND operation and analyze the data flow through the datapath. The lab includes tasks such as capturing signal images and discussing datapath unit signals related to the NANDing operation.

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0% found this document useful (0 votes)
9 views

Lab9

This lab focuses on simulating R-Type instructions in a single-cycle RISC-V architecture, specifically examining data flow in the datapath. Students are required to use online simulators to run RISC-V assembly code for a 2-input NAND operation and analyze the data flow through the datapath. The lab includes tasks such as capturing signal images and discussing datapath unit signals related to the NANDing operation.

Uploaded by

omarashraf13456
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Department of Computer Science

Institute of Business Administration, Karachi

Lab #09: Simulating R-Type Instructions:


Data Flow in Datapath

Computer Architecture & Assembly Language


April 2, 2024

Course Instructor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Salman Zaffar


Lab Instructor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mehwish Zafar
Week Performed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . : Week 1
Room . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MTL4

1 Introduction
This laboratory work focuses on understanding the flow of data in the datapath of a single-
cycle RISC-V architecture in case of R-Type instructions. There are two parts of this
lab-first is to use an online simulator (https://venus.kvakil.me/) to run a RISC-V assembly
program and the second is to use an online functional simulation platform to see the data
flow through the datapath for this program (www.edaplayground.com).

2 Code Snippet
A simple 2-input NANDing operation (Y=A.B) is used for the code. The RISC-V assembly
code for this is given below

3 Online Simulation of Code


Perform the following steps
1. Write the code in the Editor window as in Figure 2
2. Press the Run button in the Simulator window as in Figure 3. See the updated content
of the temporary registers.

1
Figure 1: RISC-V Assembly Code for 2-input NANDing Operation

Figure 2: Code Entry in the Editor Window of the Online Simulator

4 Online Simulation of Datapath


1. Login to www.edaplayground.com and open the link https://www.edaplayground.com/x/cCRB.
Following window as in Figure 4 should appear
2. Press the Dump button to copy the machine code in the clipboard as shown in Figure
5

3. Copy the machine code from Figure 5 into the instruction memory of the code in
www.edaplayground.com as shown in Figure 6
4. Run the simulation and get the address and data being written into the register file.
See the waveforms as shown in Figure 8

2
Figure 3: Updated content of to, t1, t2 and t3

Figure 4: Top View of the Project in www.edaplayground.com

3
Figure 5: Machine Code Generation

Figure 6: Copying of Machine Code into the Instruction Memory

4
Figure 7: Address and Data being Written into the Register File

5
5 Laboratory Tasks
1. Capture the images of signals of all relevant datapath units for the below provided lab
code snippet which is NANDing operation using De-Morgan’s Theorem ((A · B)′ =
A′ + B ′ ) provided below:

Figure 8: NANDing operation using De-Morgan’s Theorem

2. Discuss all the signals of relevant datapath units:

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