Lab9
Lab9
1 Introduction
This laboratory work focuses on understanding the flow of data in the datapath of a single-
cycle RISC-V architecture in case of R-Type instructions. There are two parts of this
lab-first is to use an online simulator (https://venus.kvakil.me/) to run a RISC-V assembly
program and the second is to use an online functional simulation platform to see the data
flow through the datapath for this program (www.edaplayground.com).
2 Code Snippet
A simple 2-input NANDing operation (Y=A.B) is used for the code. The RISC-V assembly
code for this is given below
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Figure 1: RISC-V Assembly Code for 2-input NANDing Operation
3. Copy the machine code from Figure 5 into the instruction memory of the code in
www.edaplayground.com as shown in Figure 6
4. Run the simulation and get the address and data being written into the register file.
See the waveforms as shown in Figure 8
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Figure 3: Updated content of to, t1, t2 and t3
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Figure 5: Machine Code Generation
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Figure 7: Address and Data being Written into the Register File
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5 Laboratory Tasks
1. Capture the images of signals of all relevant datapath units for the below provided lab
code snippet which is NANDing operation using De-Morgan’s Theorem ((A · B)′ =
A′ + B ′ ) provided below: