dd lab exp 9
dd lab exp 9
Software runs
4-bit universal shift register: Write Verilog code and testbench for 4-bit universal shift
register.
Verilog Code
Name & ID:……………………………………Date: ……………………….
OUTPUT
Truth Table
Name & ID:……………………………………Date: ……………………….
Assignment All assignments are to be submitted strictly before start of next lab session
through online only. Late assignments will not be entertained and will be awarded ‘0’
marks.
1. Write the Verilog code and testbench for serial in serial out shift register.
2. Write the Verilog code and testbench for serial in parallel out shift register.
Ans: Link2 https://www.edaplayground.com/x/jX8W