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Digital Circuits
Assignment- Week -9
TYPE OF QUESTION: MCQ
Number of questions: 15 Total mark: 15 X 1 = 15
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QUESTION 1:
Which of the following statement is TRUE?
a) In a random-access memory, the access time depends on the location of the word.
b) In a random-access memory, the access time is independent of the location of the word.
c) In a sequential access memory, the access time is independent of the location of the word.
d) Access time is same for a location in both the random- and the sequential-access
memories.

Correct Answer: B
Detailed Solution:
1. In a random-access memory, the access time is always the same regardless of the particular
location of the word.
2. In a sequential-access memory, the time it takes to access a word depends on the position of
the word with respect to the reading head position; therefore, the access time is variable.
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QUESTION 2:
A memory unit “1024 X 64” is specified by the number of words times the number of bits per
word. How many address lines are needed for the given memory unit?
A) 8
B) 9
C) 10
D) 11
Correct Answer: C

Detailed Solution:

Memory unit is represented by ( 2k X n) . Here, 2k represents the number of words, n represent the
number of bits per word, and k represent the number of address lines needed to access a particular
word.

1024 X 16 = 210 X 16 = 2k X n ; k = 10
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QUESTION 3:

What memory address range is NOT represented by chip #1 and chip #2 in the figure. A0 to A15
in the figure are the address lines and CS means chip select.

a) 0100-02FF

b) 1500-16FF

c) F900-FAFF

d) F800-F9FF

Correct Answer: d
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Detailed Solution:

The address range specified by above is XXXX XX01 0000 0000 to XXXX XX01 FFFF FFFF
and XXXX XX10 0000 0000 to XXXX XX10 FFFF FFFF.

F800 is not present in the above range

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QUESTION 4:

The minimum number of transistors required to make a dynamic RAM cell is?

a) 1

b) 2

c) 3

d) 4

Correct Answer: a

Detailed Solution:

One transistor DRAM cell contains only one transistor.

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QUESTION 5:
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For the given circuit, identify the outputs A and B. (the ‘x’ indicates a connection)

a) A = XY’ + XZ’ and B = XZ’ + XY’ + YZ

b) A = XY + XZ’ and B = XZ’ + XY’ + YZ

c) A = Y’Z + XZ’ and B = XZ’ + XY’ + Y’Z

d) A = X’Y’ + XZ’ and B = XZ’ + XY’ + YZ

Correct Answer: b

Detailed Solution:

A = XY + XZ’ and B = XZ’ + XY’ + YZ

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QUESTION 6:
Which of the following statements is FALSE?

A) SRAM memories has shorter READ and WRITE cycles compared to DRAM
B) DRAM memories has longer READ and WRITE cycles compared to SRAM
C) SRAM memories occupies minimal area compared to DRAM memories
D) SRAM memories occupies larger area compared to DRAM memories

Correct Answer: C

Detailed Solution:

A 1-bit SRAM cell contains 6 transistors and a 1-bit DRAM cell requires only one transistor. So
DRAM has higher integration compared to SRAM. In DRAM cells data is stored in the form of
charge on the capacitor. So READ and WRITE cycles take more time.
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QUESTION 7:

What is the ROM size when it has 16-bit address lines as input and 8-bit data lines as output?

A) 216 x 8 bits
B) 28 x 16 bits
C) 162 x 8 bits
D) 215 x 8 bits

Correct Answer: A

Detailed Solution:

A ROM with 16-bit address lines and 8-bit output lines have 216 x 8 bits of memory.
QUESTION 8:

Which of the following statements is TRUE?

A) Hamming code can correct and detect only single bit errors
B) Hamming code can correct and detect up to two bit errors
C) Hamming code can correct and detect up to three bit errors
D) Hamming code can correct and detect up to four bit errors
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Correct Answer: A

Detailed Solution:

QUESTION 9:

Which of the following technique is used to erase the data in EEPROM memory?
a) By heating the memory chip
b) Exposing to ultra-violet light
c) By applying an electrical signal
d) None of the above

Correct Answer: c
Detailed Solution:
EEPROM also called as electrically programmable read only memory. We can erase the data
using a electrical pulse.

QUESTION 10:

A 12-bit hamming code read from a memory location. This hamming code contains 8-bit data
and 4-bit code word. What was the original 8-bit data word stored in the memory location if the
12-bit hamming code is (0011 1011 1110)2?
A) (1001 1110)2
B) (1101 1110)2
C) (1101 1101)2
D) (0010 1101)2

Correct Answer: A

Detailed Solution:

C8 C4 C2 C1

0 1 0 1

So, error is present at bit 5. The original data word present in memory is (1001 1110)2
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QUESTION 11:
In hamming code, how many check bits are required for a data word of 25 bits?
a) 4
b) 5
c) 6
d) 7

Correct Answer: b

Detailed Solution:

2k – 1 >= n + k

For n = 25, k = 5 satisfies the relation

QUESTION 12:

Find the 12-bit hamming code for the given 8-bit data (1100 0011)2

A) (1101 1000 1100)2

B) (1010 1000 0011)2
C) (0101 0111 1100)2
D) (0010 0111 0011)2

Correct Answer: B

Detailed Solution:

P1 P2 1 P4 1 0 0 P8 0 0 1 1

1 0 1 0 1 0 0 0 0 0 1 1

P1 = EX-OR(3,5,7,9,11) = EX-OR(1,1,0,0,1) = 1

P2 = EX-OR(3,6,7,10,11) = EX-OR(1,0,0,0,1) = 0

P3 = EX-OR(5,6,7,12) = EX-OR(1,0,0,1) = 0
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P4 = EX-OR (9, 10, 11, 12) = EX-OR (0, 0, 1, 1) = 0

QUESTION 13:

Which of the following statement is TRUE?

a) PAL has fixed AND array and fixed OR array

b) PAL has programmable AND array and fixed OR array.

c) PLA has fixed AND array and fixed OR array

d) PLA has programmable AND array and fixed OR array

Correct Answer: b

Detailed Solution:

PAL has programmable AND array and fixed OR array.

QUESTION 14:

CPLD stands for _______________.

a) Combined programmable logic device
b) Complex programmable logic device
c) Complement programmable logic device
d) Complex permanent logic device

Correct Answer: b

Detailed Solution:

CPLD is a complex programmable logic device.

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QUESTION 15:

Identify the functions (F1 F2 F3) implemented by following PLA circuit?

A) F1 = ABC F2 = C’B’ F3 = A’B’C+B’C’

B) F1 = ABC + B’C’ F2 = ABC F3 = A’BC’ + B’C’

C) F1 = A’BC + B’C’ F2 = ABC F3 = A’BC’ + B’C’

D) F1 = ABC + B’C’ F2 = ABC’ F3 = A’BC + B’C’

Correct Answer: B

Detailed Solution:
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