COEP TECHNOLOGICAL UNIVERSITY

INDEX
SR. NAME OF THE EXPERIMENTS DATE REMARK
NO
1 Find out IB, IC and VCE of single stage
BJT CE amplifier.
2 Input and Output Characteristics of BJT
in CE configuration
3 Single stage BJT CE amplifier. Find
performance parameters Av, Ri, Ro
4 Simulate frequency response of single
stage BJT CE amplifier.
5 Simulate frequency response of single
stage FET CS amplifier.
6 Draw the Transfer and Drain
Characteristics of FET amplifier.
7 Design and simulate the voltage shunt
Feedback amplifier using JFET.
8 Design and simulate the Voltage series
Feedback amplifier using an OP – amp.
9 Design and simulate RC oscillators,
Colpitts oscillator and Hartley oscillator.
10 Design and simulate Power Amplifiers -
Class A, Class AB complementary
symmetry.

This is to certify that Mr. Suraj Sanjay Mule has carried out the above-
mentioned Electronic Devices and Circuits term work in the Electronics
and Telecommunication Engineering Department of COEP
TECHNOLOGICAL UNIVERSITY PUNE
Date:5/12/2024 Sign_______________
 EXPERIMENT 1

Aim: Find out IB , IC and VCE of single stage BJT CE amplifier.

Theory: In electronics, configuration refers to how components, particular

transistors, are connected in a circuit. The term is often used in relation to
transistors, where different configurations affect how signals are amplified or
processed. For a bipolar junction transistor (BJT), there are three common
configurations.
There are three types of configuration
1) CE(common emitter)
2) CB(common base)
3) CC(common collector)
1. Biasing: To ensure proper operation, the transistor is biased with a DC
voltage so that it remains in the active region (not saturated or cutoff) for
the entire range of the input signal.
2. Base Current (IB): The small current that flows into the base of the
transistor, which controls the larger current in the collector.
3. Collector Current (IC): The current flowing from the collector to the emitter,
which is amplified in the process.
4. Collector-Emitter Voltage (Vce): The voltage drop between the collector
and emitter of the transistor. This determines whether the transistor is in
saturation, active, or cutoff region.

Working Principle:
• The transistor in the common emitter configuration amplifies the input
signal applied at the base by converting small variations in base current (Ib)
into larger variations in collector current (Ic).
 • The voltage across the collector and emitter (Vce) is determined by the
applied supply voltage (Vcc), the resistor connected in the collector (Rc),
and the collector current (Ic).

Calculations:
1. Base Current (Ib):
Ib= Vcc−Vbe /Rb
Where:
o Vcc is the supply voltage.
o Vbe is the base-emitter voltage (typically around 0.7V for silicon
transistors).
o Rb is the base resistor.
2. Collector Current (Ic):
Ic=β×Ib
Where β is the current gain of the transistor.
3. Collector-Emitter Voltage (Vce):
Vce=Vcc−Ic×Rc
Where:
o Vcc is the supply voltage.
o Rc is the collector resistor.
Simulations:

Conclusion:

This experiment helps us understand how the transistor amplifies the input signal
by controlling the base current, which leads to changes in the collector current
and, consequently, the collector-emitter voltage. By calculating Ib, Ic, and Vce, we
can determine the performance of the amplifier and ensure it operates in the
correct region for efficient signal amplification.
 EXPERIMENT 2

AIM: To study input and output characteristics of a npn Bipolar Junction

Transistor (BJT) in Common-emitter configuration.
THEORY: The transistor is a two junction, three terminal semiconductor device
which has three regions namely the emitter region, the base region, and the
collector region. There are two types of transistors, an npn transistor has an n
type emitter, a p type base and an n type collector while a pnp transistor has a p
type emitter, an n type base and a p type collector. The emitter is heavily doped,
base region is thin and lightly doped, and collector is moderately doped and is the
largest. The current conduction in transistors takes place due to both charge
carriers- that is electrons and holes and hence they are named Bipolar Junction
Transistors (BJT).
• Input Characteristics: - It is the curve between input current IB and input
voltage VBE constant collector emitter voltage VCE. The input characteristic
resembles a forward biased diode curve. After cut in voltage the IB
increases rapidly with small increase in VBE. It means that dynamic input
resistance is small in CE configuration. It is the ratio of change in VBE to the
resulting change in base current at constant collector emitter voltage. It is
given by ΔVBE / ΔIB.

• Output Characteristics: - This characteristic shows relation between

collector current IC and collector voltage for various values of base current.
The change in collector emitter voltage causes small change in the collector
current for the constant base current, which defines the dynamic resistance
and is given as ΔVCE / ΔIC at constant IB. The output characteristic of
common emitter configuration consists of three regions: Active, Saturation
and Cut-off.
SIMULATIONS:
1. INPUT CHARACTERISTICS:

2. Output Characteristics:
CONCLUSION:
1. Input Characteristics:
The values were noted, and corresponding graph were drawn using
Microsoft Excel.
2. Output Characteristics:
By changing the base resistor to control the respective currents, and
corresponding collector currents were recorded and the graph was drawn
and verified by the calculations.
 Experiment 3

AIM: Single stage BJT CE amplifier. (Find performance parameters - Av, Ri, Ro )
Theory: Substituting the re equivalent circuit results in Circuit. Note the absence of RE due to
the low-impedance shorting effect of the bypass capacitor, CE . That is, at the frequency (or
frequencies) of operation, the reactance of the capacitor is so small compared to RE that it is
treated as a short circuit across RE . When Vcc is set to zero, it places one end of R1 and RC at
ground potential. In addition, R1 and R2 remain part of the input circuit, whereas RC is part of
the output circuit.
Input Impedance is given by

Zi=R1||R2|| βre

Output Impedance is given by

Zo=Rc||ro
Voltage gain is given by

Av= -Rc||ro / re

Phase Relationship: The negative sign of Av reveals a 180°phase shift between Vo and Vi .

Simulations:
Calculations:
From the above circuit we can see that Vi and VO are the input and output voltages of the
following voltage divider circuit. We will first find Av analytically using the given data. β

We know that,

𝒁𝒊 = 𝑹𝟏 || 𝑹𝟐 || 𝜷𝒓𝒆
And we approximate
𝛽𝑟𝑒 ≫ 10𝑅2
90 × 15𝑘Ω ≫ 10 × 8.2𝑘Ω
135𝑘Ω ≫ 82𝑘Ω
Now
 𝑅2
𝑉𝑡ℎ = 𝑉𝑐𝑐 ( )
𝑅1 + 𝑅1
So
𝑉(8.2𝑘Ω) = 2.81 𝑉
Now we know that
𝑉𝐸 = 𝑉𝐵 − 𝑉𝐵𝐸
And VBE = 0.7 V, So
𝑉𝐸 = 𝑉(8.2𝑘Ω) − 0.7𝑉
𝑉𝐸 = 2.81𝑉 − 0.7𝑉
𝑉𝐸 = 2.11𝑉
And
𝐼𝐸 = 𝑉𝐸/𝑅𝐸
𝐼𝐸 = 2.11𝑉/1.5𝑘Ω
𝐼𝐸 = 1.407 𝑚𝐴
And after finding the emitter current IE we can deduce re and find out Zi
So
𝑟𝑒 = 26𝑚𝑉/𝐼𝐸

𝑟𝐸 = 18.48Ω
Now substituting rE value in the initial equation
𝛽𝑟𝑒 = 18.48 × 90 = 1.6632 𝑘Ω
So

∴ 𝑍𝑖 = 1.407 𝑘Ω
Now we will find the voltage gain

𝑉𝑜 = −𝐼𝐶 𝑅𝐶
𝑉𝑜 = −𝛽𝐼𝑏 𝑅𝐶
𝛽 × 𝑉𝑖 × 𝑅𝐶
𝑉𝑜 = −
𝛽𝑟𝐸
𝑉𝑜 𝑅𝐶
= −
𝑉𝑖 𝑟𝑒
So

∴ 𝐴𝑣 = −368
Hence, we got voltage gain Av = -368 (the -ve sign indicates the shift of phase by 180°)
So, we by analytical method we got the value of Av and also the input impedance
Zi
Conclusion:
This Experiment we know the AC Analysis of BJT Voltage Divider Bias Circuit.
Through Ac Analysis we can Calculate re , ro and Av(Voltage Gain). a high Av
suggests significant amplification, while a low Av may indicate inefficiency or that
the circuit is configured for other purposes like impedance matching. Lower ro_is
generally preferred for better power transfer to the load and minimal signal
attenuation. re is the intrinsic resistance of the transistor's emitter, often
influenced by the thermal voltage and biasing current.
 Experiment No. 4

Aim: Simulate frequency response of single stage BJT CE amplifier. (Effect of

coupling and bypass capacitors.)

Apparatus: Multisim
i). Standard Capacitors of Capacitances 10μF, 20μF and 10μF (CS, CE and CC)
ii). Standard Resistors of Resistances 56kΩ, 8.2kΩ, 6.8kΩ and 1.5kΩ (R1, R2, RC and
RE) and a load resistance RL=10kΩ
iii). BJT NPN Transistor (BC546BP) (β = 90)
iv). VCC source (22V)
v). Function Generator
vi). Oscilloscope
vii). Grapher

Introduction:
A practical amplifier circuit is meant to raise the voltage level of the input signal.
This signal may be obtained from anywhere e.g. radio or TV receiver circuit. Such a
signal is not of a single frequency. But it consists of a band of frequencies, e.g. from
20 Hz to 20 KHz. If the loudspeakers are to reproduce the sound faithfully, the
amplifier used must amplify all the frequency components of signal by same
amount. If it does not do so, the output of the loudspeaker will not be an exact
replica of the original sound. When this happens then it means distortion has been
introduced by the amplifier. Consider an RC coupled amplifier circuit shows
frequency response curve of a RC coupled amplifier. The curve is usually plotted on
a semi log graph paper with frequency range on logarithmic scale so that large
frequency range can be accommodated. The gain is constant for a limited band of
frequencies. This range is called mid-frequency band, and gain is called mid band
gain. AVM. On both sides of the mid frequency range, the gain decreases. For very
low and very high frequencies the gain is almost zero.

The frequency response of the amplifier depends on the values of coupling and
bypass capacitors, as well as other circuit elements.
1. Coupling Capacitor
These block DC while allowing AC signals to pass, preventing the biasing
conditions from being disturbed. At low frequencies, their reactance
increases, leading to attenuation.
2. Bypass Capacitor
Connected across the emitter resistor, these capacitors provide a low
impedance path for AC signals, maximizing the voltage gain at mid and high
frequencies. At low frequencies, their high reactance reduces the gain.

The frequency response is divided into three regions:

• Low-frequency range: Dominated by coupling and bypass capacitors.
• Mid-frequency range: Gain is stable, determined by circuit parameters.
• High-frequency range: Dominated by transistor junction capacitances.

In mid band frequency range, the coupling capacitors and bypass capacitors are as
good as short circuits. But when the frequency is low. These capacitors can no
longer be replaced by the short circuit approximation.

At low frequency, output capacitor reactance increases. The voltage across

RL reduces because some voltage drop takes place across XC. Thus, output voltage
reduces.

The XC reactance not only reduces the gain but also changes the phase between
input and output. It would not be exactly 180o but decided by the reactance. At zero
frequency, the capacitors are open circuited therefore output voltage reduces to
zero.
The gain is constant over the frequency range. The frequencies at which the gain
reduces to 70.7% of the maximum gain are known as cut off frequencies, upper cut
off and lower cut off frequency shows these two frequencies. The difference of
these two frequencies is called Band width (BW) of an amplifier.
BW = f2 – f1.

At f1 and f2, the voltage gain becomes 0.707Av(mid). The output voltage reduces to
1 / √2 of maximum output voltage. Since the power is proportional to voltage
square, the output power at these frequencies becomes half of maximum power.
The gain on dB scale is given by

20 log10(V2 / V1) = 20 log10(0.707) =10 log10 (1 / √2 )2 = 10 log10(1 / 2) = -3 dB.

Circuit Diagram:
Observation:

Result:
1. Lower cut off Frequency 393.36Hz

2. Upper cut off Frequency 27.05MHz

3. Bandwidth 27.05MHz

Conclusion:

• Effect of Coupling Capacitors:

At low frequencies, the gain is low due to the high reactance of coupling

capacitors. Increasing the capacitor values shifts the lower cutoff frequency

downward.
• Effect of Bypass Capacitor:

The bypass capacitor significantly improves gain in the mid-frequency range

by reducing the AC impedance of the emitter resistor.

• Overall Frequency Response:

• The amplifier exhibits stable gain over the mid-frequency range.

• Attenuation occurs at both low and high frequencies due to reactive

components.
 Experiment 5

Aim: To find Frequency response, bandwidth and voltage gain of FET.

Components:
( Multisim 14.3)
JFET_N – 2N5485
Resistors
Capacitors
Voltage source(AC)
VDD
Oscilloscope

Circuit Diagram :
Theory:
1. In Multisim software draw the circuit diagram given in Figure 4.
2. Place all the necessary components required for the design of the CS FET
amplifier circuit i.e., Resistors, Capacitors, Transistors, Voltage sources,
Power sources, Ground etc on the design window.
3. Connect all the components by proper wiring and assure that nodes are
formed at the interconnection points.
4. Connect the two channels of the Oscilloscope to input and output of the
circuit and by using the simulation switch and check the input and output
waveforms.
5. Set the input at 1 mV peak and 1kHz.
6. Assign net numbers to input and output wires by double clicking on the
particular wire and clicking on the show option.
7. To observe the frequency response, go to simulate-----► analysis-----►ac
analysis and select the start and stop frequencies, select vertical scale as
decibels, specify the output variables and click on simulate.
8. A window opens showing the frequency response on the top and phase
response at the bottom.

A Field Effect Transistor (FET) amplifier is a device that amplifies input signals. The
gain, bandwidth, and frequency response depend on the circuit components,
operating conditions, and parasitic effects. These parameters are critical in
designing amplifiers for various applications.
1. Frequency Response:
The frequency response of an amplifier represents its ability to amplify
signals of different frequencies. It has three regions:
o Low-Frequency Region: Dominated by coupling and bypass
capacitors.
 o Mid-Frequency Region: Gain is stable and determined by circuit
parameters.
o High-Frequency Region: Affected by parasitic capacitances and
resistances.
2. Voltage Gain (Av):
The voltage gain of a FET amplifier in the mid-frequency range is:
Av=−gm⋅RD/1+gm⋅RS
Where:
o gm: Transconductance of the FET
o RD: Drain resistor
o RS: Source resistor (partially or fully bypassed)
3. Bandwidth:
The bandwidth (BWBWBW) is the range of frequencies over which the
amplifier maintains a relatively constant gain. It is defined between the
lower cutoff frequency (fL) and upper cutoff frequency (fH)
BW=fH−fL
4. Cutoff Frequencies:
o fL : Determined by coupling and bypass capacitors.
o fH: Determined by internal capacitances of the FET and circuit layout.
Result : Lower Cutoff: 10.1381 MHz
Higher Cutoff: 21.2006 MHz
Bandwidth : 11.0625 MHz
FET Amplifiers:
Lower Cut-Off: Affected by input coupling capacitors and gate-source capacitance.
Higher Cut-Off: Determined by internal capacitances, especially the gate-drain
capacitance.

Voltage Gain
Analytical Calculation:
Gm=2.46Ms
Av=4.5
Result:
1. Frequency Response :
Lower Cutoff: 10.1381 MHz
Higher Cutoff: 21.2006 MHz
Bandwidth : 11.0625 MHz

2. Voltage Gain:

Analytical Multisim

Av 4.5 4.9
Conclusion:
In our Multisim experiment on the FET circuit, we calculated the frequency
response, bandwidth, and voltage gain. The results showed that the FET maintains
stable gain within a specific frequency range, defining its bandwidth. Beyond the
cutoff frequencies, the gain drops, indicating the circuit's limitations at higher
frequencies. This confirms the FET's effectiveness for applications within its
bandwidth range, providing consistent amplification
 Experiment 6:

Aim: Transfer and Drain Characteristics of MOSFET Aim: To plot the Transfer and
Drain characteristics of a FET.

Simulation:
Theory:
OUTPUT/DRAIN CHARACTERISTICS:

1. Connect the circuit as per given diagram properly.

2. Keep VGS constant at some value say 0.25 V by varying VGG

3. Vary VDS in step of 1V up to 10 volts and measure the drain current ID.
Tabulate all the readings.
4. Repeat the above procedure for VGS as -1V, -2V.

TRANSFER CHARACTERISTICS:
5. Connect the circuit as per given diagram properly.

6. Set the voltage VDS constant at 10 V.

7. Vary VGS by varying VGG in the step of 0.1 up to 3V and note down value of
drain current ID. Tabulate all the readings.
8. Plot the output characteristics VDS vs ID and transfer characteristics VGS vs
ID.
 9. Calculate gm, rd from the graphs and verify it

A Field Effect Transistor (FET) is a voltage-controlled semiconductor device widely

used for amplification and switching. It has three terminals: Source (S), Gate (G), and
Drain (D).
1. Types of FET:
o Junction FET (JFET)
o Metal-Oxide Semiconductor FET (MOSFET)
2. Key Operating Regions:
o Cutoff Region: VGS<VGS(th)V_{GS} < V_{GS(th)}VGS<VGS(th), where
ID=0I_D = 0ID=0.
o Ohmic Region: VDS<VDS(sat)V_{DS} < V_{DS(sat)}VDS<VDS(sat), the FET
behaves like a resistor.
o Saturation Region: VDS>VDS(sat)V_{DS} > V_{DS(sat)}VDS>VDS(sat),
where IDI_DID becomes almost constant and the FET is in its active
region.
3. Characteristics:
o Drain Characteristics (IDI_DID vs. VDSV_{DS}VDS):
Shows the variation of drain current IDI_DID with drain-source voltage
VDSV_{DS}VDS for different values of VGSV_{GS}VGS.
o Transfer Characteristics (IDI_DID vs. VGSV_{GS}VGS):
Shows how IDI_DID changes with gate-source voltage VGSV_{GS}VGS
when VDSV_{DS}VDS is constant, typically in the saturation region.
4. Equations:
o In the saturation region:
ID=IDSS(1−VGS/V(p))2 where IDSS is the maximum drain current when
VGS=0V, and V(p) is the threshold voltage.
Observation Table: Output Characteristics:

Transfer Characteristics:

VDD = 3.8 V
VGS ID
0.2 7.77
0.6 5.96
1.0 4.30
1.4 2.84
1.8 1.71
2.2 0.71
Pinch off voltage Vp = 3V IDSS= 8.75 mA
Calculations:
gmo = 2IDSS/Vp = 3.027 m mho rd = ∆VDS/∆ID = 4.075 k ohm
GRAPH :

Conclusion:
Drain Characteristics:
The plot of IDI_DID vs. VDSV_{DS}VDS demonstrates the FET's behavior in different
regions.
• At low VDSV_{DS}VDS, the FET operates in the Ohmic region.
• At higher VDSV_{DS}VDS, it enters the saturation region, where IDI_DID is
constant.
 Transfer Characteristics:
The IDI_DID vs. VGSV_{GS}VGS curve shows that as VGSV_{GS}VGS becomes more
negative (for JFET) or positive (for enhancement-mode MOSFET), the drain current
increases up to a point. This reflects the FET's sensitivity to gate voltage.
 Experiment 7
Aim: Design and simulate the voltage shunt Feedback amplifier
Apparatus : MultiSim Software: Components used in simulations are as follows –
• Standard Resistors of Resistances Ro=10 kΩ and R1= 1 kΩ
• VCC source = 12 V
• Function Generator
• Oscilloscope
Theory:
A Voltage Shunt Feedback Amplifier uses a feedback mechanism where a portion of the
output voltage is fed back into the input in parallel (shunt) with the signal source. This
topology is typically used to achieve improved stability, bandwidth, and reduced
distortion in amplifier circuits.

Key Characteristics:
1. Feedback Type: Negative feedback is applied to stabilize gain and improve linearity.
2. Topology: The feedback network connects the output to the inverting input, providing
a parallel feedback path.
3. Input and Output Impedance:
- Input Impedance: Decreases due to shunt feedback.
- Output Impedance: Decreases due to the voltage feedback.

Working Principle:
1. Operation: The feedback circuit samples the output voltage and injects a proportional
amount into the input in opposition to the input signal.
2. Error Signal: The difference between the input and feedback signal is amplified.
3. Gain Reduction: The closed-loop gain is lower than the open-loop gain but more
stable.
Circuit Diagram:

Observations and Calculations:

Considering the ideal op-amp characteristics, Ii = 0, Vi = 0, and voltage gain of infinity,
we have

𝑉𝑜
𝐴= =∞
𝐼𝑖

𝐼𝑓 1
𝛽= =−
𝑉𝑜 𝑅𝑜
The gain with feedback is then,

𝑉𝑜 𝑉𝑜 𝐴 1
𝐴𝑓 = = = = = −𝑅𝑜
𝐼𝑠 𝐼𝑖 1 + 𝛽𝐴 𝛽

This is a transfer resistance gain.

The more usual gain is the voltage gain with feedback,

𝑉𝑜 𝐼𝑠 1 𝑅𝑜
𝐴𝑣𝑓 = = (−𝑅𝑜 ) = −
𝐼𝑠 𝑉1 𝑅1 𝑅1
Given the values of Ro = 10 kΩ and R1 = 1 kΩ,

𝐴𝑓 = −𝑅𝑜 = −10,000

𝑅𝑜 10000
𝐴𝑣𝑓 = − =− = −10
𝑅1 1000

Hence, we got the voltage gain with feedback as Avf = -10.

Conclusion:
The experiment to design and simulate a voltage shunt feedback amplifier
demonstrates the following key points:
1. Improved Stability:
The addition of shunt feedback stabilizes the gain of the amplifier by reducing the
dependency on transistor parameters, which may vary due to temperature
changes or manufacturing differences.
2. Reduced Gain:
The voltage gain of the amplifier decreases with feedback, as expected from the
feedback theory. However, the gain becomes more linear and predictable.
3. Enhanced Bandwidth:
Feedback extends the amplifier's bandwidth, making it suitable for applications
requiring a wider frequency response.
4. Lower Input Impedance:
Due to the shunt configuration, the input impedance decreases. This behavior is
beneficial for circuits where the amplifier must interact with low-impedance
sources.
5. Reduced Distortion:
The feedback helps minimize harmonic distortion, improving the amplifier's
output signal quality.
6. Output Resistance:
The output impedance decreases in this configuration, improving the amplifier's
ability to drive low-resistance loads.
 Experiment 8

Aim: Design and simulate the Voltage series Feedback amplifier using an OP –
amp.
Theory:
A voltage series feedback amplifier is a configuration where a portion of the
output voltage is fed back to the input in series with the source signal. This
type of feedback improves the amplifier's performance by stabilizing the gain,
reducing distortion, increasing bandwidth, and altering input/output
impedance.
1. Characteristics of Voltage Series Feedback:
o Input Impedance: Increases due to series feedback.
o Output Impedance: Decreases, improving the driving capability of
the amplifier.
o Bandwidth: Feedback extends the bandwidth at the cost of
reduced gain.
o Gain: Stabilized and reduced from the open-loop gain.
2. Feedback Factor (β\betaβ):
The ratio of the feedback signal to the output signal:
Af=A/1+Aβ
Where:
o A = Gain without feedback
o Af = Gain with feedback
o β = Feedback factor
3. Advantages:
o Increased linearity
o Reduced noise and distortion
o Predictable and stable gain
 4. Circuit Configuration:
o Use an op-amp (e.g., 741 or LM358) with feedback provided
through a resistor network.

Closed-Loop Voltage Gain:

Af=R2+R1/R1
R1: Input resistor
R2: Feedback resistor
Input Impedance: For series feedback:
Zin(f)= (1+Aβ)Zin
Output Impedance:
Zout(f)=Zout/1+Aβ
Simulation :
Conclusion:
1. Stabilized Gain:
The experiment demonstrates that feedback stabilizes the amplifier's gain, making it
less dependent on the op-amp's open-loop characteristics.

2. Enhanced Bandwidth:
The bandwidth increases significantly in the closed-loop configuration, making the
amplifier suitable for high-frequency applications.

3. Improved Impedance:
o The input impedance increases, ensuring better compatibility with high-
impedance sources.
o The output impedance decreases, enabling the amplifier to drive lower
impedance loads effectively.

4. Reduced Distortion and Noise:

Voltage series feedback improves the linearity of the amplifier, resulting in reduced
distortion and noise.

5. Trade-off:
While gain reduces in the feedback configuration, the overall performance of the
amplifier improves significantly, highlighting the advantages of using feedback in
practical circuit designs.
 Experiment 9
Aim: Design and simulate RC oscillators, Colpitts oscillator and Hartley
oscillator. (Compare practical and theoretical oscillation frequency.)
Theory:
Oscillators are electronic circuits designed to generate periodic waveforms
without any external input signal. RC oscillators, Colpitts oscillators, and Hartley
oscillators are among the widely used oscillators in electronics, each employing
a different mechanism to produce sustained oscillations.
1. RC Oscillator:
• Principle:
o The RC oscillator uses a resistor-capacitor network to determine
the frequency of oscillation. It relies on phase shift provided by the
RC network and an amplifier with gain greater than 1 to satisfy the
Barkhausen criterion for sustained oscillations.

• Frequency of Oscillation: 𝑓 = 1/2𝜋𝑅𝐶 √6

o Where R and C are the resistor and capacitor values in the phase
shift network.
2. Colpitts Oscillator:
• Principle:
o This oscillator uses a combination of inductors and capacitors (LC
tank circuit) for frequency selection. The capacitive divider in the
LC tank provides feedback.

• Frequency of Oscillation: 𝑓 = 1/2𝜋√𝐿. 𝐶𝑒𝑞

o Where 𝐶𝑒𝑞 = 𝐶1 ⋅ 𝐶2/𝐶1 + 𝐶2 is the equivalent capacitance of
the capacitive divider.

• For BJT 𝑓𝑜 = 1/2𝛱𝑅𝐶 1/√(6 + 4(𝑅𝑐/𝑅))

• Operation:
 o The feedback loop, formed by the capacitive divider, ensures a
180° phase shift, while the amplifier contributes another 180°,
providing the required 360° phase shift.
3. Hartley Oscillator:
• Principle:
o Similar to the Colpitts oscillator, the Hartley oscillator uses an LC
tank circuit but employs an inductive divider (two inductors or a
tapped inductor) for feedback.

• Frequency of Oscillation: 𝑓 = 1/2𝜋√𝐿. 𝐶𝑒𝑞

o Where 𝐿𝑒𝑞 = 𝐿1 + 𝐿2 (if L1 and L2 are magnetically coupled with
mutual inductance M).
Simulation:
1. RC phase shift oscillator:
2. Colpitts oscillator:

3. Hartley oscillator:
Graphs:
1. RC phase shift oscillator:

2. Colpitts oscillator:
 3. Hartley oscillator:

Calculations:
1. RC Phase Shift Oscillator
𝑅𝑐 = 2𝑘𝛺, 𝑅 = 𝑅5 = 𝑅6 = 𝑅7 = 1𝑘𝛺, 𝐶 = 𝐶3 = 𝐶4 = 𝐶5 = 3.3𝑛𝑓
𝑓𝑜 = 1/2𝛱𝑅𝐶 1/√(6 + 4(𝑅𝑐/𝑅)) =
= 1/2𝛱𝑋1𝑘𝑋3.3𝑛 1/√(6 + 4(2𝑘/1𝑘)) = 12.889 𝑘𝐻𝑧
1/𝑓𝑜 = 1/(12.889 𝑘) = 77.58𝜇𝑠
2. Colpitts Oscillator
𝐶3 = 10𝑛𝐹, 𝐶4 = 10𝑛𝑓, 𝐿 = 𝐿3 = 10𝑚𝐻
𝐶𝑒𝑞 = 𝐶3𝐶4/(𝐶3 + 𝐶4) = (10𝑛 𝑋 10𝑛)/(10𝑛 + 10𝑛) = 5 𝑛𝑓
𝑓𝑜 = 1/(2𝛱√𝐿𝐶𝑒𝑞) = 1/(2𝛱√(10𝑚 𝑋 5𝑛)) = 22.507 𝑘𝐻𝑧
1/𝑓𝑜 = 1/(22.507 𝑘) = 44.43𝜇𝑠

3. Hartley Oscillator
𝐿1 = 1𝑚𝐻, 𝐿2 = 1𝑚𝐻, 𝐶 = 𝐶3 = 10𝑛𝑓
 𝐿𝑒𝑞 = 𝐿1 + 𝐿2 + 2𝑀 = 𝐿1 + 𝐿2 = 1𝑚𝐻 + 1𝑚𝐻 = 2 𝑚𝐻
𝑓𝑜 = 1/(2𝛱√𝐿𝑒𝑞𝐶) = 1/(2𝛱√(2𝑚 𝑋 10𝑛)) = 35.588 𝑘𝐻𝑧
1/𝑓𝑜 = 1/(35.588 𝑘) = 28.09𝜇𝑠

Conclusion:
From the design and simulation of RC, Colpitts, and Hartley oscillators:
1. RC Oscillator:
o The practical oscillation frequency closely matches the theoretical
value if component tolerances are minimal.
o Useful for low-frequency applications where RC components can
be easily implemented.
2. Colpitts Oscillator:
o Provides better frequency stability due to its LC tank circuit.
o The practical frequency is slightly lower than the theoretical value
due to stray capacitances and inductor resistance.
3. Hartley Oscillator:
o Similar to the Colpitts oscillator but uses an inductive divider for
feedback.
o Practical frequency deviations occur for similar reasons as the
Colpitts oscillator.
 Experiment 10
Aim: Design and simulate Power Amplifiers - Class A, Class AB complementary
symmetry. (Efficiency calculations and comparison)
Theory:
Power amplifiers are electronic circuits designed to deliver high power to a
load, such as a speaker or antenna. They amplify the signal's power while
ensuring minimal distortion and adequate efficiency.
Class A Amplifier:
• Operation: The transistor operates in the active region throughout the
input cycle, meaning it conducts for the entire 360° of the input
waveform.
• Efficiency: Typically low, with a theoretical maximum of 25% (with
resistive load) or 50% (with transformer coupling).
Class AB Complementary Symmetry Amplifier:
• Operation: Combines the features of Class A and Class B amplifiers. Each
transistor conducts for slightly more than half the input cycle (>180° but
<360°), reducing crossover distortion while improving efficiency
compared to Class A.
• Efficiency: Between 50% to 78.5%

Power Amplifiers:
CLASS A AMPLIFIER Circuit
Multisim

Formula:
2
𝑉𝑐2 (𝑟𝑚𝑠) 𝑉𝐶𝐸 (𝑝−𝑝) 𝑃𝑜 (𝑎𝑐)
Po(ac)= = , Pi(dc)= VCC X ICQ, %𝜂 = X 100%
𝑅𝑐 8 𝑋 𝑅𝑐 𝑃𝑖 (𝑑𝑐)

Calculations:
VCE(p-p) = 17.568 V, RC= 100 𝛺
2
𝑉𝑐2 (𝑟𝑚𝑠) 𝑉𝐶𝐸 (𝑝−𝑝) 17.5682
Po(ac)= = = = 0.385 W
𝑅𝑐 8 𝑋 𝑅𝑐 8 𝑋 100

VCC = 20 V, ICQ = 0.1 A

Pi(dc)= VCC X ICQ = 20 X 0.1 = 2 W
𝑃𝑜 (𝑎𝑐) 0.385
%𝜂 = (𝑑𝑐)
X 100% = X 100% = 19.25%
𝑃𝑖 2

CLASS AB AMPLIFIER Circuit

Multisim
Formula:
𝑉𝐿2 (𝑝) 𝑉𝐶𝐶 𝑋 𝐼(𝑝) 𝑉𝐶𝐶 𝑋 𝑉𝐿 (𝑝) 𝑃𝑜 (𝑎𝑐)
Po(ac)= , Pi(dc)= = , %𝜂 = X 100%
2 𝑋 𝑅𝐿 𝜋 𝜋 𝑋 𝑅𝐿 𝑃𝑖 (𝑑𝑐)

Calculations:
VL(p) = 9.9V ≈ 10 𝑉 , RL = 100 𝛺
𝑉𝐿2 (𝑝) 102
Po(ac)= = = 0.5 W
2 𝑋 𝑅𝐿 2 𝑋 100

VCC = 20 V, VL(p) = 9.9V ≈ 10 𝑉 , RL = 100 𝛺

𝑉𝐶𝐶 𝑋 𝐼(𝑝) 𝑉𝐶𝐶 𝑋 𝑉𝐿 (𝑝)
Pi(dc)= =
𝜋 𝜋 𝑋 𝑅𝐿

20 𝑋 10
= = 0.6366 W
𝜋 𝑋 100
𝑃𝑜 (𝑎𝑐) 0.5
%𝜂 = (𝑑𝑐)
X 100% = X 100% = 78.54%
𝑃𝑖 0.6366

Observation
Parameter Class A Amplifier Class AB
Amplifier
Output AC Power (Po(ac)) 0.385 W 0.5 W
Input DC Power (Pi(dc)) 2W 0.6366 W
Efficiency (%𝜂) 19.25% 78.54%

• The calculated efficiency (%η=19.25 ) is much lower than the theoretical

maximum of 50% for transformer-coupled Class A amplifiers
• The efficiency (η=78.54%) is significantly higher than that of the Class A
amplifier and very close to the theoretical maximum for Class AB
amplifiers (78.5%).
• Class AB is far more efficient than Class A, making it better suited for
practical power amplification where energy conservation is crucial.