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DSP PPT MOD 1

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58 views54 pages

DSP PPT MOD 1

Uploaded by

Prekshith Gowda
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Module 1- Introduction to Digital Signal

Processing

Presented by:
Bhargavi K Rao
Assistant Professor
Dept. of ECE
TEXT BOOK:
1. “Digital Signal Processing”, Avatar Singh and S. Srinivasan, Thomson
Learning, 2004.

REFERENCE BOOKS:
1.Digital Signal Processing: A practical approach, Ifeachor E. C.,
Jervis B. W Pearson- Education, PHI, 2002.
2.“Digital Signal Processors”, B Venkataramani and M Bhaskar TMH,
2nd, 2010.
3. “Architectures for Digital Signal Processing”, Peter Pirsch John
Weily, 2008.
Learning objectives
 To understand the DSP system, the sampling process, DFT &

FFT.

 To familiarize the concepts of linear time-invariant systems,

digital filters, decimation & interpolation.

 Analysis and design tool for DSP system: MATLAB


Contents
 Introduction
 A Digital Signal- Processing System
 The Sampling Process, Discrete Time Sequences
 Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT)
 Linear Time-Invariant Systems
 Digital Filters
 Decimation and Interpolation
1.1 What is DSP?
 DSP is a technique of performing the mathematical operations on the
signals in digital domain. As real time signals are analog in nature first
we need to convert the analog signal to digital, then we have to
process the signal in digital domain and again converting back to
analog domain. Thus ADC is required at the input side whereas a DAC
is required at the output end. A typical DSP system is as shown in
figure 1.1.
1.2 Need for DSP

Analog signal Processing has the following drawbacks:

 Sensitive to environmental changes


 Aging of devices
 Uncertain performance in production units
 Variation in performance of units
 Cost of the system will be high

 If the Digital Signal Processing would have been used we can


overcome the above shortcomings of ASP.
Examples of DSP
 Speech and Audio systems
 Telecommunication applications such as modem
 Electronic and biomedical instrumentation
 Image processing
 Robotics
 Control applications etc…..
BLOCK DIAGRAM OF DSP SYSTEM
 DSP system consists of the DSP processor between the analog
front end and analog back end
 The analog front end consists of antialiasing filter, a sample and
hold circuit and analog to digital (A/D) converter feeding into the
DSP.
 The back end consists of a digital to analog (D/A) converter to
convert the digital output to its analog value followed by a
reconstruction filter.
 The antialiasing filter, an analog lowpass filter, is used to band limit
the input analog signal to the required frequency range and
prevent frequency components beyond this range from appearing
as aliases in the sampled spectrum of the input signal.
 The sample and hold circuit presents the samples of the input
signal at the rate determined by the system design requirements to
the input of the analog to digital converter.
 It also holds these samples at constant levels irrespective of the
variations in the input signal in the interval between sampling
instants.
 The analog to digital converter maps the value of the analog input
sample to its equivalent digital representation and feeds it to the
DSP.
 After processing the digital outputs of the DSP are converted to
their equivalent analog values by the digital to analog converter.
 These discrete analog values are converted to a smooth,
continuous waveform by the reconstruction filter at the output
for the use in the real world.
Issues to be considered in designing and
implementing a DSP system
 Complexity of the algorithm: The arithmetic operations to be
performed and the precision required are decided by the
application.
 Sample rate: The rate at which input samples are received and
processed varies with the application, and this rate along with the
algorithm complexity determines whether a particular DSP is
suitable for a given application.
 Speed: This depends on the technology. To meet specified
throughput requirement with a given sample rate, it must be
possible to operate the DSP at a particular clock rate . If this speed
is not achievable in a given technology, a faster technology or
other options must be explored.
 Data representation: The format and the number of bits used for
data representation depend on the arithmetic precision and the
dynamic range required for the given application.
Major Features of Programmable Digital Signal
Processors
 Multiply – accumulate hardware
 Harvard architecture
 Zero overhead looping
 Specialized addressing
 Multiply-accumulate hardware
• It is most frequently used operation in DSP.
• To implement efficiently, the DSP has a hardware multiplier, an
accumulator with an adequate number of bits to hold the sum of
products and an explicit multiply-accumulate instruction.
 Harvard architecture
• There are two memory spaces in this, partitioned as program
memory and data memory.
• The processor core connects to these memory spaces by two
separate bus sets, allowing two simultaneous accesses to memory.
• This arrangement doubles the processor’s memory bandwidth, and
is crucial in keeping the processor core fed with data and
instructions
• Additional memory spaces and bus sets to are extended to achieve
even higher memory bandwidths.
 Zero-overhead looping
• One common characteristic of DSP algorithms is that most of the
processing time is spent on executing instructions contained within
relatively small loops.
• For this purpose most DSP processors include specialized hardware
for zero-overhead looping.
• The term zero-overhead looping means that the processor can
execute loops without consuming cycles to test the value of the loop
counter, perform a conditional branch to the top of the loop, and
decrement the loop counter.
 Specialized addressing
• DSP processors often support specialized addressing modes that are
useful for common signal processing operations and algorithms.
• Examples include modulo (circular) addressing, useful for
implementing digital filter lines.
1.3 A Digital Signal Processing System
 A computer or a processor is used for digital signal
processing. Antialiasing filter is a LPF which passes signal
with frequency less than or equal to half the sampling
frequency in order to avoid Aliasing effect. Similarly at the
other end, reconstruction filter is used to reconstruct the
samples from the staircase output of the DAC (Figure 1.2).
Signals that occur in a typical DSP are as shown in figure 1.3.

Fig 1.3: (a) Continuous time signal (b) Sampled Signal (c) Sampled Data Signal
(d) Quantized Signal (e) DAC Output
1.4 The Sampling Process

 ADC process involves sampling the signal and then quantizing the
same to a digital value. In order to avoid Aliasing effect, the signal
has to be sampled at a rate at least equal to the Nyquist rate. The
condition for Nyquist Criterion is as given below,
fs= 1/T ≥ 2 fm
where fs is the sampling frequency
fm is the maximum frequency component in the message signal

 If the sampling of the signal is carried out with a rate less than the
Nyquist rate, the higher frequency components of the signal cannot
be reconstructed properly. The plots of the reconstructed outputs
for various conditions are as shown in figure 1.4.
Fig 1.4 Verification of Sampling Theorem
1.5 Discrete Time Sequences
 Consider an analog signal x(t) given by, x(t)= A cos (2πft)
 If this signal is sampled at a Sampling Interval T, in the above equation
replacing t by nT we get,
x (nT) = A cos (2πfnT) where n= 0,1, 2,..etc
 For simplicity denote the sequence x (nT) as x (n)
∴ x (n) = A cos (2πfnT) where n= 0,1, 2,..etc
 We have fs=1/T also θ = 2πfT
∴ x (n) = A cos (2πfnT)= A cos (2πfn/fs) = A cos θn
 The quantity θ is called as digital frequency,
θ = 2πfT = 2πf/fs radians
 Note that the digital frequency range , for a properly sampled signal as
obtained from above equation, is from 0 to ∏
 The above x(n) sequence called the sinusoidal sequence.
 A sequence that repeats itself after every period N is called a
periodic sequence. Consider a periodic sequence x (n) with period
N, x (n)=x (n+N) n=……..,-1,0,1,2,……..

 Frequency response gives the frequency domain equivalent of a


discrete time sequence. It is denoted as X (e jθ),
𝑵−𝟏
X(ejθ)= 𝒏=𝟎 𝒙(𝒏) e -jnθ

 Where θ is the digital frequency, which ranges from o to 2∏


 Frequency response of a discrete sequence involves both magnitude
response and phase response.
1.6 Discrete Fourier Transform and Fast Fourier
Transform

 1.6.1 DFT Pair

 DFT is used to transform a time domain sequence x (n) to a


frequency domain sequence X (K).

 The equations that relate the time domain sequence x (n) and
the corresponding frequency domain sequence X (K) are
called DFT Pair and is given by,
1.6.2 The Relationship between DFT and Frequency Response

 X(ejθ)= 𝑵−𝟏
𝒏=𝟎 𝒙(𝒏) e-jnθAlso,

 X (K)=Σx(n) e-j2πnk/N
 ∴ X (K)= X (e jθ) at θ = 2πk/N
 From the above expression it is clear that we can use DFT to find the
Frequency response of a discrete signal.
 Spacing between the elements of X(k) is given
as∆f=fs/N=1/NT=1/T0
 Where T0 is the signal record length
 It is clear from the expression of ∆f that, in order to minimize the
spacing between the samples N has to be a large value.
 Although DFT is an efficient technique of obtaining the frequency
response of a sequence, it requires more number of complex
operations like additions and multiplications. Thus many
improvements over DFT were proposed.

 One such technique is to use the periodicity property of the twiddle


factor e-j2π/N. Those algorithms were called as Fast Fourier
Transform Algorithms. The following table depicts the complexity
involved in the computation using DFT algorithms.
Table 1.1 Complexity in DFT algorithm
Operations Number of Computations

Complex Multiplications N2

Complex Additions N (N-1)

Real Multiplications 4N2

Real Additions 2N (2N-1)

Trigonometric Functions 2N2


FFT algorithms are classified into two categories

1. Decimation in Time FFT


2. Decimation in Frequency FFT

 In decimation in time FFT the sequence is divided in time


domain successively till we reach the sequences of length 2.
Whereas in Decimation in Frequency FFT, the sequence X(K) is
divided successively. The complexity of computation will get
reduced considerably in case of FFT algorithms.
1.7 Linear Time Invariant Systems
 A system which satisfies superposition theorem is called as a linear
system and a system that has same input output relation at all times is
called a Time Invariant System. Systems, which satisfy both the
properties, are called LTI systems.
 LTI systems are characterized by its impulse response or unit sample
response in time domain whereas it is characterized by the system
function in frequency domain.
1.7.1 Convolution
 Convolution is the operation that related the input/output of an
LTI system to its unit sample response. The output of the system
y (n) for the input x (n) and the impulse response of the system
being h (n) is given as
y (n) = x(n) * h(n) =
∞ ∞
𝒎=−∞ 𝒙 𝒏 𝒉(𝒏 − 𝒎) = 𝒎=−∞ 𝒙 𝒏 𝒉(𝒏 − 𝒎)
 x(n) is the input of the system
 h(n) is the impulse response of the system y(n) is the output of
the system
 The * in the equation represent the convolution operation.
1.7.3 The System Function
 An LTI system is characterized by its System function or the
transfer function. The system function of a system is the ratio of
the Z transformation of its output to that of its input. It is denoted
as H (Z) and is given by

H (Z) = Y (Z)/ X (Z)

 The magnitude and phase of the transfer function H (Z) gives the
frequency response of the system. From the transfer function we
can also get the poles and zeros of the system by solving its
numerator and denominator respectively.
1.8 Digital Filters
 Filters are used to remove the unwanted components in the
sequence. They are characterized by the impulse response h (n). The
general difference equation for an Nth order filter is given by,
y (n) = Σ ak y(n-k)+ Σ bk x(n-k)

Fig 1.7: A structure of digital filters


 Values of the filter coefficients vary with respect to the
type of the filter. Design of a digital filter involves
determining the filter coefficients. Based on the length of
the impulse response, digital filters are classified into two
categories
 1.Finite Impulse Response (FIR) Filters

 2.Infinite Impulse Response (IIR) Filters


1.8.1 FIR Filters
 FIR filters have impulse responses of finite lengths. In FIR filters the
present output depends only on the past and present values of the input
sequence but not on the previous output sequences. Thus they are non
recursive hence they are inherently stable.
 FIR filters possess linear phase response. Hence they are very much
applicable for the applications requiring linear phase response.
 The difference equation of an FIR filter is represented as
y (n) = Σ bkx(n-k)
 The frequency response of an FIR filter is given as H (e jθ)=Σbk e-jkθ
Also H (Z)=Σbk Z-k
 The major drawback of FIR filters is, they require more number of filter
coefficients to realize a desired response as compared to IIR filters. Thus
the computational time required will also be more.
Find the magnitude and phase response of an FIR filter represented by the
difference equation y(n)= 0.5 x(n) + 0.5 x(n-1)

Y (n)= 0.5 x(n) + 0.5 x(n-1)


h (n)= 0.5 δ(n) + 0.5 δ(n-1) = [0.5 0.5] H (Z)= 0.5+0.5Z-1
H (e jθ)= 0.5+0.5 e -jθ
= 0.5+0.5 cos θ -j0.5 sin θ
=0.5 (1+ cos θ) -j0.5 sin θ
= [0.5*2* cos2 (θ/2)]-j[0.5*2* sin (θ/2)* cos (θ/2)]
= cos2 (θ/2) -j[sin (θ/2)* cos (θ/2)]

mag (H (e jθ)) = sqrt (cos4 (θ/2) +sin2 (θ/2) cos2 (θ/2))


= sqrt [cos2 (θ/2)( cos2 (θ/2)+ sin2 (θ/2))]
= cos (θ/2)

Similarly,

Phase (H (e jθ)) = tan –1[-(sin (θ/2) cos (θ/2))/ cos2 (θ/2)]


= tan –1[-tan (θ/2)]
= - (θ/2)
The magnitude and phase response curves of the designed FIR filter is
as shown in figure 1.8.
1.8.2 IIR Filters

 Unlike FIR filters, IIR filters have infinite number of impulse response samples.
They are recursive filters as the output depends not only on the past and present
inputs but also on the past outputs. They generally do not have linear phase
characteristics. Typical system function of such filters is given by,
H (Z) = (b0+b1z-1+b2z-2+…………bLz-L) / (1- a1z-1- a2 z-2-………aN z-N)

 Stability of IIR filters depends on the number and the values of the filter
coefficients.

 The major advantage of IIR filters over FIR is that, they require lesser
coefficients compared to FIR filters for the same desired response, thus requiring
less computation time.
2 Obtain the transfer function of the IIR filter whose difference equation is given by
y (n)= 0.9y (n-1)+0.1x (n)

y (n)= 0.9y (n-1)+0.1x (n)


Taking Z transformation both sides
Y (Z)= 0.9 Z-1 Y(Z) + 0.1 X(Z)
Y (Z) [ 1- 0.9 Z-1] = 0.1 X(Z)
The transfer function of the system is given by the expression, H (Z)= Y(Z)/X(Z)
= 0.1/ [ 1- 0.9 Z-1]

Realization of the IIR filter with the above difference equation is as shown in figure 1.9.
Fig 1.10 Frequency Response of the IIR Filter
1.8.3 FIR Filter Design
 Frequency response of an FIR filter is given by the following
expression, H (e jθ) =Σbk e-jkθ
 Design procedure of an FIR filter involves the determination of
the filter coefficients bk.
bk = (1/2π) ∫ H (e jθ) e-jkθ dθ
1.8.4 IIR Filter Design
 IIR filters can be designed using two methods using windows
and direct method.
 In this approach, a digital filter can be designed based on its
equivalent analog filter. An analog filter is designed first for
the equivalent analog specifications for the given digital
specifications. Then using appropriate frequency
transformations, a digital filter can be obtained.
 The filter specifications consist of passband and stopband
ripples in dB . Passband and Stopband frequencies in rad/sec.
Fig 1.11 Lowpass Filter Specifications

Direct IIR filter design methods are based on least squares fit to a desired
frequency response. These methods allow arbitrary frequency response
specifications
1.9 Decimation and Interpolation
 Decimation and Interpolation are two techniques used to alter the sampling
rate of a sequence.
 Decimation involves decreasing the sampling rate without violating the
sampling theorem whereas interpolation increases the sampling rate of a
sequence appropriately by considering its neighboring samples.
 Decimation is a process of dropping the samples without violating sampling
theorem. The factor by which the signal is decimated is called as decimation
factor and it is denoted by M. It is given by,
y(m)=w(mM)= Σ bk x(mM-k), where w(n)= Σ bk x(n-k)

Fig 1.12 Decimation Process


3. Let x(n)=[3 2 2 4 1 0 –3 –2 –1 0 2 3] be decimated with
a factor of 2. Let the filtered sequence be w(n)=[2.1 2 3.9 1.5
0.1 –2.9 –2 –1.1 0.1 1.9 2.9]. Obtain the decimated sequence
y(m)

 Sequence y(m) can be obtained by dropping every alternative sample


of w (n). y (m) = [2 1.5 -2.9 -1.1 1.9]
1.9.2 Interpolation
 Interpolation is a process of increasing the sampling rate by
inserting new samples in between. The input output relation
for the interpolation, where the sampling rate is increased
by a factor L, is given as,
y(m)= Σ bk w(m-k)
where w(n)= x(m/L), m=0,±L, ±2L……0 Otherwise

Fig 1.13 Interpolation Process


4. Let x(n)= [0 3 6 9 12] be interpolated with L=3. If the filter coefficients of the
filters are bk=[1/3 2/3 1 2/3 1/3], obtain the interpolated sequence

After inserting zeros,

w (m) = [0 0 0 3 0 0 6 0 0 9 0 0 12]

bk=[1/3 2/3 1 2/3 1/3] We have,


y(m)= Σ bk w(m-k) = b-2 w(m+2)+ b-1 w(m+1)+ b0 w(m)+ b1 w(m-1)+ b2
w(m-2)

Substituting the values of m, we get

y(0)= b-2 w(2)+ b-1 w(1)+ b0 w(0)+ b1 w(-1)+ b2 w(-2)= 0 y(1)= b-2 w(3)+ b-
1 w(2)+ b0 w(1)+ b1 w(0)+ b2 w(-1)=1 y(2)= b-2 w(4)+ b-1 w(3)+ b0 w(2)+ b1
w(1)+ b2 w(0)=2
Similarly we get the remaining samples as,

y (n) = [ 0 1 2 3 4 5 6 7 8 9 10 11 12]
Questions

1. Explain with the help of mathematical equations how signed numbers


can be multiplied. The sequence x(n) = [3,2,-2,0,7].It is interpolated using
interpolation sequence bk=[0.5,1,0.5] and the interpolation factor of 2.
Find the interpolated sequence y(m).

2. An analog signal is sampled at the rate of 8KHz. If 512 samples of this signal
are used to compute DFT X(k) determine the analog and digital frequency
spacing between adjacent X(k0 elements. Also, determine analog and digital
frequencies corresponding to k=60.

3. With a neat diagram explain the scheme of the DSP system.

4. What is DSP? What are the important issues to be considered in designing and
implementing a DSP system? Explain in detail.
5. Why signal sampling is required? Explain the sampling process.
6. Define decimation and interpolation process. Explain them using block diagrams
and equations. With a neat diagram explain the scheme of a DSP system.
7. With an example explain the need for the low pass filter in decimation process.
8. For the FIR filter y(n)=(x(n)+x(n-1)+x(n-2))/3. Determine i) System Function ii)
Magnitude and phase function iii) Step response iv) Group Delay.
9. List the major architectural features used in DSP system to achieve high speed
program execution.
10. Explain how to simulate the impulse responses of FIR and IIR filters.
11. Explain the two method of sampling rate conversions used in DSP system, with
suitable block diagrams and examples. Draw the corresponding spectrum.
12. Assuming X(K) as a complex sequence determine the number of complex
real multiplies for computing IDFT using direct and Radix-2 FT algorithms.
13. With a neat diagram explain the scheme of a DSP system. (June.12, 8m).
14. With an example explain the need for the low pass filter in decimation
process. (June.12, 4m)
15. For the FIR filter y(n)=(x(n)+x(n-1)+x(n-2))/3. Determine i) System
Function ii) Magnitude and phase function iii) Step response iv) Group
Delay. (June.12, 8m)
16. List the major architectural features used in DSP system to achieve high speed
program execution. (Dec.11, 6m).
17. Explain how to simulate the impulse responses of FIR and IIR filters.
(Dec.11, 6m).
18. Explain the two method of sampling rate conversions used in DSP system,
with suitable block diagrams and examples. Draw the corresponding
spectrum. (Dec.11, 8m).
19. Explain with the help of mathematical equations how signed numbers
can be multiplied. (July.11, 8m).
20. With a neat diagram explain the scheme of the DSP system. (Dec.10-Jan.11,
8m)
Thank You

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