SEMICONDUCTOR DEVICES & CIRCUITS

Course Code:AS22-04ES2

I B.TECH I SEM 2022-23

(COMMON TO IT/AI&DS)

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

St.Peter’s engineering college
Autonomous Institution – UGC, Govt. of India
(Affiliated to JNTU, Hyderabad, Approved by AICTE - Accredited by NBA & NAAC – ‘A’ Grade )
Maisammaguda, Dhulapally,Kompally road, Secunderabad – 500100

PREPARED BY
Dr.VIJAYALAKSHMI CH
Assistant professor
Department of ECE
COURSE OVERVIEW:

The creation of electronic circuits requires knowledge of the physics and device technology for the emission
and flow control of electrons in vacuum and matter. It uses active devices to control electron flow
by amplification and rectification. Electronics has had a major effect on the development of modern society.

COURSE OBJECTIVES:
 To introduce components such as diodes, BJTs and FETs.
 To know the applications of components.
 To know the switching characteristics of components
 To know the need of biasing in Transistors
 To understand of various types of transistor’s with its principle of operation.

COURSE OUTCOMES:

CO# Course Outcomes

Understand and analyze the characteristics of various components of semiconductor
C115.1
devices and its applications
C115.2 Understand and remember the applications of semiconductor diodes with examples.
C115.3 Analyze different types of transistor configurations with its parameters
Understand and Analyze the relation between current amplification factors of the
C115.4
three configurations
Analyze different biasing techniques of three terminal semiconductor Bipolar
C115.5
Semiconductor devices.
Understand and remember the operation of different types of FET’s with its
C115.6
characteristics.
 COURSE CONTENT (SYLLABUS)

UNIT I
JUNCTION DIODE CHARACTERISTICS AND SOME SPECIAL DIODES
Qualitative Theory of P-N Junction, Diode and its characteristics, Static and Dynamic resistances, Diode
current equation, Temperature dependence of VI characteristic, Transition and Diffusion capacitances,
Zener diode and its characteristics ,Breakdown Mechanisms in Semi-Conductor (Avalanche and Zener
breakdown) Diodes, Varactor Diode, LED, LCD and photo diode characteristics.

UNIT II
DIODE APPLICATIONS
Half wave and Full wave rectifiers and its comparisons. Inductor filter, Capacitor filter, L- section filter, �-
section filter and comparison of various filter circuits, Application of a zener diode as a voltage regulator.

UNIT III
BIPOLAR JUNCTION TRANSISTOR
Principle of Operation, Common Emitter, Common Base and Common Collector Configurations, Volt-
ampere characteristics of CB, CE and CC. Transistor current components, Transistor as a switch, switching
times, BJT acts as an amplifier, Input and Output characteristics of transistor in Common Base, Common
Emitter, and Common collector configurations, Relation between Alpha, Beta and Gamma, Analysis of CE
Amplifier, Comparison of CE,CB,CC configurations.

UNIT IV
BIASING AND STABILISATION
Operating Point, The DC and AC Load lines, Need for Biasing, Fixed Bias, Collector Bias, Self-Bias, Bias
Stability, Stabilization Factors, Stabilization against variations in VBE, ��� and �, Bias Compensation using
Diodes and Transistors, Thermal Runaway, Thermal Stability.

UNIT V
FIELD EFFECT TRANSISTORS
Types-The Junction Field Effect Transistor (construction, principle of operation, symbol)- pinch -off
Voltage -Volt -Ampere characteristics, FET small signal model, MOSFET (construction, principle of
operation, symbol) MOSFET characteristics in enhancement and depletion modes.
TEXT BOOKS
1. Electronic Devices and Circuits- Jacob Millman, McGraw Hill Education
2. Electronic Devices and Circuits theory– Robert L. Boylestead, Louis Nashelsky, 11th Edition, 2009,
Pearson
3. Integrated Electronics, Jacob Millman, Christos C Halkias, McGraw Hill Education.

REFERENCE BOOKS
1. The Art of Electronics, Horowitz, 3rdEdition Cambridge University Press
2. Electronic Devices and Circuits, David A. Bell – 5 th Edition, Oxford.
3. Pulse, Digital and Switching Waveforms –J. Millman, H. Taub and Mothiki S. Prakash Rao, 2Ed., 2008,
McGraw Hill.

ONLINE RESOURCES
1. https://nptel.ac.in/courses/115/102/115102014/
2. https://nptel.ac.in/courses/117/101/117101106/
3. https://www.coursera.org/learn/electronics
4. https://onlinecourses.nptel.ac.in/noc20_ee77/preview
5. https://www.classcentral.com/course/swayam-semiconductor-devices-and-circuits-19997
6. https://sggs.ac.in/wp-content/uploads/2020/08/SWAYAM-NPTEL-Equivalence-Courses-w.e.f.2020-21-
Electronics.pdf

E-BOOKS
1. https://www.pdfdrive.com/basic-electronics-for-scientists-and-engineers-e28939124.html
 UNIT-I
JUNCTION DIODE CHARACTERISTICS AND SOME SPECIAL DIODES
1. INTRODUCTON

Based on the electrical conductivity all the materials in nature are classified as insulators, semiconductors,
and conductors.

Insulator: An insulator is a material that offers a very low level (or negligible) of conductivity when
voltage is applied. Eg: Paper, Mica, glass, quartz.

Typical resistivity level of an insulator is of the order of 1010 to 1012 Ω-cm. The energy band structure of an
insulator is shown in the fig.1.1. Band structure of a material defines the band of energy levels that an
electron can occupy. Valance band is the range of electron energy where the electron remain bonded too
the atom and do not contribute to the electric current. Conduction bend is the range of electron energies
higher than valance band where electrons are free to accelerate under the influence of external voltage
source resulting in the flow of charge.

The energy band between the valance band and conduction band is called as forbidden band gap. It is the
energy required by an electron to move from balance band to conduction band i.e. the energy required for
a valance electron to become a free electron.
1 eV = 1.6 x 10-19 J
For an insulator, as shown in the fig.1.1 there is a large forbidden band gap of greater than 5Ev. Because of
this large gap there a very few electrons in the CB and hence the conductivity of insulator is poor. Even an
increase in temperature or applied electric field is insufficient to transfer electrons from VB to CB.
 Fig:1.1 Energy band diagrams insulator, semiconductor and conductor

Conductors: A conductor is a material which supports a generous flow of charge when a voltage is
applied across its terminals. i.e. it has very high conductivity. Eg: Copper, Aluminum, Silver, Gold.
The resistivity of a conductor is in the order of 10-4 and 10-6 Ω-cm. The Valance and conduction bands
overlap (fig1.1) and there is no energy gap for the electrons to move from valance band to conduction
band. This implies that there are free electrons in CB even at absolute zero temperature (0K). Therefore at
room temperature when electric field is applied large current flows through the conductor.

Semiconductor: A semiconductor is a material that has its conductivity somewhere between the
insulator and conductor. The resistivity level is in the range of 10 and 104 Ω-cm. Two of the most commonly
used are Silicon (Si=14 atomic no.) and germanium (Ge=32 atomic no.). Both have 4 valance electrons. The
forbidden band gap is in the order of 1eV. For eg., the band gap energy for Si, Ge and GaAs is 1.21, 0.785
and 1.42 eV, respectively at absolute zero temperature (0K). At 0K and at low temperatures, the valance
band electrons do not have sufficient energy to move from V to CB. Thus semiconductors act a insulators
at 0K. as the temperature increases, a large number of valance .electrons acquire sufficient energy to leave
the VB, cross the forbidden band gap and reach CB. These are now free electrons as they can move freely
under the influence of electric field. At room temperature there are sufficient electrons in the CB and
hence the semiconductor is capable of conducting some current at room temperature. Inversely related to
the conductivity of a material is its resistance to the flow of charge or current. Typical resistivity values for
various materials’ are given as follows.
1.1 Semiconductor Types

A pure form of semiconductors is called as intrinsic semiconductor. Conduction in intrinsic semiconductor

is either due to thermal excitation or crystal defects. Si and Ge are the two most important semiconductors
used. Other examples include Gallium arsenide [GaAs], Indium Antimonide (InSb) etc.Let us consider the
structure of Si. A Si atomic no. is 14 and it has 4 valance electrons. These 4 electrons are shared by four
neighboring atoms in the crystal structure by means of covalent bond. Fig.1.2a shows the crystal structure
of Si at absolute zero temperature (0K). Hence a pure SC acts has poor conductivity (due to lack of free
electrons) at low or absolute zero temperature.
At room temperature some of the covalent bonds break up to thermal energy as shown in fig1.2b. The
valance electrons that jump into conduction band are called as free electrons that are available for
conduction.

The absence of electrons in covalent bond is represented by a small circle usually referred to as hole which
is of positive charge. Even a hole serves as carrier of electricity in a manner similar to that of free electron.
The mechanism by which a hole contributes to conductivity is explained as follows:
When a bond is in complete so that a hole exists, it is relatively easy for a valance electron in the
neighboring atom to leave its covalent bond to fill this hole. An electron moving from a bond to fill a hole
moves in a direction opposite to that of the electron. This hole, in its new position may now be filled by an
electron from another covalent bond and the hole will correspondingly move one more step in the
direction opposite to the motion of electron. Here we have a mechanism for conduction of electricity
which does not involve free electrons. This phenomenon is illustrated in fig1.3
Fig 1.3a show that there is a hole at ion 6.Imagine that an electron from ion 5 moves into the hole at ion 6
so that the configuration of 1.3b results. If we compare both fig1.3a &fig 1.3b, it appears as if the hole has
moved towards the left from ion6 to ion 5. Further if we compare fig 1.3b and fig 1.3c, the hole moves
from ion5 to ion 4. This discussion indicates the motion of hole is in a direction opposite to that of motion
of electron. Hence we consider holes as physical entities whose movement constitutes flow of current.
In a pure semiconductor, the number of holes is equal to the number of free electrons.

1.2 EXTRINSIC SEMICONDUCTOR

Intrinsic semiconductor has very limited applications as they conduct very small amounts of current at
room temperature. The current conduction capability of intrinsic semiconductor can be increased
significantly by adding a small amounts impurity to the intrinsic semiconductor. By adding impurities it
becomes impure or extrinsic semiconductor. This process of adding impurities is called as doping. The
amount of impurity added is 1 part in 106 atoms.
N type semiconductor: If the added impurity is a pentavalent atom then the resultant semiconductor is
called N-type semiconductor. Examples of pentavalent impurities are Phosphorus, Arsenic, Bismuth,
Antimony etc.
A pentavalent impurity has five valance electrons. Fig 1.4a shows the crystal structure of N-type
semiconductor material where four out of five valance electrons of the impurity atom(antimony) forms
covalent bond with the four intrinsic semiconductor atoms. The fifth electron is loosely bound to the
impurity atom. This loosely bound electron can be easily
Excited from the valance band to the conduction band by the application of electric field or increasing the
thermal energy. The energy required to detach the fifth electron form the impurity atom is very small of
the order of 0.01ev for Ge and 0.05 eV for Si.
The effect of doping creates a discrete energy level called donor energy level in the forbidden band gap
with energy level Ed slightly less than the conduction band (fig 1.4b). The difference between the energy
levels of the conducting band and the donor energy level is the energy required to free the fifth valance
electron (0.01 eV for Ge and 0.05 eV for Si). At room temperature almost all the fifth electrons from the
donor impurity atom are raised to conduction band and hence the number of electrons in the conduction
band increases significantly. Thus every antimony atom contributes to one conduction electron without
creating a hole.

In the N-type sc the no. of electrons increases and the no. of holes decreases compared to those available
in an intrinsic sc. The reason for decrease in the no. of holes is that the larger no. of electrons present
increases the recombination of electrons with holes. Thus current in N type sc is dominated by electrons
which are referred to as majority carriers. Holes are the minority carriers in N type sc P type
semiconductor: If the added impurity is a trivalent atom then the resultant semiconductor is called P-type
semiconductor. Examples of trivalent impurities are Boron, Gallium , indium etc.

The crystal structure of p type sc is shown in the fig1.5a. The three valance electrons of the impurity (boon)
forms three covalent bonds with the neighboring atoms and a vacancy exists in the fourth bond giving rise
to the holes. The hole is ready to accept an electron from the neighboring atoms. Each trivalent atom
contributes to one hole generation and thus introduces a large no. of holes in the valance band. At the
same time the no. electrons are decreased compared to those available in intrinsic sc because of increased
recombination due to creation of additional holes.

Thus in P type sc , holes are majority carriers and electrons are minority carriers. Since each trivalent
impurity atoms are capable accepting an electron, these are called as acceptor atoms. The following fig
1.5b shows the pictorial representation of P type sc.

The conductivity of N type sc is greater than that of P type sc as the mobility of electron is greater than that
of hole. For the same level of doping in N type sc and P type sc, the conductivity of an N-type sc is around
twice that of a P type sc .

1.3 CONDUCTIVITY OF SEMICONDUCTOR

In a pure sc, the no. of holes is equal to the no. of electrons. Thermal agitation continue to produce new
electron- hole pairs and the electron hole pairs disappear because of recombination. With each electron
hole pair created , two charge carrying particles are formed . One is negative which is a free electron with
mobility µn . The other is a positive i.e., hole with mobility µp . The electrons and hole move in opposite
direction in a an electric field E, but since they are of opposite sign, the current due to each is in the same
direction. Hence the total current density J within the intrinsic sc is given by
J = Jn + Jp
=q n µn E + q p µp E
= (n µn + p µp)qE
=σ E
Where n=no. of electrons / unit volume i.e., concentration of free electrons
P= no. of holes / unit volume i.e., concentration of holes
E=applied electric field strength, V/m
q= charge of electron or hole I n Coulombs

Hence, σ is the conductivity of sc which is equal to (n µn + p µp)q. he resistivity of sc is reciprocal of

conductivity.
Ρ = 1/ σ
It is evident from the above equation that current density with in a sc is directly proportional to applied
electric field E.
For pure sc, n=p= ni where ni = intrinsic concentration. The value of ni is given by ni2 =AT3 exp (-EGO/KT)
therefore, J= ni ( µn + µp) q E
Hence conductivity in intrinsic sc is σi= ni ( µn + µp) q
Intrinsic conductivity increases at the rate of 5% per o C for Ge and 7% per o C for Si.

Conductivity in extrinsic sc (N Type and P Type):

The conductivity of intrinsic sc is given by σi= ni ( µn + µp) q = (n µn + p µp)q

For N type , n>>p
Therefore σ= q n µn
For P type ,p>>n
Therefore σ= q p µp

2.QUALITATIVE THEORY OF PN JUNCTION DIODE

If donor impurities are introduced into one side and acceptors into the other side of a single crystal of a
semiconductor ,say germanium ,a P-N junction is formed.The donor ion is indicated schematically by a plus
sign because after the impurity atom “donates”an electron,it becomes a positive ion.The acceptor ion is
indicated by a minus sign because,after this atom “accepts”an electron ,it becomes a negative ion.Initially
there are nominally only P-type carriers to the left of the junction and only the N-type carriers to the right.
Because there is a density gradient across the junction,holes will diffuse to the right across the junction,and
electrons to the left.

As a result of displacement of these charges ,an electric field will appear across the junction.Equilibrium
will be established when the field becomes large enough to restrain the process of diffusion.The general
shape of the charge distribution may be illustrated in the figure mentioned below .The electric charges are
confined to the neighbourhood of the junction,and consists of immobile ions.We see that the positive holes
which neutralized the acceptor ions near the junction in the p-type germanium have disappeared as a result
of combination with electrons which have diffused across the junction.Similarly, the neutralizing electrons
in the n-type germanium have combined with holes which have crossed the junction from the p material.The
Unneutralized ions in the neighbourhood of the junction are referred to as uncovered charges .Since the
region of the junction is depleted of mobile charges,it is called the depletion region,the space charge region
or the transition region.
The thickness of the region is of the order of 10-4 cm =10-6m=1micron.

Fig 1.6:A schematic diagram of a p-n junction,including the charge density,Electric

field intensity and potential energy barriers at the junction.
The electric field intensity in the neighborhood of the junction is indicated in fig c and this curve is the
Integral of the density function ρ in fig b.The electric potential variation in the depletion region is shown in
fig d,and is the negative integral of the function Ɛ of fig c .This variation constitutes a potential energy
barrier against the further diffusion of holes across the barrier.The form of potential energy barrier against
the flow of electrons from the n side across the junction is shown in fig e.This is similar to that shown in fig
d,except that it is inverted ,since the charge on an electron is negative .The necessity for the existence a
potential barrier called the contact or diffusion ,potential is now considered further .Under open circuited
conditions the net hole current must be zero.If this statement were not true ,the hole density at one end of the
semiconductor would continue to increase indefinitely with time, a situation which is obviously physically
impossible.Since the concentration of holes in the P side is much greater than that in the N side ,a very large
diffusion current tends to flow across the junction from the P to the N material.Hence an electric field must
build up across the junction in such a direction that a drift current will tend to flow across the junction from
the N to P side in order to counterbalance the diffusion current .This equilibrium condition of zero resultant
hole current allows us to calculate the height of the potential barrier V0 in terms of donor and acceptor
concentrations.The numerical value for V0 is of the order of magnitude of a few tenths of a volt.

3.DIODE AND ITS CHARACTERISTICS :

In a piece of sc, if one half is doped by p type impurity and the other half is doped by n type impurity, a
PN junction is formed. The plane dividing the two halves or zones is called PN junction. As shown in the fig
the n type material has high concentration of free electrons, while p type material has high concentration of
holes. Therefore at the junction there is a tendency of free electrons to diffuse over to the P side and the
holes to the N side. This process is called diffusion. As the free electrons move across the junction from N
type to P type, the donor atoms become positively charged. Hence a positive charge is built on the N-side of
the junction. The free electrons that cross the junction uncover the negative acceptor ions by filing the holes.
Therefore a negative charge is developed on the p –side of the junction..This net negative charge on the p
side prevents further diffusion of electrons into the p side. Similarly the net positive charge on the N side
repels the hole crossing from p side to N side. Thus a barrier sis set up near the junction which prevents the
further movement of charge carriers i.e. electrons and holes. As a consequence of induced electric field
across the depletion layer, an electrostatic potential difference is established between P and N regions, which
are called the potential barrier, junction barrier, diffusion potential or contact potential, Vo. The magnitude
of the contact potential Vo varies with doping levels and temperature. Vo is 0.3V for Ge and 0.72 V for Si.

Fig 1.: Symbol of P-N junction diode

The electrostatic field across the junction caused by the positively charged N-Type region tends to drive the
holes away from the junction and negatively charged p type regions tend to drive the electrons away from
the junction. The majority holes diffusing out of the P region leave behind negatively charged acceptor
atoms bound to the lattice, thus exposing a negatives pace charge in a previously neutral region. Similarly
electrons diffusing from the N region expose positively ionized donor atoms and a double space charge
builds up at the junction as shown in below figure .

Fig 1.8: P-N diode in no bias condition

It is noticed that the space charge layers are of opposite sign to the majority carriers diffusing into them,
which tends to reduce the diffusion rate. Thus the double space of the layer causes an electric field to be set
up across the junction directed from N to P regions, which is in such a direction to inhibit the diffusion of
majority electrons and holes as illustrated in fig. The shape of the charge density, ρ, depends upon how
diode id doped. Thus the junction region is depleted of mobile charge carriers. Hence it is called depletion
layer, space region, and transition region. The depletion region is of the order of 0.5µm thick. There are no
mobile carriers in this narrow depletion region. Hence no current flows across the junction and the system is
in equilibrium. To the left of this depletion layer, the carrier concentration is p= NA and to its right it is n=
ND.

3.1 FORWARD BIASED JUNCTION DIODE

When a diode is connected in a Forward Bias condition, a negative voltage is applied to the N-type material
and a positive voltage is applied to the P-type material. If this external voltage becomes greater than the
value of the potential barrier, approx. 0.7 volts for silicon and 0.3 volts for germanium, the potential barriers
opposition will be overcome and current will start to flow. This is because the negative voltage pushes or
repels electrons towards the junction giving them the energy to cross over and combine with the holes being
pushed in the opposite direction towards the junction by the positive voltage. This results in a characteristics
curve of zero current flowing up to this voltage point, called the "knee" on the static curves and then a high
current flow through the diode with little increase in the external voltage as shown below.
Forward Characteristics Curve for a Junction Diode

Fig 1.9: Diode Forward Characteristics

The application of a forward biasing voltage on the junction diode results in the depletion layer becoming
very thin and narrow which represents a low impedance path through the junction thereby allowing high
currents to flow. The point at which this sudden increase in current takes place is represented on the static I-
V characteristics curve above as the "knee" point.

Forward Biased Junction Diode showing a Reduction in the Depletion Layer

Fig 1.10: Diode Forward Bias

This condition represents the low resistance path through the PN junction allowing very large currents to
flow through the diode with only a small increase in bias voltage. The actual potential difference across the
junction or diode is kept constant by the action of the depletion layer at approximately 0.3v for germanium
and approximately 0.7v for silicon junction diodes. Since the diode can conduct "infinite" current above this
knee point as it effectively becomes a short circuit, therefore resistors are used in series with the diode to
limit its current flow. Exceeding its maximum forward current specification causes the device to dissipate
more power in the form of heat than it was designed for resulting in a very quick failure of the device.

3.2 PN JUNCTION UNDER REVERSE BIAS CONDITION:

Reverse Biased Junction Diode
When a diode is connected in a Reverse Bias condition, a positive voltage is applied to the N-type material
and a negative voltage is applied to the P-type material. The positive voltage applied to the N-type material
attracts electrons towards the positive electrode and away from the junction, while the holes in the P-type
end are also attracted away from the junction towards the negative electrode. The net result is that the
depletion layer grows wider due to a lack of electrons and holes and presents a high impedance path, almost
an insulator. The result is that a high potential barrier is created thus preventing current from flowing
through the semiconductor material.
Reverse Biased Junction Diode showing an Increase in the Depletion

This condition represents a high resistance value to the PN junction and practically zero current flows
through the junction diode with an increase in bias voltage. However, a very small leakage current does
flow through the junction which can be measured in micro amperes, (μA). One final point, if the reverse
bias voltage Vr applied to the diode is increased to a sufficiently high enough value, it will cause the PN
junction to overheat and fail due to the avalanche effect around the junction. This may cause the diode to
become shorted and will result in the flow of maximum circuit current, and this shown as a step downward
slope in the reverse static characteristics curve below.
Reverse Characteristics Curve for a Junction Diode

Fig 1.11 Diode Reverse Characteristics

Sometimes this avalanche effect has practical applications in voltage stabilizing circuits where a series
limiting resistor is used with the diode to limit this reverse breakdown current to a preset maximum value
thereby producing a fixed voltage output across the diode. These types of diodes are commonly known as
Zener Diodes .
4.STATIC AND DYNAMIC RESISTANCES:

4.1 Static resistance : It is defined as the normal ohmic resistance in accordance with ohm’s law.It is the
ratio of voltage and current and is constant at a given temperature .

Static resistance = Voltage/Current.

4.2 Dynamic resistance : It is a concept of resistance used in P-N junction in electronics.It is defined as
the small change in current in response to a small change in voltage at a
specific region of the VI curve .

Dynamic resistance = dV/dI.

5.DIODE CURRENT EQUATION:

The diode current equation expresses the relationship between the current flowing through the diode as a
function of the voltage applied across it. Mathematically the diode current equation can be expressed as:

Where,
 I is the current flowing through the diode
 I0 is the dark saturation current,
 q is the charge on the electron,
 V is the voltage applied across the diode,
 η is the (exponential) ideality factor.
 is the Boltzmann constant
 T is the absolute temperature in Kelvin.

In this equation, two parameters require to be discussed in quite detail.

They are I0, the Dark Saturation Current, and η, the (exponential) Ideality Factor.
Dark saturation current (I0) indicates the leakage current density flowing through the diode in the absence of
light (hence, ‘dark’).This parameter is the characteristic of the diode under consideration and indicates the
amount of recombination which occurs within it.That is, I0 will be larger for a diode in which recombination
rate is higher and vice versa. Further, its value is also seen to be directly proportional to the absolute
temperature and inversely proportional to the material quality.
η, the (exponential) Ideality Factor
Ideality factor (η) indicates the nearness with which the considered diode behaves with respect to the ideal
diode.That is, if the diode under consideration behaves exactly as that of an ideal diode, then η will be 1. Its
value increases from 1 as the difference between the behaviors of the ideal diode and diode under
consideration increases: greater is the deviation, greater is the value of η.
The value of η is typically considered to be 1 for germanium diodes and 2 for silicon diodes.
However, its exact value for the given diode depends on various factors like electron drift, diffusion, carrier
recombination which occurs within the depletion region, its doping level, manufacturing technique and the
purity of its materials.In addition, its value is also seen to vary with the value of current and voltage levels.
Nevertheless, in most of the cases, its value is found to be within the range 1 to 2.
In forward biased condition, there will a large amount of current flow through the diode. Thus the diode
current equation becomes

On the other hand, if the diode is reverse biased, then the exponential term in equation (1) becomes
negligible. Thus we have

Now let us examine the mode the diode current equation takes its form when we have the diode operating
at room temperature. In this case, T = 300 K, also, and . Thus

By reciprocating, one gets, 25.87 mV which is called thermal voltage. Thus the diode equation at room
temperature becomes

7. TEMPERATURE DEPENDENCE OF VI CHARACTERISTICS :

Temperature can have a marked effect on the characteristics of a silicon semiconductor diode as shown in
Fig.1.12 It has been found experimentally that the reverse saturation current Io will just about double in
magnitude for every 10°C increase in temperature.

Fig 1.12 Variation in Diode Characteristics with temperature change

It is not uncommon for a germanium diode with an Io in the order of 1 or 2 A at 25°C to have a leakage
current of 100 A - 0.1 mA at a temperature of 100°C. Typical values of Io for silicon are much lower than
that of germanium for similar power and current levels. The result is that even at high temperatures the
levels of Io for silicon diodes do not reach the same high levels obtained. For germanium—a very important
reason that silicon devices enjoy a significantly higher level of development and utilization in design.
Fundamentally, the open-circuit equivalent in the reverse bias region is better realized at any temperature
with silicon than with germanium. The increasing levels of Io with temperature account for the lower levels
of threshold voltage, as shown in Fig. 1.11. Simply increase the level of Io in and not rise in diode current.
Of course, the level of TK also will be increase, but the increasing level of Io will overpower the smaller
percent change in TK. As the temperature increases the forward characteristics are actually becoming more
“ideal,”
8.TRANSITION AND DIFFUSION CAPACITANCES :

Electronic devices are inherently sensitive to very high frequencies. Most shunt capacitive effects that can be
ignored at lower frequencies because the reactance XC=1/2πfC is very large (open circuit equivalent). This,
however, cannot be ignored at very high frequencies. XC will become sufficiently small due to the high
value of f to introduce a low-reactance “shorting” path. In the p-n semiconductor diode, there are two
capacitive effects to be considered. In the reverse-bias region we have the transition- or depletion region
capacitance (CT), while in the forward-bias region we have the diffusion (CD) or storage capacitance.
Recall that the basic equation for the capacitance of a parallelplate capacitor is defined by C=€A/d, where €
is the permittivity of the dielectric (insulator) between the plates of area A separated by a distance d. In the
reverse-, bias region there is a depletion region (free of carriers) that behaves essentially like an insulator
between the layers of opposite charge. Since the depletion width (d) will increase with increased reverse-
bias potential, the resulting transition capacitance will decrease. The fact that the capacitance is dependent
on the applied reverse-bias potential has application in a number of electronic systems. Although the effect
described above will also be present in the forward-bias region, it is over shadowed by a capacitance effect
directly dependent on the rate at which charge is injected into the regions just outside the depletion region.
The capacitive effects described above are represented by a capacitor in parallel with the ideal diode, as
shown in Fig. 1.38. For low- or mid-frequency applications (except in the power area), however, the
capacitor is normally not included in the diode symbol.

Fig 1.13: Including the effect of the transition or diffusion capacitance on the semiconductor diode
Diode capacitances: The diode exhibits two types of capacitances transition capacitance and diffusion
capacitance.
Transition capacitance: The capacitance which appears between positive ion layer in n-region and
negative ion layer in p-region.
Diffusion capacitance: This capacitance originates due to diffusion of charge carriers in the opposite
regions.
The transition capacitance is very small as compared to the diffusion capacitance.

In reverse bias transition, the capacitance is the dominant and is given by:
where CT - transition capacitance
A - diode cross sectional area
W - depletion region width
In forward bias, the diffusion capacitance is the dominant and is given by:

where CD - diffusion capacitance

dQ - change in charge stored in depletion region
V - change in applied voltage
Г- time interval for change in voltage
g - diode conductance
r - diode resistance
The diffusion capacitance at low frequencies is given by the formula:

The diffusion capacitance at high frequencies is inversely proportional to the frequency and is given by
the formula:

Note: The variation of diffusion capacitance with applied voltage is used in the design of varactor.

9.ZENER DIODE AND ITS CHARACTERISTICS :

The Zener diode is like a general-purpose signal diode consisting of a silicon PN junction. When biased in
the forward direction it behaves just like a normal signal diode passing the rated current, but as soon as a
reverse voltage applied across the zener diode exceeds the rated voltage of the device, the diodes breakdown
voltage VB is reached at which point a process called Avalanche Breakdown occurs in the semiconductor
depletion layer and a current starts to flow through the diode to limit this increase in voltage.
The current now flowing through the zener diode increases dramatically to the maximum circuit
value(which is usually limited by a series resistor) and once achieved this reverse saturation current remains
fairly constant over a wide range of applied voltages. This breakdown voltage point, VB is called the "zener
voltage" for zener diodes and can range from less than one volt to hundreds of volts.
The point at which the zener voltage triggers the current to flow through the diode can be very accurately
controlled (to less than 1% tolerance) in the doping stage of the diodes semiconductor construction giving
the diode a specific zener breakdown voltage, (Vz) for example, 4.3V or 7.5V. This zener breakdown
voltage on the I-V curve is almost a vertical straight line.
Zener Diode I-V Characteristics

The Zener Diode is used in its "reverse bias" or reverse breakdown mode, i.e. the diodes anode connects to
the negative supply. From the I-V characteristics curve above, we can see that the zener diode has a region
in its reverse bias characteristics of almost a constant negative voltage regardless of the value of the current
flowing through the diode and remains nearly constant even with large changes in current as long as the
zener diodes current remains between the breakdown current IZ(min) and the maximum current rating
IZ(max).
This ability to control itself can be used to great effect to regulate or stabilize a voltage source against supply
or load variations. The fact that the voltage across the diode in the breakdown region is almost constant turns
out to be an important application of the zener diode as a voltage regulator. The function of a regulator is to
provide a constant output voltage to a load connected in parallel with it in spite of the ripples in the supply
voltage or the variation in the load current and the zener diode will continue to regulate the voltage until the
diodes current falls below the minimum IZ(min) value in the reverse breakdown region.

10. BREAK DOWN MECHANISMS IN SEMICONDUCTOR DIODES:

When an ordinary P-N junction diode is reverse biased, normally only very small reverse saturation current
flows. This current is due to movement of minority carriers. It is almost independent of the voltage applied.
However, if the reverse bias is increased, a point is reached when the junction breaks down and the reverse
current increases abruptly. This current could be large enough to destroy the junction. If the reverse current
is limited by means of a suitable series resistor, the power dissipation at the junction will not be excessive,
and the device may be operated continuously in its breakdown region to its normal (reverse saturation) level.
It is found that for a suitably designed diode, the breakdown voltage is very stable over a wide range of
reverse currents. This quality gives the breakdown diode many useful applications as a voltage reference
source. The critical value of the voltage, at which the breakdown of a P-N junction diode occurs, is called
the breakdown voltage. The breakdown voltage depends on the width of the depletion region, which, in turn,
depends on the doping level. The junction offers almost zero resistance at the breakdown point.
There are two mechanisms by which breakdown can occur at a reverse biased P-N junction:
1. avalanche breakdown and
2. Zener breakdown.
Avalanche breakdown
The minority carriers, under reverse biased conditions, flowing through the junction acquire a kinetic energy
which increases with the increase in reverse voltage. At a sufficiently high reverse voltage (say 5 V or more),
the kinetic energy of minority carriers becomes so large that they knock out electrons from the covalent
bonds of the semiconductor material. As a result of collision, the liberated electrons in turn liberate more
electrons and the current becomes very large leading to the breakdown of the crystal structure itself. This
phenomenon is called the avalanche breakdown. The breakdown region is the knee of the characteristic
curve. Now the current is not controlled by the junction voltage but rather by the external circuit.
Zener breakdown
Under a very high reverse voltage, the depletion region expands and the potential barrier increases leading to
a very high electric field across the junction. The electric field will break some of the covalent bonds of the
semiconductor atoms leading to a large number of free minority carriers, which suddenly increase the
reverse current. This is called the Zener effect. The breakdown occurs at a particular and constant value of
reverse voltage called the breakdown voltage, it is found that Zener breakdown occurs at electric field
intensity of about 3 x 107 V/m.

Fig 1.14: Diode characteristics with breakdown

Either of the two (Zener breakdown or avalanche breakdown) may occur independently, or both of these
may occur simultaneously. Diode junctions that breakdown below 5 V are caused by Zener effect. Junctions
that experience breakdown above 5 V are caused by avalanche effect. Junctions that breakdown around 5 V
are usually caused by combination of two effects. The Zener breakdown occurs in heavily doped junctions
(P-type semiconductor moderately doped and N-type heavily doped), which produce narrow depletion layers.
The avalanche breakdown occurs in lightly doped junctions, which produce wide depletion layers. With the
increase in junction temperature Zener breakdown voltage is reduced while the avalanche breakdown
voltage increases. The Zener diodes have a negative temperature coefficient while avalanche diodes have a
positive temperature coefficient. Diodes that have breakdown voltages around 5 V have zero temperature
coefficient. The breakdown phenomenon is reversible and harmless so long as the safe operating
temperature is maintained.

11. VARACTOR DIODE:

Varactor diode is a special type of diode which uses transition capacitance property i.e voltage variable
capacitance .These are also called as varicap,VVC(voltage variable capacitance) or tuning diodes.The
varactor diode symbol is shown below with a diagram representation.

Fig 1.15 a:symbol of varactor diode

When a reverse voltage is applied to a PN junction, the holes in the p-region are attracted to the anode
terminal and electrons in the n-region are attracted to the cathode terminal creating a region where there is
little current. This region ,the depletion region, is essentially devoid of carriers and behaves as the dielectric
of a capacitor.
The depletion region increases as reverse voltage across it increases; and since capacitance varies inversely
as dielectric thickness, the junction capacitance will decrease as the voltage across the PN junction increases.
So by varying the reverse voltage across a PN junction the junction capacitance can be varied .This is shown
in the typical varactor voltage-capacitance curve below.

Fig 1.15b:voltage- capacitance curve

Notice the nonlinear increase in capacitance as the reverse voltage is decreased. This nonlinearity allows
the varactor to be used also as a harmonic generator.
Major varactor considerations are:
(a) Capacitance value
(b) Voltage
(c) Variation in capacitance with voltage.
(d) Maximum working voltage
(e) Leakage current
Applications:
Tuned circuits.
FM modulators
Automatic frequency control devices
Adjustable band pass filters
Parametric amplifiers
Television receivers

12. LIGHT EMITTING DIODE :

Light-emitting diode (LED) is a widely used standard source of light in electrical equipment. It has a wide
range of applications ranging from your mobile phone to large advertising billboards. They mostly find
applications in devices that show the time and display different types of data.

What is LED?
A light-emitting diode (LED) is a semiconductor device that emits light when an electric current flows
through it. When current passes through an LED, the electrons recombine with holes emitting light in the
process. LEDs allow the current to flow in the forward direction and blocks the current in the reverse
direction.

Fig 1.16a:Light emitting diode symbol

Light-emitting diodes are heavily doped p-n junctions. Based on the semiconductor material used and the
amount of doping, an LED will emit a coloured light at a particular spectral wavelength when forward
biased. As shown in the figure, an LED is encapsulated with a transparent cover so that emitted light can
come out.

Simple LED Circuit

The figure below shows a simple LED circuit.
The circuit consists of an LED, a voltage supply and a resistor to regulate the current and voltage.

How does an LED work?

When the diode is forward biased, the minority electrons are sent from p → n while the minority holes are
sent from n → p. At the junction boundary, the concentration of minority carriers increases. The excess
minority carriers at the junction recombine with the majority charges carriers.

Fig 1.16b:Working of LED

The energy is released in the form of photons on recombination. In standard diodes, the energy is released in
the form of heat. But in light-emitting diodes, the energy is released in the form of photons. We call this
phenomenon electroluminescence. Electroluminescence is an optical phenomenon, and electrical
phenomenon where a material emits light in response to an electric current passed through it. As the forward
voltage increases, the intensity of the light increases and reaches a maximum.

What determines the colour of an LED?

The colour of an LED is determined by the material used in the semiconducting element. The two primary
materials used in LEDs are aluminium gallium indium phosphide alloys and indium gallium nitride alloys.
Aluminium alloys are used to obtain red, orange and yellow light, and indium alloys are used to get green,
blue and white light. Slight changes in the composition of these alloys change the colour of the emitted light.

Uses of LED
LEDs find applications in various fields, including optical communication, alarm and security systems,
remote-controlled operations, robotics, etc. It finds usage in many areas because of its long-lasting capability,
low power requirements, swift response time, and fast switching capabilities. Below are a few
standards LED uses:
  Used for TV back-lighting

 Used in displays

 Used in Automotives

 LEDs used in the dimming of lights

Types of LED
Below is the list of different types of LED that are designed using semiconductors:

 Miniature LEDs
 High-Power LEDs
 Flash LED
 Bi and Tri-Colour
 Red Green Blue LEDs
 Alphanumeric LED
 Lighting LED

13.Liquid Crystal Display(LCD)

Liquid Crystal Display (LCD) is an flat display screen used in electronic devices such as laptop, computer,
TV, cellphones and portable video games. As the name says liquid crystal is a material which flows like a
liquid and shows some properties of solid. These LCD are very thin displays and it consumes less power
than LEDs.
Molecular arrangement of Liquid Crystal:

As the name says the molecular structure of liquid crystal is in between solid crystal and liquid isotropic. In
Liquid crystal display (LCD) nematic type of liquid crystal molecular arrangement is used in which
molecules are oriented in some degree of alignment. For example when we increase the temperature the ice
cube melts and liquid crystal is like the state in between ice cube and water.
Construction of Liquid Crystal Display:

Construction of LCD consists of two polarized glass pieces. Two electrodes are used, one is positive and the
other one is negative. External potential is applied to LCD through this electrodes and it is made up of
indium-tin-oxide. Liquid crystal layer of about 10µm- 20µm is placed between two glass sheets. The light is
passed or blocked by changing the polarization.

Working of Liquid Crystal Display

The basic working principle of LCD is blocking of light. It does not produce light on its own. So external
light source is used. When the external light passes from one polarizer to the next polarizer, external supply
is given to the liquid crystal ,the polarized light aligns itself so that the image is produced in the screen.

The indium oxide conducting surface is a transparent layer which is placed on both the sides of the sealed
thick layer of liquid crystal . When no external bias is applied the molecular arrangement is not
disturbed.When the external bias is applied the molecular arrangement is disturbed and it and that area looks
dark and the other area looks clear.
In the segment arrangement, the conducting segment looks dark and the other segment looks clear. To
display number 2 , the segments A,B,G,E,D are energized.
Advantages:
 It is thin and compact
 Low power consumption
 Less heat is emitted during operation
 Low cost
Disadvantages:
 Speed of operation is low
 Lifespan is less
 Restricted viewing angles
Applications:
 Used in digital wrist watch
 Display images in digital cameras
 Used in numerical counters
 Display screen in calculators
 Mainly used in television
 Used in mobile screens
 Used in video players
 Used in image sensing circuits

13. PHOTO DIODE CHARACTERISTICS:

The photo diode is a semiconductor p-n junction device whose region of operation is limited to the reverse
biased region.The figure below shows the symbol of photo diode .

Fig 1.17:Symbol of photo diode.

Principle of operation:
A photo diode is a type of photo detector capable of converting light into either current or voltage,
depending upon the mode of operation. The common, traditional solar cell used to generate electric solar
power is a large area photo diode. A photo diode is designed to operate in reverse bias. The deletion region
width is large. Under normal conditions it carries small reverse current due to minority charge carriers.
When light is incident through glass window on the p-n junction, photons in the light bombard the p-n
junction and some energy s imparted to the valence electrons. So valence electrons break covalent bonds and
become free electrons. Thus more electron-hole pairs are generated. Thus total number of minority charge
carriers increases and hence reverse current increases.This is the basic principle of operation of photo diode.

Fig 1.18: Basic Biasing Arrangement and construction of photo diode and symbols
Characteristics of photo diode:
When the P-N junction is reverse-biased, a reverse saturation current flows due to thermally generated holes
and electrons being swept across the junction as the minority carriers. With the increase in temperature of
the junction more and more hole-electron pairs are created and so the reverse saturation current I0 increases.
The same effect can be had by illuminating the junction. When light energy bombards a P-N junction, it
dislodges valence electrons. The more light striking the junction the larger the reverse current in a diode. It
is due to generation of more and more charge carriers with the increase in level of illumination. This is
clearly shown in ‘ figure for different intensity levels. The dark current is the current that exists when no
light is incident. It is to be noted here that current becomes zero only with a positive applied bias equals to
VQ. The almost equal spacing between the curves for the same increment in luminous flux reveals that the
reverse saturation current I0 increases linearly with the luminous flux as shown in figure. Increase in reverse
voltage does not increase the reverse current significantly, because all available charge carriers are already
being swept across the junction.
For reducing the reverse saturation current I0 to zero, it is necessary to forward bias the junction by an
amount equal to barrier potential. Thus the photo diode can be used as a photo conductive device.
Fig 1.19: characteristics of photo diode .
On removal of reverse bias applied across the photo diode, minority charge carriers continue to be swept
across the junction while the diode is illuminated. This has the effect of increasing the concentration of holes
in the P-side and that of electrons in the N-side But the barrier potential is negative on the P-side and
positive on the N-side, and was created by holes flowing from P to N-side and electrons from N to P-side
during fabrication of junction. Thus the flow of minority carriers tends to reduce the barrier potential.
When an external circuit is connected across the diode terminals, the minority carrier; return to the original
side via the external circuit. The electrons which crossed the junction from P to N-side now flow out through
the N-terminal and into the P-terminal This means that the device is behaving as a voltage cell with the N-
side being the negative terminal and the P-side the positive terminal. Thus, the photo diode is & photovoltaic
device as well as photo conductive device.
Advantages:
The advantages of photo diode are:
1.It can be used as variable resistance device.
2.Highly sensitive to the light.
3.The speed of operation is very high.
Disadvantages:
1.Temperature dependent dark current.
2.poor temperature stability.
3.Current needs amplification for driving other circuits.
Applications:
1.Alarm system.
2.counting system
 UNIT-II
DIODE APPLICATIONS
2.0 INTRODUCTION
For the operation of most of the electronics devices and circuits, a d.c. source is required. So it is
advantageous to convert domestic a.c. supply into d.c.voltages. The process of converting a.c. voltage into
d.c. voltage is called as rectification. This is achieved with i) Step-down Transformer, ii) Rectifier, iii) Filter
and iv) Voltage regulator circuits.
These elements constitute d.c. regulated power supply shown in the fig 1 below.

Fig 2.1: Block Diagram of regulated D.C Power Supply

Transformer – steps down 230V AC mains to low voltage AC.
Rectifier – converts AC to DC, but the DC output is varying.
Smoothing – smooth the DC from varying greatly to a small ripple.
Regulator – eliminates ripple by setting DC output to a fixed voltage.

The block diagram of a regulated D.C. power supply consists of step-down transformer, rectifier, filter,
voltage regulator and load. An ideal regulated power supply is an electronics circuit designed to provide a
predetermined d.c. voltage Vo which is independent of the load current and variations in the input voltage ad
temperature. If the output of a regulator circuit is a AC voltage then it is termed as voltage stabilizer,
whereas if the output is a DC voltage then it is termed as voltage regulator.

2.1 RECTIFIER

Any electrical device which offers a low resistance to the current in one direction but a high resistance to the
current in the opposite direction is called rectifier. Such a device is capable of converting a sinusoidal input
waveform, whose average value is zero, into a unidirectional Waveform, with a nonzero average component.
A rectifier is a device, which converts a.c. voltage (bi-directional) to pulsating d.c. voltage (Unidirectional).
Characteristics of a Rectifier Circuit:
Any electrical device which offers a low resistance to the current in one direction but a high resistance to the
current in the opposite direction is called rectifier. Such a device is capable of converting a sinusoidal input
waveform, whose average value is zero, into a unidirectional waveform, with a nonzero average component.
A rectifier is a device, which converts a.c. voltage (bi-directional) to pulsating d.c..Load currents: They are
two types of output current. They are average or d.c. current and RMS currents.
Average or DC current: The average current of a periodic function is defined as the area of one cycle of
the curve divided by the base.
It is expressed mathematically as

i) Average value/dc value/mean value= Area over one period/Total time period.

ii) Effective (or) R.M.S current:

The effective (or) R.M.S. current squared ofa periodic function of time is given by the area of one cycle
of the curve, which represents the square of the function divided by the base.

iii) Peak factor:

It is the ratio of peak value to Rms value

iv) Form factor:

It is the ratio of Rms value to average value

v) Ripple Factor (Г ) :
It is defined as ration of R.M.S. value of a.c. component to the d.c. component in the output is known as
“Ripple Factor”.

vi) Efficiency ( ):
It is the ratio of d.c output power to the a.c. input power. It signifies, how efficiently the rectifier circuit
converts a.c. power into d.c. power.

vii) Peak Inverse Voltage (PIV):

It is defined as the maximum reverse voltage that a diode can withstand without destroying the junction.
viii) Transformer Utilization Factor (UTF):
The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the Transformer used
in the circuit. So, transformer utilization factor is defined as

ix) % Regulation:
The variation of the d.c. output voltage as a function of d.c. load current is called regulation. The percentage
regulation is defined as

For an ideal power supply, % Regulation is zero.

2.2 CLASSIFICATION OF RECTIFIERS

Using one or more diodes in the circuit, following rectifier circuits can be designed.
1) Half - Wave Rectifier
2) Full – Wave Rectifier
3) Bridge Rectifier

2.2.1 HALF-WAVE RECTIFIER:

A Half – wave rectifier as shown in fig 2.2 is one, which converts a.c. voltage into a pulsating voltage
using only one half cycle of the applied a.c. voltage.

Fig 2.2: Basic structure of Half-Wave Rectifier

The a.c. voltage is applied to the rectifier circuit using step-down transformer-rectifying element i.e., p
n junction diode and the source of a.c. voltage, all connected is series. The a.c. voltage is applied to the
rectifier circuit using step-down transformer.
 Fig 2.3: Input and output waveforms of Half wave rectifier
V=Vm sin (wt)
The input to the rectifier circuit, Where Vm is the peak value of secondary a.c. voltage.
Operation:
For the positive half-cycle of input a.c. voltage, the diode D is forward biased and hence it conducts. Now a
current flows in the circuit and there is a voltage drop across RL. The waveform of the diode current (or)
load current is shown in fig 2.3.
For the negative half-cycle of input, the diode D is reverse biased and hence it does not Conduct. Now no
current flows in the circuit i.e., i=0 and Vo=0. Thus for the negative half- cycle no power is delivered to the
load.
Analysis:
In the analysis of a HWR, the following parameters are to be analyzed.
1. DC output current
2. DC Output voltage
3. R.M.S. Current
4. R.M.S. voltage
5. Rectifier Efficiency (η )
6. Ripple factor (γ )
7. Peak Factor
8. % Regulation
9. Transformer Utilization Factor (TUF)
10. form factor
11. o/p frequency
Let a sinusoidal voltage Vi be applied to the input of the rectifier.
Then V=Vm sin (wt) Where Vm is the maximum value of the secondary voltage. Let the diode be idealized
to piece-wise linear approximation with resistance Rf in the forward direction i.e., in the ON state and Rr
(=∞) in the reverse direction i.e., in the OFF state. Now the current ‘i’ in the diode (or) in the load resistance
RL is given by V=Vm sin (wt).
i) AVERAGE VOLTAGE

ii).AVERAGE CURRENT:

iii) RMS VOLTAGE:

IV) RMS CURRENT

V) PEAK FACTOR

vi) FORM FACTOR

vii) Ripple Factor:

viii) Efficiency (η ):

ix) Transformer Utilization Factor (TUF):

The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the transformer used in
the circuit. Therefore, transformer utilization factor is defined as

The value of TUF is low which shows that in half-wave circuit, the transformer is not fully utilized.
If the transformer rating is 1 KVA (1000VA) then the half-wave rectifier can deliver 1000 X 0.287 = 287
watts to resistance load.
x) Peak Inverse Voltage (PIV):
It is defined as the maximum reverse voltage that a diode can withstand without destroying the junction. The
peak inverse voltage across a diode is the peak of the negative half- cycle. For half-wave rectifier, PIV is
Vm.
DISADVANTAGES OF HALF-WAVE RECTIFIER:
1. The ripple factor is high.
2. The efficiency is low.
3. The Transformer Utilization factor is low.
Because of all these disadvantages, the half-wave rectifier circuit is normally not used as a power rectifier
circuit.

2.2.2) FULL WAVE RECTIFIER:

A full-wave rectifier converts an ac voltage into a pulsating dc voltage using both half cycles of the applied
ac voltage. In order to rectify both the half cycles of ac input, two diodes are used in this circuit. The diodes
feed a common load RL with the help of a center-tap transformer. A center-tap transformer is the one, which
produces two sinusoidal waveforms of same magnitude and frequency but out of phase with respect to the
ground in the secondary winding of the transformer. The full wave rectifier is shown in the fig2.4 below

Fig 2.4 : Full wave Rectifier

Fig 2.5:The input and output wave forms of full wave rectifier
During positive half of the input signal, anode of diode D1 becomes positive and at the same time the anode
of diode D2 becomes negative. Hence D1 conducts and D2 does not conduct. The load current flows
through D1 and the voltage drop across RL will be equal to the input voltage.

During the negative half cycle of the input, the anode of D1 becomes negative and the anode of D2 becomes
positive. Hence, D1 does not conduct and D2 conducts. The load current flows through D2 and the voltage
drop across RL will be equal to the input voltage. It is noted that the load current flows in the both the half
cycles of ac voltage and in the same direction through the load resistance.
i) AVERAGEVOLTAGE
ii) AVERAGE CURRENT

iii) RMS VOLTAGE:

IV) RMS CURRENT

V) PEAK FACTOR

vi) FORM FACTOR

vii) Ripple Factor:

viii) Efficiency (η ):

ix) Transformer Utilization Factor (TUF):

The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the transformer used in
the circuit. So, transformer utilization factor is defined as

x) Peak Inverse Voltage (PIV):

It is defined as the maximum reverse voltage that a diode can withstand without destroying the junction. The
peak inverse voltage across a diode is the peak of the negative half- cycle. For half- wave rectifier, PIV is
2Vm
xi) % Regulation

Advantages
1) Ripple factor = 0.482 (against 1.21 for HWR)
2) Rectification efficiency is 0.812 (against 0.405 for HWR)
3) Better TUF (secondary) is 0.574 (0.287 for HWR)
4) No core saturation problem
Disadvantages:
1) Requires center tapped transformer.
 COMPARISION OF HALF WAVE AND FULL WAVE RECTIFIERS :

PARAMETER HALFWAVE RECTIFIER FULLWAVE RECTIFIER

Definition An electronic circuit which An electronic circuit that converts
converts half cycle of alternating the complete cycle of alternating
current into direct current is current into direct current is
known as half-wave rectifier. known as full-wave rectifier.
Types No further classification. The full-wave rectifier is of two
types: center-tapped FWR and
bridge FWR.
Number of diodes required Half wave rectifier requires only The number of diodes required in
one diode. a full-wave rectifier are as −
 Center-tapped FWR
requires two diodes.
 Bridge FWR requires 4
diodes.
Rectified cycles of AC In half wave rectifier, only half Full wave rectifier rectifies the
cycle of AC (either positive or both positive and negative cycles
negative) being rectified. of AC
Electric current through load The electric current through the A continuous electric current
load is not continuous. flows through the load.
Peak inverse voltage (PIV) The peak inverse voltage for the For the full wave rectifier, the
half wave rectifier is equal to the peak inverse voltage is equal to
maximum value of the input the double of the maximum value
voltage, i.e., Vm. of input voltage, i.e., 2Vm.
Output frequency For half wave rectifier, the The output frequency for the full-
frequency of ripple output is equal wave rectifier is double of the
to the input supply frequency, i.e., supply frequency, i.e., "2f".
"f".
Maximum efficiency of For half wave rectifier, the The maximum efficiency of
rectification (for sinusoidal AC) maximum efficiency of rectification for a full-wave
rectification is 40.6%. rectifier is equal to 81.2%.
Ripple factor (for sinusoidal The ripple factor for half-wave The ripple factor for full-wave
AC) rectifier is 1.21. rectifier is 0.48.
Form factor (for sinusoidal AC) The form factor of half-wave The form factor of a full-wave
rectifier is 1.57. rectifier is 1.11
Peak factor (for sinusoidal AC) For half-wave rectifier, the peak The peak factor of a full-wave
factor is equal to 2. rectifier is 1.414.
Transformer utilization factor The transformer utilization factor The transformer utilization factor
of a half-wave rectifier is 0.2865. of a full-wave rectifier is 0.692
(centre-tapped rectifier) and
0.8106 (bridge rectifier).
Voltage regulation The half-wave rectifier has good The voltage regulation of a full-
voltage regulation. wave rectifier is better than that of
half-wave rectifier.
Saturation of transformer core In case of half-wave rectifier A full-wave rectifier does not
circuit, the DC saturation of the have DC saturation of the
transformer core is a common transformer core.
problem.
Cost Half wave rectifier is less costly Full wave rectifier is costlier than
as it requires only one diode. half-wave rectifier as it requires
more number of diodes.
2.3 FILTERS
The output of a rectifier contains dc component as well as ac component. Filters are used to minimize
the undesirable ac i.e., ripple leaving only the dc component to appear at the output.

Some important filters are:

1. Inductor filter
2. Capacitor filter
3. LC or L section filter
4. CLC or Π-type filter

2.3.1.INDUCTOR FILTERS

This type of filter is also called choke filter. It consists of an inductor L which is inserted between the
rectifier and the load resistance RL. The rectifier contains A.C components as well as D.C components.In
series inductor filter the inductor is connected in series with the rectifier output and the load resistor. Thus, it
is called series inductor filter. The property of an inductor to block AC and provides zero resistance to DC is
used in filtering circuit. When the value of DC output from the rectifier is more than the average value then
the rectifier store the excess current in the form of magnetic energy.

When the value of DC from the rectifier is less than the average value then the inductor release the stored
magnetic energy in order to balance the effect of the low value of DC. In this way series inductor filter
maintains the regulated DC supply. Moreover, inductor blocks the AC ripples present in the output voltage
of rectifier; thus, smooth DC signal can be obtained.

The working of series inductor filter depends on the inherent property of the inductor to oppose any
variation in current intend to take place. In the figure shows a series inductor filter connected at the output of
a FWR. Here the reactance of the inductor is more for ac components and it offers more opposition to them.
At the same time it provides no impedance for d.c. component. Therefore the inductor blocks a.c.
components in the output of the rectifier and allows only d.c. component to flow through RL. The action of
an inductor depends upon the current through it and it requires current to flow at all time. Therefore filter
circuits consisting inductors can only be used together with full wave rectifiers. In inductor filter an increase
in load current will improve the filtering action and results in reduced ripple. Series inductor filters are used
in equipment’s of high load currents.

Fig 2.6a: Rectifier with series inductor filter Fig 2.6b: Filter output waveform

Advantages : Disadvantages :

 Sudden changes in current is smoothen out Reduced output voltage due to the drop
 Improved filtering action at high load currents across the inductor.
Bulky and large in size
Note suited for HWR.

2.3.2.CAPACITOR FILTERS

Fig 2.7a:FW Rectifier with Shunt capacitor filter

Fig 2.7b:Filter output waveform

This type of filter consists of large value of capacitor connected across the load resistor RL as shown in
figure 2.7a.This capacitor offers a low reactance to the a.c. components and very high impedance to d.c. so
that the a.c. components in the rectifier output find low reactance path through capacitor and only a small
part flows through RL, producing small ripple at the output as shown in figure. Here Xc (=1/2πfC, the
impedance of capacitor) should be smaller than RL. Because, current should pass through C and C should get
charged. If C value is very small, Xc will be large and hence current flows through RL only and no filtering
action takes place. The capacitor C gets charged when the diode (in the rectifier) is conducting and gets
discharged (when the diode is not conducting) through RL. When the input voltage V=Vmsinɷt is greater
than the capacitor voltage, C gets charged. When the input voltage is less than that of the capacitor voltage,
C will discharge through RL. The stored energy in the capacitor maintains the load voltage at a high value
for a long period. The diode conducts only for a short interval of high current. The waveforms are as shown
in figure. Capacitor opposes sudden fluctuations in voltage across it. So the ripple voltage is minimized.The
discharging of the capacitor depends upon the time constant C.RL. Hence the smoothness and the magnitude
of output voltage depend upon the value of capacitor C and RL. As the value of C increases the smoothness
of the output also increases. But the maximum value of the capacitor is limited by the current rating of the
diode. Also decrease in the value of RL increases the load current and makes the time constant smaller.
These types of filters are used in circuits with small load current like transistor radio receivers, calculators,
etc.

2.3.3 L-SECTION FILTER:

A simple series inductor reduces both the peak and effective values of the output current and output voltage.
On the other hand a simple shunt capacitor filter reduces the ripple voltage but increases the diode current.
The diode may get damaged due to large current and at the same time it causes greater heating of supply
transformer resulting in reduced efficiency. In an inductor filter, ripple factor increases with the increase in
load resistance RL while in a capacitor filter it varies inversely with load resistance RL. From economical
point of view also, neither series inductor nor shunt capacitor type filters are suitable.
Practical filter-circuits are derived by combining the voltage stabilizing action of shunt capacitor with the
current smoothing action of series choke coil. By using combination of inductor and capacitor ripple factor
can be lowered, diode current can be restricted and simultaneously ripple factor can be made almost
independent of load resistance (or load current). Two types of most commonly used combinations are choke-
input or L-section filter-and capacitor-input or Pi-Filter.

Fig 2.8 a :LC filter circuit diagram

 Fig 2.8b :Filter output waveform

Choke-input filter is explained below:

Choke-input filter consists of a choke L connected in series with the rectifier and a capacitor C connected
across the load . This is also sometimes called the L-section filter because in this arrangement inductor and
capacitor are connected, as an inverted L. ln figure only one filter section is shown. But several identical
sections are often employed to improve the smoothing action. (The choke L on the input side of the filter
readily allows dc to pass but opposes the flow of ac components because its dc resistance is negligibly small
but ac impedance is large. Any fluctuation that remains in the current even after passing through the choke
are largely by-passed around the load by the shunt capacitor because Xc is much smaller than RL. Ripples
can be reduced effectively by making XL greater than Xc at ripple frequency. However, a small ripple still
remains in the filtered output and this is considered negligible if it than l%. The rectified and filtered output
voltage waveforms from a full-wave re with choke-input filter are shown in figure.

2.3.4 Π-SECTION FILTER or CLC FILTER:

Fig 2.9a :CLC filter circuit diagram

 Fig 2.9b :Output waveform

Such a filter consists of a shunt capacitor C1 at the input followed by an L-section filter formed by series
inductor L and shunt capacitor C2. This is also called the n-filter because the shape of the circuit diagram for
this filter appears like Greek letter n (pi). Since the rectifier feeds directly into the capacitor so it is also
called capacitor input filter.
As the rectified output is fed directly into a capacitor C1. Such a filter can be used with a half-wave rectifier
(series inductor and L-section filters cannot be used with half-wave rectifiers). Usually electrolytic
capacitors are used even though their capacitances are large but they occupy minimum space. Usually both
capacitors C1 and C2 are enclosed in one metal container. The metal container serves as, the common
ground for the two capacitors.
A capacitor-input or pi- filter is characterized by a high voltage output at low current drains. Such a filter is
used, if, for a given transformer, higher voltage than that can be obtained from an L-section filter is required
and if low ripple than that can be obtained from a shunt capacitor filter or L-section filter is desired. In this
filter, the input capacitor C1 is selected to offer very low reactance to the ripple frequency. Hence major part
of filtering is accomplished by the input capacitor C1. Most of the remaining ripple is removed by the L-
section filter consisting of a choke L and capacitor C2.)The action of this filter can best be understood by
considering the action of L-section filter, formed by L and C2, upon the triangular output voltage wave from
the input capacitor C1 The charging and discharging action of input capacitor C1 has already been discussed.
The output voltage is roughly the same as across input capacitor C1 less the dc voltage drop in inductor. The
ripples contained in this output are reduced further by L-section filter. The output voltage of pi-filter falls off
rapidly with the increase in load-current and, therefore, the voltage regulation with this filter is very poor.

2.4 SALIENT FEATURES OF L-SECTION AND PI-FILTERS

1. In pi-filter the dc output voltage is much larger than that can be had from an L-section filter with the same
input voltage.
2.In pi-filter ripples are less in comparison to those in shunt capacitor or L-section filter. So smaller valued
choke is required in a pi-filter in comparison to that required in L-section filter.
3.In pi-filter, the capacitor is to be charged to the peak value hence the rms current in supply transformer is
larger as compared in case of L-section filter.
4.Voltage regulation in case of pi-filter is very poor, as already mentioned. So n-filters are suitable for fixed
loads whereas L-section filters can work satisfactorily with varying loads provided a minimumcurrent is
maintained.
5.In case of a pi-filter PIV is larger than that in case of an L-section filter.
2.5 COMPARISON OF FILTERS

1) A capacitor filter provides Vm volts at less load current. But regulation is poor.
2) An Inductor filter gives high ripple voltage for low load currents. It is used for high load currents .
3) L – Section filter gives a ripple factor independent of load current. Voltage Regulation can be improved
by use of bleeder resistance .
4) Multiple L – Section filter or π filters give much less ripple than the single L – Section Filter.
2.6 APPLICATION OF ZENER DIODE AS VOLTAGE REGULATOR
Zener diode is a silicon semiconductor with a p-n junction that is specifically designed to work in the
reverse biased condition. When forward biased, it behaves like a normal signal diode, but when the reverse
voltage is applied to it, the voltage remains constant for a wide range of currents. Due to this feature, it is
used as a voltage regulator in d.c. circuit. The primary objective of the Zener diode as a voltage regulator is
to maintain a constant voltage. Let us say if Zener voltage of 5 V is used then, the voltage becomes constant
at 5 V, and it does not change.

What is voltage regulator?

A voltage regulator is a device that regulates the voltage level. It essentially steps down the input voltage to
the desired level and keeps it at that same level during the supply. This ensures that even when a load is
applied the voltage doesn’t drop. The voltage regulator is used for two main reasons, and they are:

 To vary or regulate the output voltage

 To keep the output voltage constant at the desired value in spite of variations in the supply voltage.

Voltage regulators are used in computers, power generators, alternators to control the output of the plant.

There is a series resistor connected to the circuit in order to limit the current into the diode. It is connected to
the positive terminal of the d.c. It works in such a way the reverse-biased can also work in breakdown
conditions. We do not use ordinary junction diode because the low power rating diode can get damaged
when we apply reverse bias above its breakdown voltage. When the minimum input voltage and the
maximum load current is applied, the Zener diode current should always be minimum.

Since the input voltage and the required output voltage is known, it is easier to choose a Zener diode with a
voltage approximately equal to the load voltage, i.e. VZ = VL.

Following is the link explaining the difference between Zener breakdown and Avalanche breakdown:
The value of the series resistor is written as RS = (VL − VZ)IL.
Current through the diode increases when the voltage across the diode tends to increase which results in the
voltage drop across the resistor. Similarly, the current through the diode decreases when the voltage across
the diode tends to decrease. Here, the voltage drop across the resistor is very less, and the output voltage
results normally.
 UNIT-IV

TRANSISTOR BIASING AND STABILIZATION

4.1 NEED FOR TRANSISTOR BIASING

If the o/p signal must be a faithful reproduction of the i/p signal, the transistor must be
operated in active region. That means an operating point has to be established in this region . To
establish an operating point (proper values of collector current I c and collector to emitter voltage VCE)
appropriate supply voltages and resistances must be suitably chosen in the ckt. This process of
selecting proper supply voltages and resistance for obtaining desired operating point or Q point is
called as biasing and the ckt used for transistor biasing is called as biasing ckt.

There are four conditions to be met by a transistor so that it acts as a faithful ampr:

1) Emitter base junction must be forward biased (V BE=0.7Vfor Si, 0.2V for Ge) and collector base
junction must be reverse biased for all levels of i/p signal.
2) Vce voltage should not fall below VCE (sat) (0.3V for Si, 0.1V for Ge) for any part of the i/p signal.
For VCE less than VCE (sat) the collector base junction is not probably reverse biased.
3) The value of the signal Ic when no signal is applied should be at least equal to the max. collector
current t due to signal alone.
4) Max. rating of the transistor Ic(max), VCE (max) and PD(max) should not be exceeded at any value of
i/p signal.

Consider the fig shown in fig1. If operating point is selected at A, A represents a condition when no
bias is applied to the transistor i.e, Ic=0, VCE =0. It does not satisfy the above said conditions necessary
for faithful amplification.

Point C is too close to PD(max) curve of the transistor. Therefore the o/p voltage swing in the positive
direction is limited.

Point B is located in the middle of active region .It will allow both positive and negative half cycles
in the o/p signal. It also provides linear gain and larger possible o/p voltages and currents

Hence operating point for a transistor amplifier is selected to be in the middle of active region.
 IC(max)
PD(max)

PD(max)
PD(max)

Vce(sat)
PD(max)
Fig 4.1CE Output Characteristics

4.2 DC LOAD LINE

Referring to the biasing circuit of fig 4.2a, the values of VCC and RC are fixed and Ic and VCE are
dependent on RB.

Applying Kirchhoff’s voltage law to the collector circuit in fig. 4.2a, we get

Fig 4.2a CE Amplifier circuit (b) Load line

 The straight line represented by AB in fig4.2b is called the dc load line. The coordinates of the end
point A are obtained by substituting VCE =0 in the above equation. Then . Therefore The

coordinates of A are VCE =0 and .

The coordinates of B are obtained by substituting Ic=0 in the above equation. Then Vce = Vcc.
Therefore the coordinates of B are VCE =Vcc and Ic=0. Thus the dc load line AB can be drawn if the
values of Rc and Vcc are known.

As shown in the fig4.2b, the optimum POINT IS LOCATED AT THE MID POINT OF THE MIDWAY
BETWEEN a AND b. In order to get faithful amplification, the Q point must be well within the active
region of the transistor.

Even though the Q point is fixed properly, it is very important to ensure that the operating point
remains stable where it is originally fixed. If the Q point shifts nearer to either A or B, the output
voltage and current get clipped, thereby o/p signal is distorted.

In practice, the Q-point tends to shift its position due to any or all of the following three main
factors.

1) Reverse saturation current, Ico, which doubles for every 10oC raise in temperature
2) Base emitter Voltage ,VBE, which decreases by 2.5 mV per oC
3) Transistor current gain, hFE or β which increases with temperature.

If base current IB is kept constant since IB is approximately equal to Vcc/RB. If the transistor is
replaced by another one of the same type, one cannot ensure that the new transistor will have
identical parameters as that of the first one. Parameters such as β vary over a range. This results in the
variation of collector current Ic for a given IB. Hence , in the o/p characteristics, the spacing between
the curves might increase or decrease which leads to the shifting of the Q-point to a location which
might be completely unsatisfactory.

4.3 AC LOAD LINE

After drawing the dc load line, the operating point Q is properly located at the center of the dc
load line. This operating point is chosen under zero input signal condition of the circuit. Hence the ac
load line should also pas through the operating point Q. The effective ac load resistance R ac, is a
combination of RC parallel to RL i.e. || . So the slope of the ac load line CQD will be .

To draw the ac load line, two end points, I.e. VCE(max) and IC(max) when the signal is applied are required.

, which locates point D on the Vce axis.

, which locates the point C on the IC axis.

By joining points c and D, ac load line CD is constructed. As RC > Rac, The dc load line is less steep than
ac load line.

4.4 STABILITY FACTOR (S):

The rise of temperature results in increase in the value of transistor gain β and the leakage
current Ico. So, IC also increases which results in a shift in operating point. Therefore, The biasing
network should be provided with thermal stability. Maintenance of the operating point is specified by
S, which indicates the degree of change in operating point due to change in temperature.

The extent to which IC is stabilized with varying IC is measured by a stability factor S

For CE configuration

Differentiate the above equation w.r.t IC , We get

S should be small to have better thermal stability.

Stability factor S’ and S’’:

S’ is defined as the rate of change of IC with VBE, keeping IC and VBE constant.

S’’ is defined as the rate of change of IC with β, keeping ICO and VBE constant.
4.5 METHODS OF TRANSISTOR BIASING

1) Fixed bias (base bias)

Fig 4.3 Fixed Biasing Circuit

This form of biasing is also called base bias. In the fig 4.3 shown, the single power source (for example, a
battery) is used for both collector and base of a transistor, although separate batteries can also be used.

In the given circuit,

Vcc = IBRB + Vbe

Therefore, IB = (Vcc - Vbe)/RB

Since the equation is independent of current ICR, dIB//dICR =0 and the stability factor is given by the
equation….. reduces to

S=1+β

Since β is a large quantity, this is very poor biasing circuit. Therefore in practice the circuit is not used fo
biasing.

For a given transistor, Vbe does not vary significantly during use. As Vcc is of fixed value, on selection of R
the base current IB is fixed. Therefore this type is called fixed bias type of circuit.

Also for given circuit, Vcc = ICRC + Vce

 Therefore, Vce = Vcc - ICRC

Merits:

It is simple to shift the operating point anywhere in the active region by merely changing
the base resistor (RB).
A very small number of components are required.

Demerits:

The collector current does not remain constant with variation in temperature or power
supply voltage. Therefore the operating point is unstable.
Changes in Vbe will change IB and thus cause RE to change. This in turn will alter the gain
of the stage.
When the transistor is replaced with another one, considerable change in the value of β
can be expected. Due to this change the operating point will shift.

2) EMITTER-FEEDBACK BIAS:

The emitter feedback bias circuit is shown in the fig 4.4. The fixed bias circuit is modified by
attaching an external resistor to the emitter. This resistor introduces negative feedback that stabilizes
the Q-point. From Kirchhoff's voltage law, the voltage across the base resistor is

VRb = VCC - IeRe - Vbe.

Fig 4.4 Self Biasing Circuit

From Ohm's law, the base current is

 Ib = VRb / Rb.

The way feedback controls the bias point is as follows. If V be is held constant and temperature
increases, emitter current increases. However, a larger Ie increases the emitter voltage Ve = IeRe, which
in turn reduces the voltage VRb across the base resistor. A lower base-resistor voltage drop reduces the
base current, which results in less collector current because Ic = ß IB. Collector current and emitter
current are related by Ic = α Ie with α ≈ 1, so increase in emitter current with temperature is opposed,
and operating point is kept stable.

Similarly, if the transistor is replaced by another, there may be a change in IC (corresponding to

change in β-value, for example). By similar process as above, the change is negated and operating
point kept stable.

For the given circuit,

IB = (VCC - Vbe)/(RB + (β+1)RE).

Merits:

The circuit has the tendency to stabilize operating point against changes in temperature and β-
value.

Demerits:

In this circuit, to keep IC independent of β the following condition must be met:

which is approximately the case if ( β + 1 )RE >> RB.

As β-value is fixed for a given transistor, this relation can be satisfied either by keeping
RE very large, or making RB very low.

If RE is of large value, high VCC is necessary. This increases cost as well as precautions
necessary while handling.
If RB is low, a separate low voltage supply should be used in the base circuit. Using two
supplies of different voltages is impractical.

In addition to the above, RE causes ac feedback which reduces the voltage gain of
the amplifier.

3)COLLECTOR TO BASE BIAS OR COLLECTOR FEED-BACK BIAS:

 Fig 4.5 Collector to Base Biasing Circuit

This configuration shown in fig 4.5 employs negative feedback to prevent thermal runaway and
stabilize the operating point. In this form of biasing, the base resistor RB is connected to the collector
instead of connecting it to the DC source Vcc. So any thermal runaway will induce a voltage drop across
the RC resistor that will throttle the transistor's base current.

From Kirchhoff's voltage law, the voltage across the base resistor Rb is

By the Ebers–Moll model, Ic = βIb, and so

From Ohm's law, the base current , and so

Hence, the base current Ib is

If Vbe is held constant and temperature increases, then the collector current Ic increases.
However, a larger Ic causes the voltage drop across resistor Rc to increase, which in turn reduces the
voltage across the base resistor Rb. A lower base-resistor voltage drop reduces the base current Ib,
which results in less collector current Ic. Because an increase in collector current with temperature is
opposed, the operating point is kept stable.

Merits:

Circuit stabilizes the operating point against variations in temperature and β (i.e.
replacement of transistor)

Demerits:

In this circuit, to keep Ic independent of β, the following condition must be met:

which is the case when

As β-value is fixed (and generally unknown) for a given transistor, this relation can be
satisfied either by keeping Rc fairly large or making Rb very low.

If Rc is large, a high Vcc is necessary, which increases cost as well as precautions

necessary while handling.
If Rb is low, the reverse bias of the collector–base region is small, which limits the range
of collector voltage swing that leaves the transistor in active mode.

The resistor Rb causes an AC feedback, reducing the voltage gain of the amplifier. This
undesirable effect is a trade-off for greater Q-point stability.

Usage: The feedback also decreases the input impedance of the amplifier as seen from the
base, which can be advantageous. Due to the gain reduction from feedback, this biasing form is used
only when the trade-off for stability is warranted.
 4)COLLECTOR –EMITTER FEEDBACK BIAS:

Fig 4.6 Collector-Emitter Biasing Circuit

The above fig4.6 shows the collector –emitter feedback bias circuit that can be obtained by
applying both the collector feedback and emitter feedback. Here the collector feedback is provided by
connecting a resistance RB from the collector to the base and emitter feedback is provided by
connecting an emitter Re from emitter to ground. Both feed backs are used to control collector
current and base current IB in the opposite direction to increase the stability as compared to the
previous biasing circuits.

5)VOLTAGE DIVIDER BIAS OR SELF BIAS OR EMITTER BIAS

The voltage divider as shown in the fig 4.7 is formed using external resistors R1 and R2. The
voltage across R2 forward biases the emitter junction. By proper selection of resistors R 1 and R2, the
operating point of the transistor can be made independent of β. In this circuit, the voltage divider holds
the base voltage fixed independent of base current provided the divider current is large compared to
the base current. However, even with a fixed base voltage, collector current varies with temperature
(for example) so an emitter resistor is added to stabilize the Q-point, similar to the above circuits with
emitter resistor.
 Fig 4.7 Voltage Divider Biasing Circuit

In this circuit the base voltage is given by:

voltage across

provided .

Also

For the given circuit,

Let the current in resistor R1 is I1 and this is divided into two parts – current through base and
resistor R2. Since the base current is very small so for all practical purpose it is assumed that I1 also
flows through R2, so we have

Applying KVL in the circuit, we have

 It is apparent from above expression that the collector current is independent of ? thus the
stability is excellent. In all practical cases the value of VBE is quite small in comparison to the V2, so it
can be ignored in the above expression so the collector current is almost independent of the transistor
parameters thus this arrangement provides excellent stability.
Again applying KVL in collector circuit, we have

The resistor RE provides stability to the circuit. If the current through the collector rises, the
voltage across the resistor RE also rises. This will cause VCE to increase as the voltage V2 is
independent of collector current. This decreases the base current, thus collector current increases to
its former value.
Stability factor for such circuit arrangement is given by

If Req/RE is very small compared to 1, it can be ignored in the above expression thus we have

Which is excellent since it is the smallest possible value for the stability. In actual practice the
value of stability factor is around 8-10, since Req/RE cannot be ignored as compared to 1.

Merits:

Unlike above circuits, only one dc supply is necessary.

Operating point is almost independent of β variation.
Operating point stabilized against shift in temperature.
 Demerits:

In this circuit, to keep IC independent of β the following condition must be met:

which is approximately the case if

where R1 || R2 denotes the equivalent resistance of R1 and R2 connected in parallel.

As β-value is fixed for a given transistor, this relation can be satisfied either by keeping
RE fairly large, or making R1||R2 very low.

If RE is of large value, high VCC is necessary. This increases cost as well as precautions
necessary while handling.
If R1 || R2 is low, either R1 is low, or R2 is low, or both are low. A low R1 raises VB closer
to VC, reducing the available swing in collector voltage, and limiting how large RC can be made without
driving the transistor out of active mode. A low R2 lowers Vbe, reducing the allowed collector current.
Lowering both resistor values draws more current from the power supply and lowers the input
resistance of the amplifier as seen from the base.

AC as well as DC feedback is caused by RE, which reduces the AC voltage gain of the
amplifier. A method to avoid AC feedback while retaining DC feedback is discussed below.

Usage: The circuit's stability and merits as above make it widely used for linear circuits.

4.6 BIAS COMPENSATION USING DIODE AND TRANSISTOR

The various biasing circuits considered use some type of negative feedback to stabilize the
operation point. Also, diodes, thermistors and sensistors can be used to compensate for variations in
current.

DIODE COMPENSATION:
 The following fig4.8 shows a transistor amplifier with a diode D connected across the base-
emitter junction for compensation of change in collector saturation current I CO. The diode is of the
same material as the transistor and it is reverse biased by e the emitter-base junction voltage VBE,
allowing the diode reverse saturation current IO to flow through diode D. The base current IB=I-IO.

As long as temperature is constant, diode D operates as a resistor. As the temperature

increases, ICO of the transistor increases. Hence, to compensate for this, the base current I B should be
decreased.

The increase in temperature will also cause the leakage current IO through D to increase and
thereby decrease the base current IB. This is the required action to keep Ic constant.

This type of bias compensation does not need a change in Ic to effect the change in I C, as both
IO and ICO can track almost equally according to the change in temperature.

THERMISTOR COMPENSATION:

The following fig4.9 a thermistor RT, having a negative temperature coefficient is connected in
parallel with R2. The resistance of thermistor decreases exponentially with increase of temperature. An
increase of temperature will decrease the base voltage VBE, reducing IB and IC.
Fig 4.9 Thermistor Compensation

SENSISTOR COMPENSATION:

In the following fig4.10 shown a sensistor Rs having a positive temperature coefficient is

connected across R1 or RE. Rs increases with temperature. As the temperature increases, the
equivalent resistance of the parallel combination of R1 and Rs also increases and hence V BE decreases,
reducing IB and Ic. This reduced Ic compensates for increased Ic caused by the increase in V BE, ICO and β
due to temperature.
 Fig 4.10 Sensistor Compensation

4.7 THERMAL RUNAWAY AND THERMAL STABILITY

THERMAL RUNAWAY:

The collector current for the CE circuit is given by The three variables
in the equation, β, , and increases with rise in temperature. In particular, the reverse saturation
current or leakage current changes greatly with temperature. Specifically it doubles for every 10 oC
rise in temperature. The collector current causes the collector base junction temperature to rise
which in turn, increase , as a result will increase still further, which will further rise the
temperature at the collector base junction. This process will become cumulative leading at the
collector base junction. This process will become cumulative leading to “thermal runaway”.
Consequently, the ratings of the transistor are exceeded which may destroy the transistor itself.

The collector is made larger in size than the emitter in order to help the heat developed at the
collector junction. However if the circuit is designed such that the base current is made to decrease
automatically with rise in temperature, then the decrease in will compensate for increase in the
, keeping almost constant.

THERMAL RESISTANCE

Consider transistor used in a circuit where the ambient temperature of the air around the
transistor is TAoC and the temperature of the collector-base junction of the transistor is TJoC.

Due to heating within the transistor TJ is higher than TA. As the temperature difference TJ- TA is greater,
the power dissipated in the transistor, PD will be greater, i.e, TJ- TA PD

The equation can be written as TJ- TA PD. , where is the constant of proportionality and is
called the Thermal resistance. Rearranging the above equation = TJ- TA /PD. Hence is measured in
o o
C/W which may be as small as 0.2 C/W for a high power transistor that has an efficient heat sink or
up to 1000oC/W for small signal, low power transistor which have no cooling provision.

As Θ represents total thermal resistance from a transistor junction to the ambient temperature,
it is referred to as ΘJ-A. However, for power transistors, thermal resistance is given form junction to
case, ΘJ-C.

The amount resistance from junction to ambience is considered to consist of 2 parts.

 ΘJ-A = ΘJ-C - ΘC-A.

Which indicates the heat dissipated in the junction must make its way to the surrounding air through
two series paths from junction to case and from case to air. Hence the power dissipated.

PD = (TJ- TA Θ J-A

=(TJ- TA Θ J-C + Θ C-A)

ΘJ-C is determined by the type of manufacture of the transistor and how it is located I the case, but Θ C-A
is determined by the surface area of the case or flange and its contact with air. If the effective surface
area of the transistor case could be increased, the resistance to heat flows, or could be increased Θ C-A,
could be decreased. This can be achieved by the use of a heat sink.

The heat sink is a relatively large, finned, usually black metallic heat conducting device in close
contact with transistor case or flange. Many versions of heat sink exist depending upon the shape and
size of the transistor. Larger the heat sink smaller is the thermal resistance ΘHS-A.

This thermal resistance is not added to ΘC-A in series, but is instead in parallel with it and if

ΘHS-A is much less than ΘC-A, then ΘC-A will be reduced significantly, thereby improving the dissipation
capability of the transistor. Thus

Θ J-A =Θ J-C + Θ C-A|| ΘHS-A.

4.8 CONDITION FOR THERMAL STABILITY

For preventing thermal runaway, the required condition I the rate at which the heat is released
at the collector junction should not exceed the rate at which the heat can be dissipated under steady
state condition. Hence the condition to be satisfied to avoid thermal runaway is given by

If the circuit is properly designed, then the transistor cannot runaway below a specified ambient
temperature or even under any conditions.

In the self biased circuit the transistor is biased in the active region. The power generated at the
junction without any signal is

Let us assume that the quiescent collector and the emitter currents are equal. Then
 ………………….(1)

The condition to prevent thermal runaway can be written as

As Θ and are positive, should be negative in order to satisfy the above condition.

Differentiating equation (1) w.r.t we get

Hence to avoid thermal runaway it is necessary that

SinceVCE=VCC-IC(RE+RC) then eq(4) implies that VCE<VCC/2. IF the inequality of eq(4) is not satisfied
and VCE<VCC/2, then from eq(3), is positive., and the corresponding eq(2) should be satisfied.

Otherwise thermal runaway will occur.

 UNIT 5

FIELD EFFECT TRANSISTOR

5.1 INTRODUCTION
1. The Field effect transistor is abbreviated as FET , it is an another semiconductor device like a
BJT which can be used as an amplifier or switch.
2. The Field effect transistor is a voltage operated device. Whereas Bipolar junction transistor is a
current controlled device. Unlike BJT a FET requires virtually no input current.
3. This gives it an extremely high input resistance , which is its most important advantage over a
bipolar transistor.
4. FET is also a three terminal device, labeled as source, drain and gate.
5. The source can be viewed as BJT’s emitter, the drain as collector, and the gate as the counter
part of the base.
6. The material that connects the source to drain is referred to as the channel.

7. FET operation depends only on the flow of majority carriers ,therefore they are called uni polar
devices. BJT operation depends on both minority and majority carriers.

8. As FET has conduction through only majority carriers it is less noisy than BJT.

9. FETs are much easier to fabricate and are particularly suitable for ICs because they occupy less
space than BJTs.

10. FET amplifiers have low gain bandwidth product due to the junction capacitive effects and
produce more signal distortion except for small signal operation.

11. The performance of FET is relatively unaffected by ambient temperature changes. As it has a
negative temperature coefficient at high current levels, it prevents the FET from thermal
breakdown. The BJT has a positive temperature coefficient at high current levels which leads to
thermal breakdown.

5.2 CLASSIFICATION OF FET:

There are two major categories of field effect transistors:

1. Junction Field Effect Transistors

2. MOSFETs

These are further sub divided in to P- channel and N-channel devices.

MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement . MOSFETs
 When the channel is of N-type the JFET is referred to as an N-channel JFET ,when the channel is of
P-type the JFET is referred to as P-channel JFET.

The schematic symbols for the P-channel and N-channel JFETs are shown in the figure.

Fig 5.1 schematic symbols for the P-channel and N-channel JFET

5.3 CONSTRUCTION AND OPERATION OF N- CHANNEL FET

If the gate is an N-type material, the channel must be a P-type material.

CONSTRUCTION OF N-CHANNEL JFET

Fig 5.2 Construction of N-Channel JFET

A piece of N- type material, referred to as channel has two smaller pieces of P-type material
attached to its sides, forming PN junctions. The channel ends are designated as the drain and
source. And the two pieces of P-type material are connected together and their terminal is called
the gate. Since this channel is in the N-type bar, the FET is known as N-channel JFET.
OPERATION OF N-CHANNEL JFET:-

The overall operation of the JFET is based on varying the width of the channel to control the drain
current.

A piece of N type material referred to as the channel, has two smaller pieces of P type
material attached to its sites, farming PN –Junctions. The channel’s ends are designated the drain and
the source. And the two pieces of P type material are connected together and their terminal is called
the gate. With the gate terminal not connected and the potential applied positive at the drain negative
at the source a drain current Id flows. When the gate is biased negative with respective to the source
the PN junctions are reverse biased and depletion regions are formed. The channel is more lightly
doped than the P type gate blocks, so the depletion regions penetrate deeply into the channel. Since
depletion region is a region depleted of charge carriers it behaves as an Insulator. The result is that the
channel is narrowed. Its resistance is increased and Id is reduced. When the negative gate bias voltage
is further increased, the depletion regions meet at the center and Id is cut off completely.

There are two ways to control the channel width

1. By varying the value of Vgs

2. And by Varying the value of Vds holding Vgs constant

1 By varying the value of Vgs :-

We can vary the width of the channel and in turn vary the amount of drain
current. This can be done by varying the value of Vgs. This point is illustrated in the fig below. Here
we are dealing with N channel FET. So channel is of N type and gate is of P type that constitutes a
PN junction. This PN junction is always reverse biased in JFET operation .The reverse bias is applied
by a battery voltage Vgs connected between the gate and the source terminal i.e positive terminal
of the battery is connected to the source and negative terminal to gate.
1) When a PN junction is reverse biased the electrons and holes diffuse across junction by leaving
immobile ions on the N and P sides , the region containing these immobile ions is known as
depletion regions.
2) If both P and N regions are heavily doped then the depletion region extends symmetrically on
both sides.
3) But in N channel FET P region is heavily doped than N type thus depletion region extends more
in N region than P region.
4) So when no Vds is applied the depletion region is symmetrical and the conductivity becomes
Zero. Since there are no mobile carriers in the junction.
5) As the reverse bias voltage is increases the thickness of the depletion region also increases. i.e.
the effective channel width decreases .
6) By varying the value of Vgs we can vary the width of the channel.

2 Varying the value of Vds holding Vgs constant :-

1) When no voltage is applied to the gate i.e. Vgs=0 , Vds is applied between source and drain the
electrons will flow from source to drain through the channel constituting drain current Id .
2) With Vgs= 0 for Id= 0 the channel between the gate junctions is entirely open .In response to a
small applied voltage Vds , the entire bar acts as a simple semi conductor resistor and the
current Id increases linearly with Vds .
3) The channel resistances are represented as rd and rs as shown in the fig.

4) This increasing drain current Id produces a voltage drop across rd which reverse biases the gate
to source junction,(rd> rs) .Thus the depletion region is formed which is not symmetrical .
 5) The depletion region i.e. developed penetrates deeper in to the channel near drain and less
towards source because Vrd >> Vrs. So reverse bias is higher near drain than at source.
6) As a result growing depletion region reduces the effective width of the channel. Eventually a
voltage Vds is reached at which the channel is pinched off. This is the voltage where the current
Id begins to level off and approach a constant value.
7) So, by varying the value of Vds we can vary the width of the channel holding Vgs constant.

When both Vgs and Vds is applied:-

It is of course in principle not possible for the channel to close Completely and there by reduce
the current Id to Zero for, if such indeed, could be the case the gate voltage Vgs is applied in the
direction to provide additional reverse bias

1) When voltage is applied between the drain and source with a battery Vdd, the electrons flow
from source to drain through the narrow channel existing between the depletion regions. This
constitutes the drain current Id, its conventional direction is from drain to source.
2) The value of drain current is maximum when no external voltage is applied between gate and
source and is designated by Idss.
 3) When Vgs is increased beyond Zero the depletion regions are widened. This reduces the
effective width of the channel and therefore controls the flow of drain current through the
channel.
4) When Vgs is further increased a stage is reached at which to depletion regions touch each
other that means the entire channel is closed with depletion region. This reduces the drain
current to Zero.

5.4 CHARACTERISTICS OF N-CHANNEL JFET

The family of curves that shows the relation between current and voltage are known as
characteristic curves.

There are two important characteristics of a JFET.

1) Drain or VI Characteristics
2) Transfer characteristics
1. Drain Characteristics:-
2. Drain characteristics shows the relation between the drain to source voltage Vds
and drain current Id. In order to explain typical drain characteristics let us consider the curve
with Vgs= 0.V.

1) When Vds is applied and it is increasing the drain current ID also increases linearly up to knee
point.
2) This shows that FET behaves like an ordinary resistor.This region is called as ohmic region.
3) ID increases with increase in drain to source voltage. Here the drain current is increased
slowly as compared to ohmic region.
 4)
5)
6)

4) It is because of the fact that there is an increase in VDS .This in turn increases the reverse bias
voltage across the gate source junction .As a result of this depletion region grows in size thereby
reducing the effective width of the channel.

5) All the drain to source voltage corresponding to point the channel width is reduced to a
minimum value and is known as pinch off.

5) The drain to source voltage at which channel pinch off occurs is called pinch off voltage(Vp).
PINCH OFF Region:-

1) This is the region shown by the curve as saturation region.

2) It is also called as saturation region or constant current region. Because of the channel is
occupied with depletion region , the depletion region is more towards the drain and less
towards the source, so the channel is limited, with this only limited number of carriers are
only allowed to cross this channel from source drain causing a current that is constant in
this region. To use FET as an amplifier it is operated in this saturation region.
3) In this drain current remains constant at its maximum value IDSS.

4) The drain current in the pinch off region depends upon the gate to source voltage and is
given by the relation
Id =Idss [1-Vgs/Vp]2

This is known as shokley’s relation.

BREAKDOWN REGION:-

1) The region is shown by the curve .In this region, the drain current increases rapidly as the
drain to source voltage is increased.
2) It is because of the gate to source junction due to avalanche effect.
 3) The avalanche break down occurs at progressively lower value of VDS because the reverse
bias gate voltage adds to the drain voltage thereby increasing effective voltage across the
gate junction
This causes

1. The maximum saturation drain current is smaller

2. The ohmic region portion decreased.
4) It is important to note that the maximum voltage VDS which can be applied to FET is the
lowest voltage which causes available break down.
3. TRANSFER CHARACTERISTICS:-

These curves shows the relationship between drain current ID and gate to source voltage
VGS for different values of VDS.

1) First adjust the drain to source voltage to some suitable value , then increase the gate to
source voltage in small suitable value.
2) Plot the graph between gate to source voltage along the horizontal axis and current ID on
the vertical axis. We shall obtain a curve like this.

3) As we know that if Vgs is more negative curves drain current to reduce . where Vgs is made
sufficiently negative, Id is reduced to zero. This is caused by the widening of the depletion
region to a point where it is completely closes the channel. The value of Vgs at the cutoff
point is designed as Vgsoff
 4) The upper end of the curve as shown by the drain current value is equal to I dss that is when
Vgs = 0 the drain current is maximum.

5) While the lower end is indicated by a voltage equal to Vgsoff

6) If Vgs continuously increasing , the channel width is reduced , then Id =0
7) It may be noted that curve is part of the parabola; it may be expressed as
Id=Idss[1-Vgs/Vgsoff]2

DIFFERENCE BETWEEN Vp AND Vgsoff –

Vp is the value of Vgs that causes the JFET to become constant current component, It is
measured at Vgs =0V and has a constant drain current of Id =Idss .Where Vgsoff is the value of Vgs that
reduces Id to approximately zero.

Why the gate to source junction of a JFET be always reverse biased ?

The gate to source junction of a JFET is never allowed to become forward biased because
the gate material is not designed to handle any significant amount of current. If the junction is allowed
to become forward biased, current is generated through the gate material. This current may destroy
the component.

There is one more important characteristic of JFET reverse biasing i.e. J FET ‘s have
extremely high characteristic gate input impedance. This impedance is typically in the high mega ohm
range. With the advantage of extremely high input impedance it draws no current from the source. The
high input impedance of the JFET has led to its extensive use in integrated circuits. The low current
requirements of the component makes it perfect for use in ICs. Where thousands of transistors must
be etched on to a single piece of silicon. The low current draw helps the IC to remain relatively cool,
thus allowing more components to be placed in a smaller physical area.

5.5 JFET PARAMETERS

The electrical behavior of JFET may be described in terms of certain parameters. Such parameters are
obtained from the characteristic curves.

A C Drain resistance(rd):

It is also called dynamic drain resistance and is the a.c.resistance between the drain and source
terminal,when the JFET is operating in the pinch off or saturation region.It is given by the ratio of small
change in drain to source voltage ∆Vds to the corresponding change in drain current ∆Id for a
constant gate to source voltage Vgs.

Mathematically it is expressed as rd=∆Vds/ ∆Id where Vgs is held constant.

TRANCE CONDUCTANCE (gm):

It is also called forward transconductance . It is given by the ratio of small change in drain current (∆I d)
to the corresponding change in gate to source voltage (∆V ds)

Mathematically the transconductance can be written as

gm=∆Id/∆Vds

AMPLIFICATION FACTOR (µ)

It is given by the ratio of small change in drain to source voltage (∆V ds) to the corresponding change in
gate to source voltage (∆Vgs)for a constant drain current (Id).

Thus µ=∆Vds/∆Vgs when Id held constant

The amplification factor µ may be expressed as a product of transconductance (g m)and ac drain

resistance (rd)

µ=∆Vds/∆Vgs=gm rd

5.5 THE FET SMALL SIGNAL MODEL

The linear small signal equivalent circuit for the FET can be obtained in a manner similar to
that used to derive the corresponding model for a transistor.

We can express the drain current iD as a function f of the gate voltage and drain voltage V ds.

Id =f(Vgs,Vds)------------------(1)

The transconductance gm and drain resistance rd:-

If both gate voltage and drain voltage are varied, the change in the drain current is
approximated by using taylors series considering only the first two terms in the expansion

∆id= |vds=constant .∆vgs |vgs=constant∆vds

we can write ∆id=id

∆vgs=vgs

∆vds=vds

Id=gm v Vds→(1)

Where gm= |Vds |Vds

 gm= |Vds

Is the mutual conductance or transconductance .It is also called as gfs or yfs common source forward
conductance .

The second parameter rd is the drain resistance or output resistance is defined as

rd= |Vgs |Vgs= |Vgs

rd= |Vgs

The reciprocal of the rd is the drain conductance gd .It is also designated by Yos and Gos and
called the common source output conductance . So the small signal equivalent circuit for FET can be
drawn in two different ways.

1.small signal current –source model

2.small signal voltage-source model.

A small signal current –source model for FET in common source configuration can be drawn
satisfying Eq→(1) as shown in the figure(a)

This low frequency model for FET has a Norton’s output circuit with a dependent current
generator whose magnitude is proportional to the gate-to –source voltage. The proportionality factor
is the transconductance ‘gm’. The output resistance is ‘rd’. The input resistance between the gate and
source is infinite, since it is assumed that the reverse biased gate draws no current. For the same
reason the resistance between gate and drain is assumed to be infinite.

The small signal voltage-source model is shown in the figure(b).

This can be derived by finding the Thevenin’s equivalent for the output part of fig(a) .

These small signal models for FET can be used for analyzing the three basic FET amplifier
configurations:

1.common source (CS) 2.common drain (CD) or source follower

3. common gate(CG).
(a)Small Signal Current source model for FET (b)Small Signal voltage source model for FET

Here the input circuit is kept open because of having high input impedance and the output
circuit satisfies the equation for ID

5.7 MOSFET
We now turn our attention to the insulated gate FET or metal oxide semi conductor FET which is
having the greater commercial importance than the junction FET.

Most MOSFETS however are triodes, with the substrate internally connected to the source. The circuit
symbols used by several manufacturers are indicated in the Fig below.

(a) Depletion type MOSFET (b) Enhancement type MOSFET

Both of them are P- channel

Here are two basic types of MOSFETS

(1) Depletion type (2) Enhancement type MOSFET.

D-MOSFETS can be operated in both the depletion mode and the enhancement mode. E MOSFETS
are restricted to operate in enhancement mode. The primary difference between them is their physical
construction.
The construction difference between the two is shown in the fig given below.

As we can see the D MOSFET have physical channel between the source and drain
terminals(Shaded area)

The E MOSFET on the other hand has no such channel physically. It depends on the gate voltage
to form a channel between the source and the drain terminals.

Both MOSFETS have an insulating layer between the gate and the rest of the component. This
insulating layer is made up of SIO2 a glass like insulating material. The gate material is made up of
metal conductor .Thus going from gate to substrate, we can have metal oxide semi conductor which is
where the term MOSFET comes from.

Since the gate is insulated from the rest of the component, the MOSFET is sometimes
referred to as an insulated gate FET or IGFET.

The foundation of the MOSFET is called the substrate. This material is represented in the schematic
symbol by the center line that is connected to the source.

In the symbol for the MOSFET, the arrow is placed on the substrate. As with JFET an arrow pointing in
represents an N-channel device, while an arrow pointing out represents p-channel device.

CONSTRUCTION OF AN N-CHANNEL MOSFET:-

The N- channel MOSFET consists of a lightly doped p type substance into which two heavily doped
n+ regions are diffused as shown in the Fig. These n+ sections , which will act as source and drain.
A thin layer of insulation silicon dioxide (SIO2) is grown over the surface of the structure, and
holes are cut into oxide layer, allowing contact with the source and drain. Then the gate metal area is
overlaid on the oxide, covering the entire channel region.Metal contacts are made to drain and source
and the contact to the metal over the channel area is the gate terminal.The metal area of the gate, in
conjunction with the insulating dielectric oxide layer and the semiconductor channel, forms a parallel
plate capacitor. The insulating layer of sio2

Is the reason why this device is called the insulated gate field effect transistor. This layer results in an
extremely high input resistance (10 10 to 10power 15ohms) for MOSFET.

5.7.1 DEPLETION MOSFET

The basic structure of D –MOSFET is shown in the fig. An N-channel is diffused between source and
drain with the device an appreciable drain current IDSS flows foe zero gate to source voltage, Vgs=0.

Depletion mode operation:-

1) The above fig shows the D-MOSFET operating conditions with gate and source terminals shorted
together(VGS=0V)

2) At this stage ID= IDSS where VGS=0V, with this voltage VDS, an appreciable drain current IDSS
flows.

3) If the gate to source voltage is made negative i.e. VGs is negative .Positive charges are induced in
the channel through the SIO2 of the gate capacitor.

4) Since the current in a FET is due to majority carriers(electrons for an N-type material) , the
induced positive charges make the channel less conductive and the drain current drops as Vgs is
made more negative.

5) The re distribution of charge in the channel causes an effective depletion of majority carriers ,
which accounts for the designation depletion MOSFET.

6) That means biasing voltage Vgs depletes the channel of free carriers This effectively reduces the
width of the channel , increasing its resistance.

7) Note that negative Vgs has the same effect on the MOSFET as it has on the JFET.

8) As shown in the fig above, the depletion layer generated by Vgs (represented by the white space
between the insulating material and the channel) cuts into the channel, reducing its width. As a
result ,Id<Idss.The actual value of ID depends on the value of Idss,Vgs(off) and Vgs.

Enhancement mode operation of the D-MOSFET:-

1) This operating mode is a result of applying a positive gate to source voltage Vgs to the device.
2) When Vgs is positive the channel is effectively widened. This reduces the resistance of the
channel allowing ID to exceed the value of IDSS
3) When Vgs is given positive the majority carriers in the p-type are holes. The holes in the p type
substrate are repelled by the +ve gate voltage.
 4) At the same time, the conduction band electrons (minority carriers) in the p type material are
attracted towards the channel by the +gate voltage.
5) With the build up of electrons near the channel , the area to the right of the physical channel
effectively becomes an N type material.
6) The extended n type channel now allows more current, Id> Idss

Characteristics of Depletion MOSFET:-

The fig. shows the drain characteristics for the N channel depletion type MOSFET

1) The curves are plotted for both Vgs positive and Vgs negative voltages
.
2) When Vgs=0 and negative the MOSFET operates in depletion mode when Vgs is positive ,the
MOSFET operates in the enhancement mode.
3) The difference between JFET and D MOSFET is that JFET does not operate for positive values of
Vgs.

4) When Vds=0, there is no conduction takes place between source to drain, if Vgs<0 and Vds>0
then Id increases linearly.

5) But as Vgs,0 induces positive charges holes in the channel, and controls the channel width. Thus
the conduction between source to drain is maintained as constant, i.e. Id is constant.

6) If Vgs>0 the gate induces more electrons in channel side, it is added with the free electrons
generated by source. again the potential applied to gate determines the channel width and
maintains constant current flow through it as shown in Fig
TRANSFER CHARACTERISTICS:-

The combination of 3 operating states i.e. Vgs=0V, VGs<0V, Vgs>0V is represented by the D
MOSFET transconductance curve shown in Fig.

1) Here in this curve it may be noted that the region AB of the characteristics similar to that of
JFET.

2) This curve extends for the positive values of Vgs

3) Note that Id=Idss for Vgs=0V when Vgs is negative,Id< Idss when Vgs= Vgs(off) ,Id is reduced to
approximately omA.Where Vgs is positive Id>Idss.So obviously Idss is not the maximum possible
value of Id for a MOSFET.

4) The curves are similar to JFET so thet the D MOSFET have the same transconductance equation.

5.7.2 E-MOSFETS

The E MOSFET is capable of operating only in the enhancement mode.The gate potential must be
positive w.r.t to source.

1) when the value of Vgs=0V, there is no channel connecting the source and drain materials.

2) As aresult , there can be no significant amount of drain current.

3) When Vgs=0, the Vdd supply tries to force free electrons from source to drain but the presence
of p-region does not permit the electrons to pass through it. Thus there is no drain current at
Vgs=0,

4) If Vgs is positive, it induces a negative charge in the p type substrate just adjacent to the SIO2
layer.

5) As the holes are repelled by the positive gate voltage, the minority carrier electrons attracted
toward this voltage. This forms an effective N type bridge between source and drain providing a
path for drain current.

6) This +ve gate voltage forma a channel between the source and drain.

7) This produces a thin layer of N type channel in the P type substarate.This layer of free electrons
is called N type inversion layer.
8) The minimum Vgs which produces this inversion layer is called threshold voltage and is
designated by Vgs(th).This is the point at which the device turns on is called the threshold
voltage Vgs(th)
9) When the voltage Vgs is <Vgs (th) no current flows from drain to source.

10) How ever when the voltage Vgs > Vgs (th) the inversion layer connects the drain to source and
we get significant values of current.

CHARACTERISTICS OF E MOSFET:-

1. DRAIN CHARACTERISTICS

The volt ampere drain characteristics of an N-channel enhancement mode MOSFET are given in the

fig.
 2. TRANSFER CHARACTERISTICS:-

1) The current Idss at Vgs≤ 0 is very small beinf of the order of a few nano amps.
2) As Vgs is made +ve , the current Id increases slowly at forst, and then much more rapidly with
an increase in Vgs.
3) The standard transconductance formula will not work for the E MOSFET.
4) To determine the value of ID at a given value of VGs we must use the following relation
Id =K[Vgs-Vgs(Th)]2

Where K is constant for the MOSFET . found as

K=

From the data specification sheets, the 2N7000 has the following ratings.

Id(on)= 75mA(minimum).

And Vgs(th)=0.8(minimum)

5.8 APPLICATION OF MOSFET

One of the primary contributions to electronics made by MOSFETs can be found in the area of
digital (computer electronics). The signals in digital circuits are made up of rapidly switching dc
levels. This signal is called as a rectangular wave ,made up of two dc levels (or logic levels). These
logic levels are 0V and +5V.
 A group of circuits with similar circuitry and operating characteristics is referred to as a logic
family. All the circuits in a given logic family respond to the same logic levels, have similar speed
and power-handling capabilities , and can be directly connected together. One such logic family is
complementary MOS (or CMOS) logic. This logic family is made up entirely of MOSFETs.

5.9 BIASING FET:-

For the proper functioning of a linear FET amplifier, it is necessary to maintain the
operating point Q stable in the central portion of the pinch off region The Q point should be
independent of device parameter variations and ambient temperature variations

This can be achieved by suitably selecting the gate to source voltage VGS and drain current ID
which is referred to as biasing

JFET biasing circuits are very similar to BJT biasing circuitsThe main difference between
JFET circuits and BJT circuits is the operation of the active components themselves

There are mainly two types of Biasing circuits

1) Self bias
2) Voltage divider bias.

5.9.1 SELF BIAS

Self bias is a JFET biasing circuit that uses a source resistor to help reverse bias the JFET gate. A self
bias circuit is shown in the fig. Self bias is the most common type of JFET bias. This JFET must be
operated such that gate source junction is always reverse biased. This condition requires a negative
VGS for an N channel JFET and a positive VGS for P channel JFET. This can be achieved using the self
bias arrangement as shown in Fig. The gate resistor RG doesn’t affect the bias because it has essentially
no voltage drop across it, and : the gate remains at 0V .RG is necessary only to isolate an ac signal from
ground in amplifier applications. The voltage drop across resistor RS makes gate source junction
reverse biased.
 For the dc analysis coupling capacitors are open circuits.

For the N channel FET in Fig (a)

IS produces a voltage drop across RS and makes the source positive w.r.t ground. In any JFET circuit all
the source current passes through the device to the drain circuit .This is due to the fact that there is no
significant gate current.

We can define source current as IS = ID

(VG =0 because there is no gate current flowing in RG So VG across RG is zero)

VG =0 then VS= ISRS =ID RS

VGS = VG-VS =0-ID RS=- ID RS

DC analysis of self Bias:-

In the following DC analysis, the N channel J FET shown in the fig. is used for illustration.

For DC analysis we can replace coupling capacitors by open circuits and we can also replace the resistor
RG by a short circuit equivalent.:. IG = 0.The relation between ID and VGS is given by

Id=Idss[1- ]2

VGS for N channel JFET is =-id Rs

Substuting this value in the above equation

Id=Idss[1- ]2

Id=Idss[1+ ]2

For the N-chanel FET in the above figure

 Is produces a voltage drop across Rs and makes the source positive w.r.t ground in any JFET circuit
all the source current passes through the device to drain circuit this is due to the fact that there is no
significant gate current. Therefore we can define source current as Is=Id and Vg=0 then

Vs= Is Rs =IdRs

Vgs=Vg-Vs=0-IdRs=-IdRs

Drawing the self bias line:-

Typical transfer characteristics for a self biased JFET are shown in the fig.

The maximum drain current is 5mA and the gate source cut off voltage is -3V. This means the gate
voltage has to be between 0 and -3V.

Now using the equation VGS = -IDRS and assuming RS of any suitable value we can draw the self bias
line.

Let us assume RS = 500Ω

With this Rs , we can plot two points corresponding to ID = 0 and Id = IDSS

for ID = 0

VGS = -ID RS

VGS = 0X (500.Ω) = 0V

So the first point is (0 ,0)

( Id, VGS)
 For ID= IDSS=5mA

VGS = (-5mA) (500 Ω) = -3V

So the 2nd Point will be (5mA,-3V)

By plotting these two points, we can draw the straight line through the points. This line will
intersect the transconductance curve and it is known as self bias line.The intersection point gives the
operating point of the self bias JFET for the circuit.

At Q point , the ID is slightly > than 2mA and VGS is slightly > -1V. The Q point for the self bias
JFET depends on the value of Rs.If Rs is large, Q point far down on the transconductance curve ,ID is
small, when Rs is small Q point is far up on the curve , ID is large.

5.9.2 VOLTAGE DIVIDER BIAS:-

The fig. shows N channel JFET with voltage divider bias. The voltage at the source of JFET must
be more positive than the voltage at the gate in order to keep the gate to source junction reverse
biased. The source voltage is

VS = IDRS

The gate voltage is set by resistors R1 and R2 as expressed by the following equation using the
voltage divider formula.

Vg= Vdd

For dc analysis
 Applying KVL to the input circuit

VG-VGS-VS =0

:: VGS = VG-Vs=VG-ISRS

VGS = VG-IDRS :: IS = ID

Applying KVL to the input circuit we get

VDS+IDRD+VS-VDD =0

::VDS = VDD-IDRD-IDRS

VDS = VDD-ID ( RD +RS )

The Q point of a JFET amplifier , using the voltage divider bias is

IDQ = IDSS [1-VGS/VP]2

VDSQ = VDD-ID ( RD+RS )

COMPARISON OF MOSFET WITH JFET

a. In enhancement and depletion types of MOSFET, the transverse electric field induced
across an insulating layer deposited on the semiconductor material controls the
conductivity of the channel.

b. In the JFET the transverse electric field across the reverse biased PN junction controls the
conductivity of the channel.
 c. The gate leakage current in a MOSFET is of the order of 10-12A. Hence the input resistance
of a MOSFET is very high in the order of 1010 to 1015 Ω. The gate leakage current of a JFET
is of the order of 10-9A., and its input resistance is of the order of 108Ω.

d. The output characteristics of the JFET are flatter than those of the MOSFET, and hence the
drain resistance of a JFET (0.1 to 1MΩ) is much higher than that of a MOSFET (1 to 50kΩ).

e. JFETs are operated only in the depletion mode. The depletion type MOSFET may be
operated in both depletion and enhancement mode.

f. Comparing to JFET, MOSFETs are easier to fabricate.

g. Special digital CMOS circuits are available which involve near zero power dissipation and
very low voltage and current requirements. This makes them suitable for portable
systems.

FET AMPLIFIERS
5.10 INTRODUCTION
Field Effect Transistor (FET) amplifiers provide an excellent voltage gain and high input
impedence. Because of high input impedence and other characteristics of JFETs they are preferred over
BJTs for certain types of applications.

There are 3 basic FET circuit configurations:

i)Common Source
ii)Common Drain
iii)Common Gain
Similar to BJT CE,CC and CB circuits, only difference is in BJT large output collector current is
controlled by small input base current whereas FET controls output current by means of small input
voltage. In both the cases output current is controlled variable.
FET amplifier circuits use voltage controlled nature of the JFET. In Pinch off region, ID depends
only on VGS.
5.11 Common Source (CS) Amplifier

Fig. 5.1 (a) CS Amplifier (b) Small-signal equivalent circuit

A simple Common Source amplifier is shown in Fig. 5.1(a) and associated small signal equivalent circuit
using voltage-source model of FET is shown in Fig. 5.1(b)

Voltage Gain
Source resistance (RS) is used to set the Q-Point but is bypassed by CS for mid-frequency operation.
From the small signal equivalent circuit ,the output voltage
VO = -RDµVgs(RD + rd)
Where Vgs = Vi , the input voltage,
Hence, the voltage gain,
AV = VO / Vi = -RDµ(RD + rd)
Input Impedence
From Fig. 5.1(b) Input Impedence is
Zi = RG
For voltage divider bias as in CE Amplifiers of BJT
RG = R1 ║ R2
Output Impedance
Output impedance is the impedance measured at the output terminals with the input voltage V I = 0
From the Fig. 5.1(b) when the input voltage Vi = 0, Vgs = 0 and hence
µ Vgs = 0
The equivalent circuit for calculating output impedence is given in Fig. 5.2.
Output impedence Zo = rd ║ RD
Normally rd will be far greater than RD . Hence Zo ≈ RD

5.12 Common Drain Amplifier

A simple common drain amplifier is shown in Fig. 5.2(a) and associated small signal equivalent circuit
using the voltage source model of FET is shown in Fig. 5.2(b).Since voltage Vgd is more easily
determined than Vgs, the voltage source in the output circuit is expressed in terms of V gs and Thevenin’s
theorem.

Fig. 5.2 (a)CD Amplifier (b)Small-signal equivalent circuit

Voltage Gain
The output voltage,
VO = RSµVgd / (µ + 1) RS + rd
Where Vgd = Vi the input voltage.
Hence, the voltage gain,
Av = VO / Vi = RSµ / (µ + 1) RS + rd
Input Impedence
From Fig. 5.2(b), Input Impedence Zi = RG
Output Impedence
From Fig. 5.2(b), Output impedence measured at the output terminals with input voltage V i = 0 can be
calculated from the following equivalent circuit.
As Vi = 0: Vgd = 0: µvgd / (µ + 1) = 0
Output Impedence
 ZO = rd / (µ + 1) ║RS
When µ » 1
ZO = ( rd / µ) ║RS = (1/gm) ║RS

5.13 BIASING FET

For the proper functioning of a linear FET amplifier, it is necessary to maintain the
operating point Q stable in the central portion of the pinch off region The Q point should be
independent of device parameter variations and ambient temperature variations

This can be achieved by suitably selecting the gate to source voltage VGS and drain current ID which is
referred to as biasing

JFET biasing circuits are very similar to BJT biasing circuitsThe main difference between JFET
circuits and BJT circuits is the operation of the active components themselves

There are mainly two types of Biasing circuits

1. Self bias
2. Voltage divider bias.

5.13.1. SELF BIAS:-

Self bias is a JFET biasing circuit that uses a source resistor to help reverse bias the JFET gate.

A self bias circuit is shown in the fig 5.3

 Self bias is the most common type of JFET bias. This JFET must be operated such that gate
source junction is always reverse biased. This condition requires a negative VGS for an N channel JFET
and a positive VGS for P channel JFET. This can be achieved using the self bias arrangement as shown in
Fig 5.3. The gate resistor RG doesn’t affect the bias because it has essentially no voltage drop across it,
and : the gate remains at 0V .RG is necessary only to isolate an ac signal from ground in amplifier
applications. The voltage drop across resistor RS makes gate source junction reverse biased.

DC analysis of self Bias:-

In the following DC analysis , the N channel J FET shown in the fig5.4. is used for illustration.

For DC analysis we can replace coupling capacitors by open circuits and we can also replace the
resistor RG by a short circuit equivalent.

:. IG = 0

The relation between ID and VGS is given by

Id=Idss[1- ]2

VGS for N channel JFET is =-id Rs

Substuting this value in the above equation

Id=Idss[1- ]2

Id=Idss[1+ ]2
For the N-chanel FET in the above figure

Is produces a voltage drop across Rs and makes the source positive w.r.t ground

in any JFET circuit all the source current passes through the device to drain circuit this is due to the fact
that there is no significant gate current

therefore we can define source current as Is=Id and Vg=0 then

Vs= Is Rs =IdRs

Vgs=Vg-Vs=0-IdRs=-IdRs

Drawing the self bias line:-

Typical transfer characteristics for a self biased JFET are shown in the fig5.5.

The maximum drain current is 6mA and the gate source cut off voltage is -3V. This means the gate
voltage has to be between 0 and -3V.

Now using the equation VGS = -IDRS and assuming RS of any suitable value we can draw the self bias
line.

Let us assume RS = 500Ω

With this Rs , we can plot two points corresponding to ID = 0 and Id = IDSS

for ID = 0

VGS = -ID RS

VGS = 0X (500.Ω) = 0V
 So the first point is (0 ,0)

( Id, VGS)

For ID= IDSS=6mA

VGS = (-6mA) (500 Ω) = -3V

So the 2nd Point will be (6mA,-3V)

By plotting these two points, we can draw the straight line through the points. This line will
intersect the transconductance curve and it is known as self bias line. The intersection point gives the
operating point of the self bias JFET for the circuit.

At Q point , the ID is slightly > than 2mA and VGS is slightly > -1V. The Q point for the self bias
JFET depends on the value of Rs.If Rs is large, Q point far down on the transconductance curve ,ID is
small, when Rs is small Q point is far up on the curve , ID is large.

5.13.2 VOLTAGE DIVIDER BIAS:-

The fig5.6 shows N channel JFET with voltage divider bias. The voltage at the source of JFET
must be more positive than the voltage at the gate in order to keep the gate to source junction reverse
biased. The source voltage is

VS = IDRS

The gate voltage is set by resistors R1 and R2 as expressed by the following equation using the
voltage divider formula.

Vg= Vdd
 For dc analysis fig 5.5

Applying KVL to the input circuit

VG-VGS-VS =0

:: VGS = VG-Vs=VG-ISRS

VGS = VG-IDRS :: IS = ID

Applying KVL to the input circuit we get

VDS+IDRD+VS-VDD =0

::VDS = VDD-IDRD-IDRS

VDS = VDD-ID ( RD +RS )

The Q point of a JFET amplifier , using the voltage divider bias is

IDQ = IDSS [1-VGS/VP]2

VDSQ = VDD-ID ( RD+RS )

5.14 JFET AS A VVR OR VDR

Let us consider the drain characteristics of FET as shown in the fig.
 In this characteristics we can see that in the region before pinch off voltage, drain
characteristics are linear, i.e. FET operation is linear. In this region the FET is useful as a voltage
controlled resistor,i.e. the drain to source resistance is controlled by the bias voltage VGS.( In this
region only FET behaves like an ordinary resistor This resistances can be varied by VGS ) .The operation
of FET in the region is useful in most linear applications of FET.In such an application the FET is also
referred to as a voltage variable resistor (VVR) or voltage dependent resistor (VDR).

The drain to source conductance ( rd )

gd= for small values of VDS which may also be expressed as

gd=gd0(1- )1/2)

Where gd0 is the value of drain conductance

When the variation of the rd with VGS can be closely approximated by the expression

rd= ) Where ro = drain resistance at zero gate bias.K = a constant, dependent upon FET
type.

5.14.1 APPLICATION OF VVR

The VVR property of FET can be used to vary the voltage gain of a multistage amplifier A, as the
signal level is increased. This action is called AGC automatic gain control. A typical arrangement is
shown in the fig.
 Here maximum value of signal is taken rectified; filter to produce a DC voltage proportional to
the output signal level. This voltage is applied to the gate of JFET, this causing the resistance between
drain and source to change. As this resistance is connected across RE, so effective RE also changes
according to change in the drain to source resistance. When output signal level increases, the drain to
source resistance rd increases, increasing effective RE. Increase in RE causes the gain of transistor Q1
to decrease, reducing the output signal. Exactly reverse process takes place when output signal level
decreased.

:: The output signal level is maintained constant. It is to be noted that the DC bias conditions of
Q1 are not affected by JFET since FET is isolated from Q1 by capacitor C2