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Chapter 6-Arithmetic Circuit

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14 views32 pages

Chapter 6-Arithmetic Circuit

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dynzhaa
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ITT270 Digital Electronics

Chapter 6
Arithmetic Circuit
Outline

❑ Addition of Binary Numbers


❑ Half Adder and Full Adder Circuit
❑ Two’s Complement System
❑ Two’s Complement Arithmetic System
❑ Subtraction Circuit
❑ Addition and Subtraction Circuit
Binary Addition
• Performed in the same way as decimal addition
except that the values of individual digits can
only be 0 or 1.
• The addition of a one-bit number has 4 possible
combinations as shown below.
…Binary Addition
• When adding a larger numbers that has multiple
bits, it is still necessary to add each pair of bits
with a carry-in Cin. For example, A=1101 (13)
and B=0110 (6).
Half Adder & Full Adder Circuit
• Adding 2 bits; A + B and generating 2 outputs;
S and Co is known as a half adder operation.

• The half adder truth table and circuit are


shown below.
…Half Adder & Full Adder Circuit
• Adding 3 bits A + B + Cin and generating
S and Cout, is known as a full adder
operation.
…Half Adder & Full Adder Circuit
• The full adder truth table and circuit are shown
below.
…Half Adder & Full Adder Circuit
Parallel Adder Circuit
• To construct a 4 bit parallel adder, a single half
adder and three full adder circuits are used.
• The top half adder adds A1 + B1 and generates
S1 and Co.
• Note that the carry out Co is connected to the
Cin of the next adder.
…Parallel Adder Circuit
…Parallel Adder Circuit
• 7483 is a commercial 4-bit full adder. It has four
full adders connected as shown below. To
perform a 4 bit addition, the Cin is connected to
GND (0).
…Parallel Adder Circuit
• An 8-bit parallel adder is constructed using two
7483 ICs. The Cout of the first IC is connected to
the Cin of the preceding IC.
Signed Numbers
• A binary number can be represented as either
a positive or a negative value.
• The common representation of signed
numbers is either in the form of
sign-magnitude or in the form of 2’s
complement.
• In a sign-magnitude system, a number
consists of two parts, the magnitude and the
sign. A sign bit = 0 signifies a positive
number and a sign bit = 1 signifies a
negative number.
…Signed Numbers
• The sign-magnitude representation is not
commonly used in practice for representing
integer numbers. It requires arithmetic circuit that
are most costly and slower computation time.
Two’s Complement Number
• Invented to make addition and subtraction faster
and easier, by omitting sign and magnitude
comparison.
• A negative number in 2’s complement is obtained
from a positive 2’s complement number by
complementing each bit including the sign bit
and then adding 1 to it. The carry that occurs out
of the MSB is discarded.
Example
1. What is the 2’s complement number for +22 and
-22?
2. Show how an 8-bit computer would represent a
2’s complement number for +22 and -22.
3. Determine the decimal value for the following 2’s
complement number:
a. 00100010 b. 10100010 c. 11111111
4.Determine the range of integers that can be
represented in a 2’s complement number system
having n bits:
a. n= 8 bit b. n=16 bit c. n= 32 bit
Two’s Complement Arithmetic

• Case 1: A+B Two positive numbers.


• Case 2: -A-B Two negative numbers.
• Case 3: A-B
• Case 4: -A+B
Case 1: A+B (Two Positive
Numbers)
• Since both A and B are positive, the result will
also be positive. So, there is no need to use the
2’s complement.
• Example:
• 2+4
• 9+4
• 6+3
• 12 + 7
Overflow
• There are cases when an operation produces a result
that exceeds the range of the number system,
producing a condition known as overflow.
• When we add two numbers with the same sign, which
produce a sum that is larger than the largest
representable number, we can obtain an incorrect
result.
• As a rule, overflow occurs whenever the sign of the
sum is different from the signs of both addends.
• So the sum of requires more than the allotted bits to
represent it.
Example

• Compute 6+3 using 5 bits.


• Compute 12+7 using 6 bits.
Case 2: -A-B Two Negative
Numbers
• Both –A and –B will be represented using 2’s
complement and the computation will be
performed as (-A) + (-B).
• Example:
• -3 – 2
• -12 - 5
Case 3: A-B

• The positive number A is unchanged,


however B is represented in 2’s
complement form.
• Example:
•3–2
• 12 – 5
• 5 – 12
Case 4: -A+B

• Example: -3 + 2
Subtractor Circuit
• The 4-bit parallel adder can be modified
slightly to form a subtractor circuit.
• Subtraction A-B in the 2’s complement
number system is performed as
• The 2’s complement for B is obtained by
complementing each bit and then adding 1
to the LSB.
4-bit subtractor circuit

• The 2’s complement is


formed using the inverters
on the B input and adding
Cin = 1 to the LSB.
• The MSB (A4, B4 and S4)
is used for the sign bit and
the C4 output is not used.
...4-bit subtractor circuit
• 4-bit subtractor circuit using a 7483 adder and
NOT gates
• This circuit can only accept values between
-8 (1001) and +7 (0111), and the result is also
limited to values between -8 to +7. Some
arithmetic operation can result in an overflow
condition if the output result is beyond the range
of valid numbers.
Example
8-bit subtractor circuit
• 8-bit subtractor circuit is constructed by connecting
two 4-bit subtractor circuit.
• The output of C4 is connected to the Cin of the
preceding subtractor. This circuit can compute
values between -128 to +127.
• This circuit can accept values between -128
(10000001) and +127 (01111111), and the result is
also limited to values between -128 to +127.
Example
Adder-Subtractor Circuit
• The adder circuit and the
subtractor circuit are almost
identical.
• These circuits can be combined to
form an adder-subtractor circuit.
• The circuit has an additional
input called the control input.
• If the control input is 0, the circuit
performs an addition, A + B + 0,
where Cin=0.
• If the control input is 1, the circuit
performs a subtraction A+B+1,
where Cin=1.
...Adder-Subtractor Circuit
4 bit adder-subtractor
• When the control input is 1, the
input Cin=1 and the XOR gate
will act as inverter to perform
subtraction.
• When the control input is 0, the
input Cin=0 and the XOR gate
has no effect on B.

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