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13-Using Timer in LPC2148

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0% found this document useful (0 votes)
10 views

13-Using Timer in LPC2148

All

Uploaded by

deepakshakyajnv6
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Timer

Crystal Input
Clock in LPC2148
CPU
Oscillator PLL

GPIO
Timer
VPB DIV
UART
ADC
DAC
I2C
SPI
Crystal Input Clock in LPC2148

Oscillator PLL CPU

Prescalar 1KHz Timer Counter


VPB DIV Register
(TC)
(PR) TClk

PR = (Frequency of Pclk) / (Frequency of Tck)


CTCR : Count Control register
• Used to select Timer/Counter Mode.
• For Timing purpose we use this in Timer Mode.
• When the value of the CTCR is set to 0×0 Timer Mode
is selected.
Prescalar Register (PR)
• PR : Prescale Register (32 bit) – Divides the Input
frequency to a desired value

PR
Pclk Tclk

PR = (Frequency of Pclk) / (Frequency of Tck)


TCR : Timer Control Register
• This register is used to enable , disable and reset TC.
• When bit0 is 1 timer is enabled and when 0 it is
disabled.
• When bit1 is set to 1 TC and PC are set to zero
together in sync on the next positive edge of PCLK.
• Rest of the bits of TCR are reserved.
TC : Timer Counter Register (32 bit)
• This is the main counting register.
• Timer Counter increments when PC reaches its maximum
value as specified by PR.
• If timer is not reset explicitly(directly) or by using an interrupt
then it will act as a free running counter which resets back to
zero when it reaches its maximum value which is 0xFFFFFFFF.

Total Counts = 429,49,67,296


Setting up & configuring Timers
• Set appropriate value in TxCTCR (Count Control Register ➔ Set as
Timer )
• Define the Prescale value in TxPR (Prescale Register)
• Reset Timer – Which resets PR and TC
• Set TxTCR to 0×01 to Enable the Timer when required (Timer Control
Register)
• Reset TxTCR to 0×00 to Disable the Timer when required (Timer
Control Register)
Initialize Timer

T0CTCR = 0x00;
T0PR = PRESCALE-1;
T0TCR = 0x02; //Reset Timer
Prescale (TxPR) Related Calculations:
For 1 ms Tick

Tclk = 1KHz
Pclk = 60 MHz
PR TC

PR+1 = 60MHz/1KHz
= 60,000
PR = 59999
For 1 us Tick
Tclk = 1MHz
Pclk = 60 MHz
PR TC0

PR+1 = 60MHz/1MHz
= 60
PR = 59
TIMER.h
• void initPLL(void);
• void delayms(int milliseconds);
• void delayus(int microseconds);
initPLL()
void initPLL(void)
{
// To generate 60MHz from 12MHz crystal
PLL0CFG=0X24; // SET PSEL=2 AND MSEL=5
PLL0CON=0X01; //PLL IS ACTIVE BUT NOT YET CONNECT
PLL0FEED=0XAA; //FEED SEQUENCE
PLL0FEED=0X55;
while((PLL0STAT & 0X400)==0);
//WAIT FOR FEED SEQUENCE TO BE INSERTED
PLL0CON=0X03; // PLL HAS BEEN ACTIVE AND BEING CONNECTRD
PLL0FEED=0XAA; //FEED SEQUENCE
PLL0FEED=0X55; //FEED SEQUENCE

VPBDIV=0X01; // SET PCLK SAME AS FCCLK

}
delayms(unsigned int milliseconds)
void delayms(unsigned int milliseconds)
{
//Using Timer0
T0CTCR = 0x00 ; // configure T0 as Timer
T0PR = 60000-1 ;
T0TC = 0; //Reset Timer
T0TCR = 0x01; //Enable timer
while(T0TC < milliseconds);
//wait until timer counter reaches the desired delay
T0TCR = 0x00; //Disable timer
}
delayus(unsigned int microseconds)
• void delayus(unsigned int microseconds)
{
//Using Timer0
T0CTCR = 0x00 ; // configure T0 as Timer
T0PR = 60-1 ;
T0TC = 0; //Reset Timer
T0TCR = 0x01; //Enable timer
while(T0TC < microseconds);
//wait until timer counter reaches the desired delay
T0TCR = 0x00; //Disable timer
}
Example Problems
Toggle Pin @ P0.15, Ton = 1Sec, Toff=0.5Sec
#include<LPC214x.h>
C1

1
33pF U1

#include "GPIO.h" X1 62 19
XTAL1 P0.0/TxD0/PWM1
61 21
C2 XTAL2 P0.1/RxD0/PWM3/EINT0
22
P0.2/SCL0/CAP0.0

2
3 26
RTXC1 P0.3/SDA0/MAT0..0/EINT1

#include "TIMER.h"
5 27
RTXC2 P0.4/SCK0/CAP0.1/AD0.6
33pF 29
P0.5/MISO0/MAT0.1/AD0.7
57 30
C3 RST P0.6/MOSI0/CAP0.2/AD1.0
31
P0.7/SSEL0/PWM2/EINT2

int main()
33
P0.8/TxD1/PWM4/AD1.1
34

1
P0.9/RxD1/PWM6/EINT3
22pF 35
P0.10/RTS1/CAP1.0/AD1.2
X2 P0.11/CTS1/CAP1.1/SCL1
37

{
38
C4 P0.12/DSR1/MAT1.0/AD1.3
39
P0.13/DTR1/MAT1.1/AD1.4 D2

2
41
P0.14/DCD1/EINT1/SDA1
45
P0.15/RI1/EINT2/AD1.5
22pF

while(1) +3.3V P0.16/EINT0/MAT0.2/CAP0.2


P0.17/CAP1.2/SCK1/MAT1.2
P0.18/CAP1.3/MISO1/MAT1.3
46
47
53
54
LED-YELLOW

{
P0.19/MAT1.2/MOSI1/CAP1.2
55
P0.20/MAT1.3/SSEL1/EINT3
1
P0.21/PWM5/AD1.6/CAP1.3
R1 P0.22/AD1.7/CAP0.0/MAT0.0
2
1K 58
P0.23

digitalWrite(15,1); P0.25/AD0.4/AOUT
P0.26/AD0.5
P0.27/AD0.0/CAP0.1/MAT0.1
9
10
11

delayms(1000);
13
P0.28/AD0.1/CAP0.2/MAT0.2
C5 P0.29/AD0.2/CAP0.3/MAT0.3
14
100pF 15
P0.30/AD0.3/EINT3/CAP0.0
17
+3.3V P0.31

digitalWrite (15,0); 49
VBAT
P1.16/TRACEPKT0
P1.17/TRACEPKT1
P1.18/TRACEPKT2
16
12
8
4

delayms(500);
P1.19/TRACEPKT3
63 48
VREF P1.20/TRACESYNC
7 44
V3A P1.21/PIPESTAT0
51 40
V3 P1.22/PIPESTAT1
43 36
V3 P1.23/PIPESTAT2
23 32
V3 P1.24/TRACECLK
28
P1.25/EXTIN0
59 24
VSSA P1.26/RTCK
50 64

}
VSS P1.27/TDO
42 60
VSS P1.28/TDI
25 56
VSS P1.29/TCK
18 52
VSS P1.30/TMS
6 20
VSS P1.31/TRST

} LPC2138
Generate a Square Wave at 1KHz
C1

#include<LPC214x.h>

1
33pF U1
X1 62
XTAL1 P0.0/TxD0/PWM1
19
61 21
C2 XTAL2 P0.1/RxD0/PWM3/EINT0
22

#include "GPIO.h"
P0.2/SCL0/CAP0.0

2
3 26
RTXC1 P0.3/SDA0/MAT0..0/EINT1
5 27
RTXC2 P0.4/SCK0/CAP0.1/AD0.6
33pF 29
P0.5/MISO0/MAT0.1/AD0.7
57 30

#include "TIMER.h" C3 RST P0.6/MOSI0/CAP0.2/AD1.0


31
P0.7/SSEL0/PWM2/EINT2
33
P0.8/TxD1/PWM4/AD1.1
34

1
P0.9/RxD1/PWM6/EINT3
22pF 35

int main()
P0.10/RTS1/CAP1.0/AD1.2
X2 P0.11/CTS1/CAP1.1/SCL1
37
38
C4 P0.12/DSR1/MAT1.0/AD1.3
39
P0.13/DTR1/MAT1.1/AD1.4

2
41

{
P0.14/DCD1/EINT1/SDA1
45
P0.15/RI1/EINT2/AD1.5 A
22pF
46
+3.3V P0.16/EINT0/MAT0.2/CAP0.2 B
47

initPLL();
P0.17/CAP1.2/SCK1/MAT1.2
53
P0.18/CAP1.3/MISO1/MAT1.3 C
54
P0.19/MAT1.2/MOSI1/CAP1.2
55
P0.20/MAT1.3/SSEL1/EINT3 D
1

while(1)
P0.21/PWM5/AD1.6/CAP1.3
R1 P0.22/AD1.7/CAP0.0/MAT0.0
2
1K 58
P0.23
9

{
P0.25/AD0.4/AOUT
10
P0.26/AD0.5
11
P0.27/AD0.0/CAP0.1/MAT0.1
13
P0.28/AD0.1/CAP0.2/MAT0.2
C5 14

digitalWrite(15,1);
P0.29/AD0.2/CAP0.3/MAT0.3
100pF 15
P0.30/AD0.3/EINT3/CAP0.0
17
+3.3V P0.31
16

delayus(500);
P1.16/TRACEPKT0
12
P1.17/TRACEPKT1
49 8
VBAT P1.18/TRACEPKT2
4
P1.19/TRACEPKT3
63 48

digitalWrite (15,0);
VREF P1.20/TRACESYNC
7 44
V3A P1.21/PIPESTAT0
51 40
V3 P1.22/PIPESTAT1
43 36
V3 P1.23/PIPESTAT2
23 32

delayus(500);
V3 P1.24/TRACECLK
28
P1.25/EXTIN0
59 24
VSSA P1.26/RTCK
50 64
VSS P1.27/TDO
42 60
VSS P1.28/TDI
25 56
VSS P1.29/TCK
18 52
VSS P1.30/TMS
6 20
VSS P1.31/TRST

} LPC2138

}
End of Session
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