2022 Syllabus
2022 Syllabus
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Module-3 Fourier series.
Periodic functions, Dirchlet’s condition, conditions for a Fourier series expansion, Fourier series
of functions with period 2𝜋 and with arbitrary period. Half rang Fourier series. Practical
harmonic analysis.
Application to variation of periodic current.
Self-study: Typical waveforms, complex form of Fourier series
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Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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5. Gupta C.B, Sing S.R and Mukesh Kumar: “Engineering Mathematic for Semester I and
II”, Mc-Graw Hill Education(India) Pvt. Ltd 2015.
6. H.K. Dass and Er. Rajnish Verma: “Higher Engineering Mathematics” S.Chand
Publication, 3rd Ed.,2014.
7. James Stewart: “Calculus” Cengage Publications, 7thEd., 2019.
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Electric Circuit Analysis
IPCC Course Code BEE302 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory +10 hrs (Lab) Total Marks 100
Credits 4 Credits Exam Hours 3 hrs
Course objectives:
• To familiarize the basic laws, source transformations, theorems and the methods of analyzing
electrical circuits.
• To explain the use of network theorems and the concept of resonance.
• To familiarize the analysis of three-phase circuits, two port networks and networks with non-
sinusoidal inputs.
• To explain the importance of initial conditions, their evaluation and transient analysis of R-L and R-C
circuits.
• To impart basic knowledge on network analysis using Laplace transforms.
Teaching-Learning Process (General Instructions)
These are sample Strategies; which teachers can use to accelerate the attainment of the various course outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective
teaching methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical
thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinking skills such as the ability to design, evaluate, generalize, and analyse information rather
than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
MODULE-1
Basic Concepts: Active and passive elements, Concept of ideal and practical
sources. star – delta transformation.
Analysis of networks by (i) Network reduction method including, (ii) Mesh and Node voltage methods
for ac and DC circuits with independent and dependent sources. Concept of Super-Mesh and Super node
analysis, Duality.
Teaching-Learning Process Chalk and Board, Problem based learning.
MODULE-2
Network Theorems: Super Position theorem, Thevenin’s theorem, Norton’s theorem, and
Maximum power transfer theorem. ( Problems with independent AC and DC sources only).
Teaching-Learning Process Chalk and Board, Problem based learning.
MODULE-3
Resonant Circuits: Analysis of simple series RLC and parallel RLC circuits under
resonances.
Problems on Resonant frequency, Bandwidth and Quality factor at resonance
Transient Analysis: Behavior of circuit elements under switching action, Evaluation of initial
conditions.
Transient analysis o f RL and RC circuits under DC excitations.
Teaching-Learning Process Chalk and Board, Problem based learning.
MODULE-4
Laplace Transformation: Laplace transformation (LT), Initial and Final value theorems. Solution of
electrical circuits using LT.
Teaching-Learning Process Chalk and Board, Problem based learning.
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MODULE 5
Unbalanced Three Phase Systems: Analysis of three phase systems ( 3-wire and 4 wire systems ),
calculation of real and reactive Powers.
Two Port networks: Definition, Open circuit impedance, Short circuit admittance and
Transmission parameters and their evaluation for simple circuits.
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• On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
• The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks
of all experiments’ write-ups are added and scaled down to 15 marks.
• The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
• Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
• The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion
will have a CIE component only. Questions mentioned in the SEE paper may include
questions from the practical component.
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Analog Electronic Circuits
Course Code BEE303 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
To provide the knowledge for the analysis of transistor biasing and thermal stability circuits.
To develop skills to design the electronic circuits like amplifiers, power amplifiers and oscillators.
To understand the importance of FET and MOSFET and FET/MOSFET amplifiers
MODULE-1
Diode Circuits: Diode clipping and clamping circuits.
Transistor Biasing and Stabilization:
The operating point, load line analysis, DC analysis and design of fixed bias circuit, emitter stabilized
bias circuit, collector to base bias circuit, voltage divider bias circuit, modified DC bias with voltage
feedback.
Bias stabilization and stability factors for fixed bias circuit, collector to base bias circuit and voltage
divider bias circuit, bias compensation, Transistor switching circuits.
MODULE-2
Transistor at Low Frequencies:
Hybrid model, h-parameters for CE, CC and CB modes, mid-band analysis of single stage amplifier,
simplified hybrid model, analysis for CE, CB and CC(emitter voltage follower circuit) modes, Millers
Theorem and its dual, analysis for collector to base bias circuit and CE with un bypassed emitter
resistance.
Transistor frequency response:
General frequency considerations, effect of various capacitors on frequency response, Miller effect
capacitance, high frequency response, hybrid - pi model, CE short circuit current gain using hybrid pi
model, multistage frequency effects.
MODULE-3
Multistage amplifiers:
Cascade connection , analysis for CE-CC mode, CE-CE mode, CASCODE stage-unbypassed and bypassed
emitter resistance modes, Darlington connection using h-parameter model.
Feedback Amplifiers:
Classification of feedback amplifiers, concept of feedback, general characteristics of negative feedback
amplifiers, Input and output resistance with feedback of various feedback amplifiers, analysis of
different practical feedback amplifier circuits.
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MODULE-4
Power Amplifiers:
Classification of power amplifiers, Analysis of class A, Class B, class C and Class AB amplifiers, Distortion
in power amplifiers, second harmonic distortion, harmonic distortion in Class B amplifiers, cross over
distortion and elimination of cross over distortion.
Oscillators:
Concept of positive feedback, frequency of oscillation for RC phase oscillator, Wien Bridge oscillator,
Tuned oscillator circuits, Hartley oscillator, Colpitt’s oscillator , crystal oscillator and its types.
MODULE-5
FETs:
Construction, working and characteristics of JFET and MOSFET( enhance and Depletion type)
Biasing of JFET and MOSFET. Fixed bias configuration, self bias configuration, voltage divider biasing.
Analysis and design of JFET (only common source configuration with fixed bias) and MOSFET
amplifiers.
2 Design, simulation and Testing of Full wave – centre tapped transformer type and Bridge type
rectifier circuits with and without Capacitor filter. Determination of ripple factor, regulation
and efficiency.
3
Static Transistor characteristics for CE, CB and CC modes and determination of h parameters.
4 Frequency response of single stage BJT and FET RC coupled amplifier and determination of
half power points, bandwidth, input and output impedances.
5
Design and testing of BJT -RC phase shift oscillator for given frequency of oscillation.
6 Design, simulation (MATLAB) and testing of Wien bridge oscillator for given frequency of
oscillation
7
Design and testing of Hartley and Colpitt’s oscillator for given frequency of oscillation
8 Determination of gain, input and output impedance of BJT Darlington emitter follower with
and without bootstrapping.
9 Design and testing of Class A and Class B power amplifier and to determine conversion
efficiency.
10 Design and simulation of Full wave – centre tapped transformer type and Bridge type rectifier
circuits with and without Capacitor filter using MATLAB. Determination of ripple factor,
regulation and efficiency.
Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
1. Utilize the characteristics of transistor for different applications.
2. Design and analyze biasing circuits for transistor.
3. Design, analyze and test transistor circuitry as amplifiers and oscillators
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
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(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
CIE for the theory component of the IPCC (maximum marks 50)
IPCC means practical portion integrated with the theory of the course.
CIE marks for the theory component are 25 marks and that for the practical component is 25
marks.
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two
Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the
theory component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks
for the test to be conducted after the completion of all the laboratory sessions.
On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of
all experiments’ write-ups are added and scaled down to 15 marks.
The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scoredby the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will
have a CIE component only. Questions mentioned in the SEE paper may include questions from
the practical component.
Suggested Learning Resources:
Text Books
1. Electronic Devices and Circuit Theory, Robert L Boylestad Louis Nashelsky, Pearson, 11th Edition, 2015
2. Electronic Devices and Circuits, Millman and Halkias, Mc Graw Hill, 4 th Edition, 2015
3. Electronic Devices and Circuits, David A Bell, Oxford University Press, 5th Edition, 2008
Reference Books
1. Microelectronics CircuitsAnalysis and Design, Muhammad Rashid, Cengage Learning, 2nd Edition, 2014
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2. A Text Book of Electrical Technology, Electronic Devices and Circuits, B.L. Theraja, A.K. Theraja, S. Chand,
Reprint, 2013
3. Electronic Devices and Circuits, Anil K. Maini, ,VashaAgarval, Wiley, 1st Edition, 2009
4. Electronic Devices and Circuits, S. Salivahanan, Suresh, Mc Graw Hill, 3rd Edition, 2013
5. Fundamentals of Analog Circuits, Thomas L Floyd, Pearson, 2nd Edition, 2012
Web links and Video Lectures (e-Resources):
www.nptel.ac.in
https://www.ti.com/design-resources/design-tools-simulation/analog-circuits/overview.html
https://www.analog.com/en/education/education-library/tutorials/analog-electronics.html
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Transformers and Generators
Course Code BEE304 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
To understand the construction, working and various tests of single phase Transformer.
To understand the construction, working and parallel operation of three phase Transformer.
To understand the construction, working and analysis of Synchronous Generator.
To understand the construction, working of solar and wind power generators .
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Module-4
Synchronous Generators (Salient Pole): Effects of saliency, two-reaction theory, Parallel
operation of generators and load sharing. Methods of Synchronization, Synchronizing power.
Performance of Synchronous Generators: Power angle characteristic (salient and non salient
pole), power angle diagram, reluctance power, Capability curve for large turbo generators. Hunting
and damper windings. Numerical.
Module-5
Wind power Generator –Basic components of wind energy conversion system, types of wind
generators- Horizontal and vertical axis. Advantages and disadvantages of WECS.
Solar power generator - principle of solar cell, Basic Solar Photo voltaic, system for power
generation, Advantages and disadvantages.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the construction, working and various tests of single phase Transformer.
2. Explain the construction, working and parallel operation of three phase Transformer.
3. Explain the construction, working and analysis of Synchronous Generator.
4. Explain the construction, working of solar and wind power generators.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
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Reference Books
1. Electric Machines, Mulukuntla S. Sarma, at el, Cengage, 1st Edition, 2009.
2. Electrical Machines, Drives and Power systems, Theodore Wildi, Pearson, 6th Edition, 2014.
3. Principals of Electrical Machines, V.K Mehta, Rohit Mehta, S Chand, 2nd edition, 2009
Web links and Video Lectures (e-Resources):
www.nptel.ac.in
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Template for Practical Course and if AEC is a practical Course
Sl.NO Experiments
Open Circuit and Short circuit tests on single phase step up or step down transformer and
1
pre- determination of (i) Efficiency and regulation (ii) Calculation of parameters for equivalent circuit.
Sumpner’s test on similar transformers and determination of combined and individual transformer
2
efficiency.
3 Parallel operation of two dissimilar single-phase transformers of different kVA and determination of load.
Polarity test and connection of 3 single-phase transformers in star – delta and determination of efficiency
4
and regulation under balanced resistive load.
Comparison of performance of 3 single-phase transformers in delta – delta and V – V (open delta)
5
connection under load.
6 Separation of hysteresis and eddy current losses in single phase transformer.
Investigate the voltage and current ratios of a multi-tapped transformer and verify the ideal transformer
7
ratio.
8 Voltage regulation of an alternator by EMF and MMF methods.
9 Power angle curve of synchronous generator or Direct load test on three phase synchronous generator to
determine efficiency and regulation.
10 Performance of synchronous generator connected to infinite bus, under constant power and variable
excitation & vice - versa.
11 Model transformer in Simscape for Automatic Voltage Regulation.
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Template for Practical Course and if AEC is a practical Course
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Template for Practical Course and if AEC is a practical Course
Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted
jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated
for 100 marks and scored marks shall be scaled down to 50 marks (however, based on
course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours
Suggested Learning Resources:
www.nptel.ac.in
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DIGITAL LOGIC CIRCUITS Semester III
Course Code BEE 306A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
To illustrate simplification of algebraic equations using Karnaugh Maps and Quine-McClusky methods
To design decoders, encoders, digital multiplexer, adders, subtractors and binary comparators
To explain latches and flip-flops , registers and counters
To analyze Melay ad Moore Models
To develop state diagrams synchronous sequential circuits
To understand the applications of sequential circuits
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Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
Explain the concept of combinational and sequential logic circuits
Analyse and design combinational circuits
Describe and characterize flip flops and its applications
Design the sequential circuits using SR, JK, D and T flip-flops and Melay and Moore applications
Design applications of combinational and sequential circuits
Employ the digital circuits for different applications
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
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Web links and Video Lectures (e-Resources):
https://onlinecourses.nptel.ac.in/noc20_ee32/preview
YouTube videos on digital electronics
National Instruments: https://education.ni.com/teach/resources/1104/digital-electronics
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
To develop mini projects on digital electronics
Simple applications like Smart Digital School Bell With Timetable Display, Stop and Go Queue Entry
Manager System, Digital Car Turning and Braking Indicator, Digital Nameplate with Visitor Sensing,
electronic watch dog etc
Applications based on PLAs, FPGA, CPLD etc
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Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Reference Books
1. Electrical and Electronic Measurements and Instrumentation, R.K. Rajput, S Chand, 5th Edition,
2012
2. Electrical Measuring Instruments and Measurements, S.C. Bhargava, BS Publications, 2013
3. Modern Electronic Instrumentation and Measuring Techniques, Cooper D and A.D. Heifrick,
Pearson, First Edition, 2015
4. Electronic Instrumentation and Measurements, David A Bell, Oxford University, 3rd Edition,
2013
5. Electronic Instrumentation, H.S.Kalsi, Mc Graw Hill, 3rd Edition,2010
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ELECTROMAGNETIC FIELD THEORY Semester III
Course Code BEE 306C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
• To understand Scalars, Vectors, Cartesian co-ordinate system, relation between different coordinate
systems, Coulomb’s law, Electric field intensity and its evaluation for different charge conditions.
• To understand potential field of a point charge, Potential gradient, Energy density in the electrostatic field
and conductor’s properties and boundary conditions.
• To understand Poisson’s and Laplace Equations, Biot - Savart’s law, Ampere’s circuital law and Stokes
theorem.
• To understand Magnetic force, Force between differential current elements. Force and torque on a closed
circuit, Nature of magnetic materials and Magnetic boundary conditions.
• To understand Faraday’s law, Displacement current. Maxwell’s equations, Wave propagation in free space
and in dielectrics.
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MODULE-3
Poisson’s and Laplace Equations:
Derivations and problems, Uniqueness theorem.
Steady magnetic fields:
Biot - Savart’s law, Ampere’s circuital law. The Curl. Stokes theorem. Magnetic flux and flux density. Scalar and
vector magnetic potentials. Numerical.
MODULE-4
Magnetic forces:
Force on a moving charge and differential current element. Force between differential current elements. Force and
torque on a closed circuit. Numerical.
Magnetic Materials and Magnetism:
Nature of magnetic materials, magnetisation and permeability. Magnetic boundary conditions. Magnetic circuit,
inductance and mutual inductance. Numerical.
MODULE-5
Time Varying Fields and Maxwell’s Equations:
Faraday’s law, Displacement current. Maxwell’s equations in point form and integral form. Numerical.
Uniform plane wave:
Electromagnetic radiation: near field—non-radiative and radiative, far field. Wave propagation in free space and in
dielectrics. Pointing vector and power considerations. Propagation in good conductors, skin effect. Numerical.
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Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3
sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1 Engineering Electromagnetics William H Hayt et al McGraw Hill 8thEdition, 2014
2 Principles of Electromagnetics Matthew N. O. Sadiku Oxford 6th Edition, 2015
Reference books:
1 Fundamentals of Engineering Electromagnetics David K. Cheng Pearson 2014
2 Electromagnetism -Theory (Volume -1) -Applications (Volume-2) Ashutosh Pramanik PHI Learning 2014
3 Electromagnetic Field Theory Fundamentals Bhag Guru et al Cambridge 2005
4 Electromagnetic Field Theory RohitKhurana Vikas Publishing 1st Edition,2014
Web links and Video Lectures (e-Resources):
• YouTube videos
• www.nptel.ac.in
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PHYSICS OF ELECTRONIC DEVICES Semester III
Course Code BEE306D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Hours Theory Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
This course will enable students to
Understand the basics of semiconductor physics and electronic devices
Describe the mathematical models BGTs and FETs along with the constructional details
Understand the construction and working principles of optoelectronic devices
Understand the fabrication process of semiconductor devices and CMOS process integration
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Module-4
Field Effect Transistors:
Basic PN JFET operation, equivalent circuit and frequency limitation, MOSFET two terminal MOS
structure, energy band diagram, ideal capacitance voltage characteristics and frequency effects,
basic MOSFET operation, MOSFET structure, current-voltage characteristics
Text 2)9.1.1, 9.4, 9.6.1 - 9.6.2, 9.7.1-9.7.2, 9.8.1-9.8.2
Module-5
Fabrication of PN junction:
Thermal oxidation, diffusion, rapid thermal processing, Ion implantation, chemical vapour
deposition, photolithography, etching, metallization
(Text 1)5.1
Integrated Circuits:
Background, evolution of ICs, CMOS process integration, integration of other circuit elements
(Text 1)9.1-9.2, 9.3.1, 9.3.3.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Understand the principles of semiconductor physics
2. Understand the principles and characteristics of different types of semiconductor devices
3. Understand the fabrication process of semiconductor devices
4. Utilize the mathematical models of MOS transistors for circuits and systems
5. Identify the mathematical models of MOS transistors for circuits and systems
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Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Continuous Internal Evaluation:
For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
For the course, CIE marks will be based on a scaled-down sum of two tests and other methods of
assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Scilab / MATLAB for Transformers & Generators
Course Code BEEL358A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behavior of the circuit without the risk of damaging equipment/device
or injuring themselves.
Sl. Experiments
NO
1 Open Circuit and Short circuit tests on single phase step up or step down transformer and
predetermination of (i) Efficiency and regulation (ii) Calculation of parameters of equivalent circuit.
2 Sumpner’s test on similar transformers and determination of combined and individual transformer
efficiency.
3 Parallel operation of two dissimilar single-phase transformers of different kVA and determination
of load sharing and analytical verification given the Short circuit test data.
4 Separation of hysteresis and eddy current losses in single phase transformer.
5 Voltage regulation of an alternator by EMF and MMF methods.
6 Voltage regulation of an alternator by ZPF method.
7 Power angle curve of synchronous generator.
8 Slip test – Measurement of direct and quadrature axis reactance and predetermination of regulation
of salient pole synchronous machines.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Analyse in an intelligent manner, think better, and perform better.
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Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the total
CIE marks scored by the student.
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555 IC Laboratory
Course Code BEEL358B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging
equipment/device or injuring themselves.
Sl. Experiments
NO
1 Construct Astable Multivibrator circuit using IC-555 Timer.
2 Construct Mono-stable Multivibrator circuit using IC-555 Timer.
3 Construct and test Sequential timer using IC-555.
4 Generate Pulse Width Modulator (PWM) signal using IC-555 Timer.
5 Construct Burglar Alarm circuit using IC-555 Timer.
6 Construct and generate Frequency Shift Keying (FSK) signal using IC-555 Timer.
7 Construct and test Running LED circuit using IC-555 Timer.
8 Construct water level indicator using IC-555 Timer.
9 Construct continuity tester using IC-555 Timer.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Analyse in an intelligent manner, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
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The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the totalCIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
theUniversity
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointlyby examiners.
Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in - 60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by theexaminers)
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.The duration of SEE is 03 hours
Rubrics suggested in Annexure-II of Regulation book.
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Circuit Laboratory using P-spice
Course Code BEEL358C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging equipment/ device
or injuring themselves.
Sl. Experiments
NO
1 Simulate Series RL & RC circuit and observe phase difference between waveforms of voltage and current.
2 Simulation and verification of Kirchhoff’s Current Law & Kirchhoff’s Voltage Law.
3 Simulation of Mesh analysis for a given circuit.
4 Simulation of Nodal analysis for a given circuit.
5 Determination of Z & Y parameters of a given two-port network.
6 Simulate and verify Super Positions theorem.
7 Simulation and verification Reciprocity theorem.
8 Simulation and verification Thevenin’s and Norton’s theorem.
9 Simulation and verification Maximum Power Transfer theorem.
10 Simulation and verification Millman’s theorem.
11 Simulation of Series and Parallel Resonance circuit.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Analyse in an intelligent manner, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
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The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the total
CIE marks scored by the student.
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ELECTRICAL HARDWARE LABORATORY
Course Code BEEL358D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging
equipment/device or injuring themselves.
Sl. Experiments
NO
1 Verification of KCL and KVL for DC Circuits.
2 Verification of KCL and KVL for AC Circuits.
3 Measurement of Current, Power and Power Factor of Incandescent Lamp, Fluorescent Lamp and LED
Lamp.
4 Evaluate the loading effect of Voltmeter of electric circuits.
5 Measurement of Resistance using V-I method.
6 Measurement of Resistance and Inductance of a Choke coil using three voltmeter method.
7 Determination of Phase and Line quantities in three-phase star and delta connected loads.
8 Two-Way and Three-Way Control of Lamp and Formation of Truth Table.
9 Measurement of Earth Resistance using fall of potential method.
10 Determination of fuse characteristics.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Analyse in an intelligent manner, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
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In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the totalCIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
theUniversity
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointlyby examiners.
Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in - 60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by theexaminers)
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.The duration of SEE is 03 hours
Rubrics suggested in Annexure-II of Regulation book.
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1
Course objectives:
1 To study the constructional features of Motors and select a suitable drive for specific
Application.
2 To study the constructional features of Three Phase and Single phase induction Motors.
3 To study different test to be conducted for the assessment of the performance
characteristics of motors.
4 To study the speed control of motor by a different methods.
5 Explain the construction and operation of Synchronous motor and special motors.
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2
Module-3
Performance of Three-Phase Induction Motor: Phasor diagram of induction motor on no-load
and on load, equivalent circuit, losses, efficiency, No-load and blocked rotor tests. Performance
of the motor from the equivalent circuit. Cogging and crawling. High torque rotors-double cage
and deep rotor bars. Induction motor working as induction generator, construction and working
of doubly fed induction generator. (numerical as applicable)
Module-4
Starting and Speed Control of Three-Phase Induction Motors: Necessity of starter. Direct on
line, Star-Delta, and autotransformer starting. Rotor resistance starting. Speed control by
frequency.
Single-Phase Induction Motor: Double revolving field theory and principle of operation.
Construction and operation of split-phase, capacitor start and capacitor run and shaded pole
motors. Comparison of single phase motors and applications. (numerical as applicable)
Module-5
Synchronous Motor: Principle of operation, phasor diagrams, torque and torque angle, effect of
change in load, effect of change in excitation. V and inverted V curves. Synchronous condenser,
Other Motors: Construction and operation of Universal motor, AC servomotor, Linear induction
motor, PMSM, SRM and BLDC.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1 Understand the construction and operation, characteristics, Testing of DC Motors and
determine losses and efficiency.
2 Understand the construction and operation, classification and types of Three phase
Induction motors.
3 Describe the performance characteristics and applications of three phase Induction motors.
4 Demonstrate and explain Speed Control methods of three phase induction motor and types
of single phase induction motors.
5 Understand the construction and operation, V and inverted V curves of synchronous motors.
6 Construction and operation of Universal motor, AC servomotor, Linear induction motor,
PMSM, SRM and BLDC motors.
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3
Reference Books
1. Electrical Machines, Drives and Power systems, Theodore Wildi, Pearson, 6th Edition,
2014
2. Electrical Machines, M.V. Deshpande, PHI Learning, 2013
3. Electric Machinery and Transformers, Bhag S. Guru at el, Oxford University Press, 3rd
Edition, 2012
4. Electric Machinery and Transformers, Irving Kosow, Pearson, 2nd Edition, 2012
5. Principles of Electric Machines and power Electronic, P.C.Sen, Wiley, 2nd Edition, 2013
6. Electrical Machines, R.K. Srivastava, Cengage Learning, 2nd Edition, 2013
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4
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1
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2
Module-2
Line Parameters: Introduction to line parameters- resistance, inductance and capacitance. Calculation of
inductance of single phase and three phase lines with equilateral spacing, unsymmetrical spacing, double
circuit and transposed lines. Inductance of composite – conductors, geometric mean radius (GMR) and
geometric mean distance (GMD). Calculation of capacitance of single phase and three phase lines with
equilateral spacing, unsymmetrical spacing, double circuit and transposed lines. Capacitance of composite –
conductor, geometric mean radius (GMR) and geometric mean distance (GMD). Advantages of single circuit
and double circuit lines.
Module-3
Performance of Transmission Lines: Classification of lines – short, medium and long. Current and voltage
relations, line regulation and Ferranti effect in short length lines, medium length lines considering Nominal
T and nominal circuits, and long lines considering hyperbolic form equations. Equivalent circuit of a long
line. ABCD constants in all cases.
Module-4
Corona: Phenomena, disruptive and visual critical voltages, corona loss. Advantages and disadvantages of
corona. Methods of reducing corona.
Underground Cable: Types of cables, constructional features, insulation resistance, thermal rating, charging
current, grading of cables – capacitance and inter-sheath. Dielectric loss. Comparison between ac and DC
cables. Limitations of cables. Specification of power cables.
Module-5
Distribution: Primary AC distribution systems – Radial feeders, parallel feeders, loop feeders and
interconnected network system. Secondary AC distribution systems – Three phase 4 wire system and single
phase 2 wire distribution, AC distributors with concentrated loads. Effect of disconnection of neutral in a 3
phase four wire system.
Reliability and Quality of Distribution System: Introduction, definition of reliability, failure, probability
concepts, limitation of distribution systems, power quality, Reliability aids.
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3
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Reference Books:
1. Power System Analysis and Design, J. Duncan Gloverat el, Cengage Learning, 4th Edition 2008
2. Electrical power Generation, Transmission and Distribution, S.N. Singh, PHI, 2nd Edition,2009
3. Electrical Power, S.L.Uppal, Khanna Publication
4. Electrical Power Systems, C. L. Wadhwa, New Age, 5th Edition, 2009
5. Electrical Power Systems, Ashfaq Hussain, CBS Publication
6. Electric Power Distribution, A.S. Pabla, McGraw-Hill, 6th Edition,2012
Web links and Video Lectures (e-Resources):
www.nptel.ac.in
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4
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Microcontrollers
Course Code BEE403 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
At the end of the course the student will be able to:
1. To explain the internal organization and working of Computers, microcontrollers and embedded
processors.
2. Compare and contrast the various members of the 8051family.
3. To explain the registers of the 8051 microcontroller, manipulation of data using registers and MOV
instructions.
4. To explain in detail the execution of 8051 Assembly language instructions and data types
5. To explain loop, conditional and unconditional jump and call, handling and manipulation of I/O
instructions.
6. To explain different addressing modes of 8051, arithmetic, logic instructions, and programs.
7. To explain develop 8051C programs for time delay, I/O operations, I/O bit manipulation, logic.
8. To explain writing assembly language programs for data transfer, arithmetic, Boolean and logical
instructions.
9. To explain writing assembly language programs for code conversions.
10. To explain writing assembly language programs using subroutines for generation of delays, counters,
configuration of SFRs for serial communication and timers.
11. To perform interfacing of stepper motor and DC motor for controlling the speed.
12. To explain generation of different waveforms using DAC interface.
MODULE-2
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Assembly Programming and Instruction of 8051: Introduction to 8051 assembly programming,
Assembling and running an 8051 program, Data types and Assembler directives Arithmetic, logic
instructions and programs, Jump, loop and call instructions, IO port programming.
MODULE-3
8051 Programming in C: Data types and time delay in 8051C, IO programming in 8051C, Logic
operations in 8051 C, Data conversion program in 8051 C, Accessing code ROM space in 8051C, Data
serialization using 8051C.
8051 Timer Programming in Assembly and C: Programming 8051 timers, Counter programming,
Programming timers 0 and 1 in 8051 C.
MODULE-4
8051 Serial Port Programming in Assembly and C: Basics of serial communication, 8051 connection
to RS232, 8051 serial port programming in assembly, serial port programming in 8051 C.
8051 Interrupt Programming in Assembly and C: 8051 interrupts, Programming timer, external
hardware, serial communication interrupt, Interrupt priority in 8051/52, Interrupt programming in C.
MODULE-5
Interfacing: LCD interfacing, Keyboard interfacing.
ADC, DAC and Sensor Interfacing: ADC 0808 interfacing to 8051, Serial ADC Max1112 ADC interfacing
to 8051, DAC interfacing, Sensor interfacing and signal conditioning.
Motor Control: Relay, PWM, DC and Stepper Motor: Relays and opt isolators, stepper motor
interfacing, DC motor interfacing and PWM.
8051 Interfacing with 8255: Programming the 8255, 8255 interfacing, C programming for 8255.
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The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
CIE for the theory component of the IPCC (maximum marks 50)
IPCC means practical portion integrated with the theory of the course.
CIE marks for the theory component are 25 marks and that for the practical component is 25 marks.
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two
Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the
theory component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks
for the test to be conducted after the completion of all the laboratory sessions.
On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of
all experiments’ write-ups are added and scaled down to 15 marks.
The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will
have a CIE component only. Questions mentioned in the SEE paper may include questions from the
practical component.
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Suggested Learning Resources:
Books
1. The 8051 Microcontroller and Embedded Systems Using Assembly and C, Muhammad Ali Mazadi, Pearson, 2nd
Edition, 2008.
2. The 8051 Microcontroller, Kenneth Ayala, Cengage, 3rd Edition, 2005.
3. Microcontrollers: Architecture, Programming, Interfacing and System Design, Raj Kamal, Pearson, 1st Edition,
2012.
Web links and Video Lectures (e-Resources):
NPTEL course on 8051 microcontrollers:https://nptel.ac.in/courses/108105102
You tube videos on 8051 microccontrollers
8051 programming online course: Complete 8051 Microcontroller Programming Course | Udemy
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Template for Practical Course and if AEC is a practical Course
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Template for Practical Course and if AEC is a practical Course
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Template for Practical Course and if AEC is a practical Course
Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted
jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated
for 100 marks and scored marks shall be scaled down to 50 marks (however, based on
course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours
Suggested Learning Resources:
www.nptel.ac.in
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Electrical Power Generation and Economics Semester IV
Course Code BEE405A CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
To understand the basics of hydro electric power plant, merits and demerits of hydroelectric power
plants, site selection, arrangement and elements of hydro electric plant.
To understand the working, site selection and arrangement of Steam, Diesel and Gas Power Plants.
To understand the working, site selection and arrangement of Nuclear Power Plants.
To understand importance of different equipments in substation, Interconnection of power stations and
different types of grounding.
To understand the economics of power generation.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinking skills such as the ability to design, evaluate, generalize, and analyze information rather than
simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world-and when that's possible, it helps improve
the students' understanding.
Module-1
Hydroelectric Power Plants: Hydrology, run off and stream flow, hydrograph, flow duration
curve, Mass curve, reservoir capacity, dam storage. Hydrological cycle, merits and demerits of
hydroelectric power plants, Selection of site. General arrangement of hydel plant, elements of the
plant, Classification of the plants based on water flow regulation, water head and type of load the
plant has to supply. Water turbines – Pelton wheel, Francis, Kaplan and propeller turbines.
Characteristic of water turbines Governing of turbines, selection of water turbines.
Underground, small hydro and pumped storage plants. Choice of size and number of units, plant
layout and auxiliaries.
Module-2
Steam Power Plants: Introduction, Efficiency of steam plants, Merits and demerits of plants,
selection of site. Working of steam plant, Power plant equipment and layout, Steam turbines,
Fuels and fuel handling, Fuel combustion and combustion equipment, Coal burners, Fluidized bed
combustion, Combustion control, Ash handling, Dust collection, Draught systems, Feed water,
Steam power plant controls, plant auxiliaries.
Diesel Power Plant: Introduction, Merits and demerits, selection o f site, elements of diesel
power plant, applications.
Gas Turbine Power Plant: Introduction Merits and demerits, selection of site, Fuels for gas
turbines, Elements of simple gas turbine power plant, Methods of improving thermal efficiency
of a simple gas power plant, Closed cycle gas turbine power plants. Comparison of gas power plant
with steam and diesel power plants.
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Module-3
Nuclear Power Plants: Introduction, Economics of nuclear plants, Merits and demerits, selection
of site, Nuclear reaction, Nuclear fission process, Nuclear chain reaction, Nuclear energy, Nuclear
fuels, Nuclear plant and layout, Nuclear reactor and its control, Classification of reactors, power
reactors in use, Effects of nuclear plants, Disposal of nuclear waste and effluent, shielding.
Module-4
Substations: Introduction to Substation equipment; Transformers, High Voltage Fuses, High
Voltage Circuit Breakers and Protective Relaying, High Voltage Disconnect Switches, Lightning
Arresters, High Voltage Insulators and Conductors, Voltage Regulators, Storage Batteries, Reactors,
Capacitors, Measuring Instruments, and power line carrier communication equipment.
Classification of substations – indoor and outdoor, Selection of site for substation, Bus-bar
arrangement schemes and single line diagrams of substations.
Interconnection of power stations. Introduction to gas insulated substation, Advantages and
economics of Gas insulated substation.
Grounding: Introduction, Difference between grounded and ungrounded system. System
grounding – ungrounded, solid grounding, resistance grounding, reactance grounding, resonant
grounding. Earthing transformer. Neutral grounding and neutral grounding transformer.
Module-5
Economics: Introduction, Effect of variable load on power system, classification of costs, Cost
analysis. Interest and Depreciation, Methods of determination of depreciation, Economics of Power
generation, different terms considered for power plants and their significance, load sharing. Choice
of size and number of generating plants. Tariffs, objective, factors affecting the tariff, types. Types of
consumers and their tariff. Power factor, disadvantages, causes, methods of improving power
factor, Advantages of improved power factor, economics of power factor improvement and
comparison of methods of improving the power factor. Choice of equipment.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the basics of hydro electric power plant, merits and demerits of hydroelectric power plants,
site selection, arrangement and elements of hydro electric plant.
2. Explain the working, site selection and arrangement of Steam, Diesel and Gas Power Plants.
3. Explain the working, site selection and arrangement of Nuclear Power Plants.
4. Explain the importance of different equipments in substation, Interconnection of power stations and
different types of grounding.
5. Explain the economics of power generation.
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Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Reference Books
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OPAMPS AND LIC Semester IV
Course Code BEE405B CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
To understand the basics of Linear ICs such as Op-amp, Regulator, Timer & PLL.
To learn the designing of various circuits using linear ICs.
To use these linear ICs for specific applications.
To understand the concept and various types of converters.
To use these ICs, in Hardware projects.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinking skills such as the ability to design, evaluate, generalize, and analyze information rather than
simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world-and when that's possible, it helps improve
the students' understanding.
Module-1
Operational amplifiers: Introduction, Block diagram representation of a typical Op-amp,
schematicsymbol, characteristics of an Op-amp, ideal op-amp, equivalent circuit, ideal voltage
transfercurve,open loop configuration, differential amplifier, inverting & non –inverting amplifier,
Op-amp withnegative feedback ; voltage series feedback amplifier-gain, input resistance, output
resistance,voltage shunt feedback amplifier- gain, input resistance, output resistance.
General Linear Applications: D.C. & A.C amplifiers, peaking amplifier, summing, scaling &
averaging amplifier, inverting and non-inverting configuration, differential configuration,
instrumentation amplifier
Module-2
Active Filters: First & Second order high pass & low pass Butterworth filters, higher order filters,
Band pass filters, Band reject filters & all pass filters.
DC Voltage Regulators: voltage regulator basics, voltage follower regulator, adjustable output
regulator, LM317 & LM337 Integrated circuits regulators.
Module-3
Signal generators: Working and derivation of frequency of oscillation for Phase shift oscillator,
Wien bridge oscillator, square wave generator, sawtooth wave generator, triangular wave
generator, rectangular wave generator.
Comparators & Converters: Basic comparator, zero crossing detector, inverting & non-
invertingSchmitt trigger circuit, voltage to current converter with grounded load, current to
voltageconverterand basics of voltage to frequency and frequency to voltage converters.
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Module-4
Signal processing circuits: Precision half wave & full wave rectifiers limiting circuits, clamping
circuits, peak detectors, sample & hold circuits.
A/D & D/A Converters: Basics, R–2R D/A Converter, Integrated circuit 8-bit D/A, successive
approximation ADC, linear ramp ADC, dual slope ADC, digital ramp ADC
Module-5
Phase Locked Loop (PLL): Basic PLL, components, performance factors, applications of PLL IC
565. Timer: Internal architecture of 555 timer, Mono stable, Astable-multivibrators and
applications
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the basics of linear ICs.
2. Design circuits using linear ICs.
3. Demonstrate the application of Linear ICs.
4. Use ICs in the electronic projects
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Suggested Learning Resources:
Books
1. Op-Amps and Linear Integrated Circuits, Ramakant A Gayakwad , Pearson, 4th Edition, 2015
2. Operational Amplifiers and Linear ICs, David A. Bell ,Oxford, 3rd Edition 2011
3. Linear Integrated Circuits , S. Salivahanan, et al, Wiley India , 2013
4. Op-Amps and Linear Integrated Circuits, Concept and Application, James M Fiore,
Cengage, 2009
Web links and Video Lectures (e-Resources):
NPTEL course on opamps : https://nptel.ac.in/courses/108108114
You tube videos on opamps and in Linear Integrated Circuits.
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3
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Object Oriented Programming Semester IV
Course Code BEE405D CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
To get a clear understanding of object-oriented concepts.
To understand object oriented programming through C++
Module-1
Overview:
Why Object-Oriented Programming in C++ - Native Types and Statements –Functions and
Pointers Implementing ADTs in the Base Language.
Module-2
BASIC CHARACTERISTICS OF OOP:
Data Hiding and Member Functions- Object Creation and Destruction- Polymorphism data
abstraction: Iterators and Containers.
Module-3
ADVANCED PROGRAMMING:
Templates, Generic Programming, and STL-Inheritance-Exceptions-OOP Using C++.
Module-4
OVERVIEW OF JAVA:
Data types, variables and arrays, operators, control statements, classes, objects, methods –
Inheritance
Module-5
EXCEPTION HANDLING:
Packages and Interfaces, Exception handling, Multithreaded programming, Strings, Input/Output
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Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Discuss the basic Object Oriented concepts.
2. Develop applications using Object Oriented Programming Concepts.
3. Implement features of object oriented programming to solve real world problems.
Reference Books
1. Herbert Schildt, "The Java 2: Complete Reference", Fourth edition, TMH, 2002
2. Bjarne Stroustrup, “The C++ Programming Language”, Pearson Education, 2004.
3. Stanley B. Lippman and Josee Lajoie , “C++ Primer”, Pearson Education, 2003.
4. K.R.Venugopal, Rajkumar Buyya, T.Ravishankar, "Mastering C++", TMH, 2003.
Web links and Video Lectures (e-Resources):
www.nptel.ac.in
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BASICS OF –VHDL LAB Semester IV
Course Code BEE456A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 03
Examination nature (SEE) Practical/Viva-Voce
Course objectives:
1. Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their
convenience and repeat any number of times to understand the concept.
2. Provide unhindered access to perform whenever the students wish.
3. Vary different parameters to study the behaviour of the circuit without the risk of
damaging equipment/device or injuring themselves.
Sl.NO Experiments
Note:
Programming can be done using any compiler. Download the programs on a FPGA/CPLD board and
performance testing may be done using 32 channel pattern generator and logic analyser, apart from
verification by simulation with tools such as Altera/Modelsim or equivalent
1 Write Verilog program for the following combinational design along with test bench to verify
the design:
a) 2 to 4 decoder realization using NAND gates only (structural model)
b) 8 to 3 encoder with priority encoder and without priority encoder (behavioral model)
c) 8 to 1 Multiplexer using case statement and if statement
d) 4 bit binary to gray code converter using 1 bit gray to binary converter 1 bit adder and
subtractor.
2 Model in Verilog for a full adder and add functionality to perform logical operations of XOR,
XNOR, AND and OR gates. Write test bench with appropriate input patterns to verify the
modelled behavior.
3 Verilog 32 bit ALU shown in figure below and verify the functionality of ALU by selecting
appropriate test patterns. The functionality of the ALU is shown in Table-1.
a) Write test bench to verify the functionality of the ALU considering all possible input
patterns
b) The enable signal will set the output to required functions if enabled, if disabled all the
outputs are set to tri-state.
c) The acknowledge signal is set high after every operation is complete.
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ALU Top Level Diagram
Table -1 ALU functions:
4 Write Verilog code for SR, D and JK and verify the flip flop
6 Write Verilog code for counter with given input clock and check whether it works as clock
divider performing division of clock by 2, 4, 8 and 16 . Verify the functionality of the code.
PART B
Note;
Interfacing and Debugging:
(ED) WinXp, PSpice, MultiSim, Proteus, CircuitLab, or any other equivalent tool can
be used.
9 Interface a stepper motor to FPGA and write Verilog code to control the stepper motor rotation
which in turn may control a Robatic arm. External switches to be used for different controls
like rotate the stepper motor:
a)+ N steps if the switch number 1 of a DIP switch is closed.
b)+N/2 steps if switch number 2 of a DIP switch is closed.
c)-N steps if switch number 3 of a DIP switch is closed etc.
10 Interface a DAC to FPGA and write Verilog code to generate a sine wave of frequency f KHz, ex f
= 100 KHz, or 200 KHz etc, . Modify the code to down sample the frequency to f/2 KHz.
Display the original and down sampled signals by connecting them to CRO.
11 Write Verilog code using FSM to simulate elevator operation.
12 Write Verilog code to convert an analog input signal of a sensor to digital form and to display
the same on a suitable display like simple set of LEDs , 7 segment display digits or LCD display
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Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Write the VHDL/Verilog programs to simulate combinational circuits in data flow, behavioral, gate
level abstractions.
2. Describe sequential circuits like flip-flops, counters, in behavioral descriptions and obtain simulated
waveforms.
3. Use FPGA/CPLD kits for downloading Verilog codes and check output.
4. Synthesize combinational and sequential circuits on programmable ICs and test the hardware
5. Interface the hardware programmable chips and obtain the required output.
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment is to be evaluated for conduction with an observation sheet and record write-up.
Rubrics for the evaluation of the journal/write-up for hardware/software experiments are
designed by the faculty who is handling the laboratory session and are made known to students at
the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-up
will be evaluated for 10 marks.
Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct a test of 100 marks after the completion of all the experiments listed in
the syllabus.
In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE
marks scored by the student.
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appointed by the Head of the Institute.
The examination schedule and names of examiners are informed to the university before
the conduction of the examination. These practical examinations are to be conducted
between the schedule mentioned in the academic calendar of the University.
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer
script to be strictly adhered to by the examiners. OR based on the course requirement
evaluation rubrics shall be decided jointly by examiners.
Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted
jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated
for 100 marks and scored marks shall be scaled down to 50 marks (however, based on
course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours
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Scilab / MATLAB for Electrical and Electronic Measurements
Course Code BEEL456B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging equipment/ device
or injuring themselves.
Sl. Experiments
NO
1 Design and Analysis of measurement of Resistance using Wheatstone and Kelvins double bridge.
2 Design and Analysis of measurement of Inductance using Schering and De-Sauty’s Bridges.
3 Design and Analysis of measurement of Inductance using Maxwells and Anderson Bridges.
4 Design and Analysis of measurement of Frequency in Single and Three Phase Circuits.
5 Design and Analysis of measurement of Real Power, Reactive and Power Factor in Three Phase Circuits.
6 Design and Analysis of measurement of Energy in Three Phase Circuits.
7 Design and Analysis of measurement of Flux and Flux density.
8 Testing and Analysis of Current Transformer using Silsbees Deflection Method.
9 Testing and Analysis of Voltage Transformer using Silsbees Deflection Method.
10 Design and Analysis of True RMS Reading Volt Meters.
11 Design and Analysis of Integrating and Successive approximation type Digital Volt Meters.
12 Design and Analysis of Q Meter.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Analyse in a systematic way, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination (SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
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Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the
totalCIE marks scored by the student.
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PCB Design Laboratory
Course Code BEEL456C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging
equipment/device or injuring themselves.
Sl. Experiments
NO % Portion
Coverage
1 Introduction 30%
Need for PCB, Types of PCBs : Single and Multilayer, Technology: Plated Through
Hole, Surface Mount, PCB Material, Electronic Component packaging, PCB
Designing, Fabrication, Electronic Design Automation Tools: proteus, Orcad or any
other tool.
2 Introduction to proteus, Orcad or any other tool., Schematic entry / drawing, netlisting, 30%
layering, component foot print library selection & designing, design rules, component
placing: Manual & automatic, track routing: automatic & manual, rules: track length,
angle, joint & size, Autorouter setup. Design Rules.
3 PCB Designing Practice : PCB Designing of Basic and Analog Electronic Circuits, PCB 10%
Designing of Power Supplies.
4 Post Designing & PCB Fabrication Process: Printing the Design, Etching, Drilling, 30%
Interconnecting and Packaging electronic Circuits, Gerber Generation, Soldering and De-
soldering, Component Mounting, PCB and Hardware Testing.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Analyse in an intelligent manner, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
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semester and the second test shall be conducted after the 14th week of the semester.
In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the totalCIE marks scored by the student.
Semester End Evaluation (SEE):
SEE marks for the practical course is 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
theUniversity
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointlyby examiners.
Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in - 60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by theexaminers)
Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.The duration of SEE is 03 hours
Rubrics suggested in Annexure-II of Regulation book.
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ARDUINO AND RASPBERRY PI Semester IV
Course Code BEEL456D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 100
Examination type (SEE) Practical
Course objectives:
Course objectives: To impart necessary and practical knowledge of components of Internet of
Things
To develop skills required to build real-life IoT based projects
Sl.No Experiments
1 i) To interface LED/Buzzer with Arduino/Raspberry Pi and write a program to ‘turn ON’ LED
for 1 sec after every 2 seconds.
ii) To interface Push button/Digital sensor (IR/LDR) with Arduino/Raspberry Pi and write a
program to ‘turn ON’ LED when push button is pressed or at sensor detection.
2 i) To interface DHT11 sensor with Arduino/Raspberry Pi and write a program to print
temperature and humidity readings.
ii) To interface OLED with Arduino/Raspberry Pi and write a program to print temperature and
humidity readings on it.
3 To interface motor using relay with Arduino/Raspberry Pi and write a program to ‘turn ON’
motor when push button is pressed
4 To interface Bluetooth with Arduino/Raspberry Pi and write a program to send sensor data to
Smartphone using Bluetooth
5 To interface Bluetooth with Arduino/Raspberry Pi and write a program to turn LED ON/OFF
when '1'/'0' is received from Smartphone using Bluetooth
6 Write a program on Arduino/Raspberry Pi to upload temperature and humidity data to thing
speak cloud
7 Write a program on Arduino/Raspberry Pi to retrieve temperature and humidity data from thing
speak cloud
8 Write a program on Arduino/Raspberry Pi to retrieve temperature and humidity data from thing
speak cloud
9 Write a program on Arduino/Raspberry Pi to publish temperature data to MQTT broker
10 Write a program to create UDP server on Arduino/Raspberry Pi and respond with humidity data
to UDP client when requested.
11 Write a program to create TCP server on Arduino/Raspberry Pi and respond with humidity data
to TCP client when requested.
12 Write a program on Arduino/Raspberry Pi to subscribe to MQTT broker for temperature data
and print it.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
At the end of the course the student will be able to:
1. Explain the concepts of Internet of Things and its hardware and software components
2. Interface I/O devices, sensors & communication modules
3. Remotely monitor data and control devices
4. Develop real life IoT based projects.
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Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together
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Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted
jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated
for 100 marks and scored marks shall be scaled down to 50 marks (however, based on
course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours
Suggested Learning Resources:
1. https://www.arduino.cc
2. https://www.raspberrypi.org/
3. Course in Internet of Things (IOT) Using Arduino - NIELIT Delhi Centre
4. Vijay Madisetti, Arshdeep Bahga, Internet of Things. "A Hands on Approach", University
Press
5. Dr. SRN Reddy, Rachit Thukral and Manasi Mishra, "Introduction to Internet of Things: A
practical Approach", ETI Labs
6. Pethuru Raj and Anupama C Raman, "The Internet of Things: Enabling Technologies,
Platforms, and Use Cases", CRC Press
7. Jeeva Jose, "Internet of Things", Khanna Publishing House, Delhi
8. Adrian McEwen, "Designing the Internet of Things", Wiley
9. Raj Kamal, "Internet of Things: Architecture and Design", McGraw Hill
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SIGNALS AND DSP
IPCC Course Code BEE 502 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 12 Lab Total Marks 100
slots
Credits 04 Exam Hours 03
Course objectives:
1. To explain basic signals, their classification, basic operations on signals, sampling of analog
signals, and the properties of the systems.
2. To explain the convolution of signals in continuous and discrete time domain and the properties
of impulse response representation.
3. To explain the computation of Discrete Fourier Transform of a sequence by direct method, Linear
transformation Method and using Fast Fourier Transformation Algorithms.
4. To explain design of IIR all pole analog filters and transform them into digital filter using Impulse
Invariant and Bilinear transformation Techniques and to obtain their Realization.
5. To explain design of FIR filters using Window Method and Frequency Sampling Method and to
obtain their Realization.
Teaching-Learning Process (General Instructions)
These are sample Strategies; which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective
teachingmethods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical
thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinkingskills such as the ability to design, evaluate, generalize, and analyse information rather than
simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve
the students' understanding.
MODULE-1
Signals, systems and signal processing, classification of signals, Basic Operations on Signals, Basic
Elementary Signals, properties of systems. concept of frequency in continuous and Discrete time
signals, sampling of analog signals, the sampling theorem , quantization of continuous amplitude
and sinusoidal signals , coding of quantized samples, digital to analog conversion,
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MODULE-2
Discrete Fourier Transforms (DFT):
Introduction to DFT, definition of DFT and its inverse, matrix relation to find DFT and IDFT
,Properties of DFT, linearity, circular time shift, circular frequency shift, circular folding, symmetry
of : real valued sequences, real even and odd sequences, DFT of complex conjugate sequence,
multiplication of two DFTs- the circular convolution, Parseval’s theorem, circular correlation,
Digital linear filtering using DFT. Signal segmentation , overlap-save and overlap-add method.
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process
MODULE-3
Fast-Fourier-Transform (FFT) algorithms: Direct computation of DFT, need for efficient computation of the
DFT (FFT algorithms)., speed improvement factor, Radix-2 FFT algorithm for the computation of DFT and
IDFT–decimation-in-time and Decimation-in-frequency algorithms , calculation of DFT when N is not a power
of 2.
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process
MODULE-4
IIR filter design: Classification of analog filters, generation of Butterworth polynomials, frequency
transformations. Design of Butterworth filters, low pass, high pass, band pass and band stop filters,
Generation of Chebyshev polynomials, design of Chebyshev filters, design of Butterworth and
Chebyshev filters using bilinear transformation and Impulse invariance method, representation of IIR
filters using direct form one and two, series form and parallel form.
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process
MODULE 5
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process
Sl. Experiments
NO
1 Verification of Sampling Theorem in time and frequency domains
3 To perform basic operations on given sequences- Signal folding, evaluation of even and odd
signals
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5. Solution of a difference equation.
7 Computation of N- point DFT and IDFT of a given sequence by use of (a) Defining equation; (b)
FFT method
8 Evaluation of circular convolution of two sequences using DFT and IDFT approach.
9 Design and implementation of IIR filters to meet given specification (Low pass, high pass, band
pass and band reject filters).
10 Design and implementation of FIR filters to meet given specification (Low pass, high pass, band
pass and band reject filters) using different window functions.
11 Design and implementation of FIR filters to meet given specification (Low pass, high pass, band
pass and band reject filters) using frequency sampling technique.
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5. Digital Signal Processing, Ashok Amberdar, Cengage, 1st Edition, 2007.
6. Digital Signal Processing, Tarun Kumar Rawat, Oxford, 1st Edition, 2015.
MOOCs
1. https://nptel.ac.in/courses/117102060
CIE for the theory component of the IPCC (maximum marks 50)
IPCC means practical portion integrated with the theory of the course.
CIE marks for the theory component are 25 marks and that for the practical component is 25 marks.
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two
Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the
theory component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks
for the test to be conducted after the completion of all the laboratory sessions.
On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of
all experiments’ write-ups are added and scaled down to 15 marks.
The laboratory test (duration 02/03 hours) after completion of all the experiments shall be conducted
for 50 marks and scaled down to 10 marks.
Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
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papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have
a CIE component only. Questions mentioned in the SEE paper may include questions from the
practical component.
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Annexure-II 1
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Annexure-II 2
Controlled Rectifiers: Introduction, Single phase half wave circuit with RL Load, Single phase half wave
circuit with RL Load and Freewheeling Diode, Single phase half wave circuit with RLE Load, Single-Phase
Full Converters with RLE Load, Single-Phase Dual Converters, Principle of operation of Three- Phase duel
Converters.
AC Voltage Controllers: Introduction, Principle of phase control & Integral cycle control, Single-Phase Full-
Wave Controllers with Resistive Loads, Single- Phase Full-Wave Controllers with Inductive Loads, Three-
Phase Full-Wave Controllers.
Module-5
DC-DC Converters: Introduction, principle of step down chooper with R and RL load; principle of step up
chopper with R load, Control strategies, performance parameters, DC-DC converter classification.
DC-AC Converters: Introduction, principle of operation single phase bridge inverters, performance
parameters, three phase bridge inverters, voltage control of single phase inverters, Harmonic reductions,
Current source inverters.
Course outcome (Course Skill Set)
At the end of the course the student will be able to :
1 To give an overview of applications power electronics, different types of power semiconductor devices,
their switching characteristics, power diode characteristics, types, their operation and the effects of
power diodes on RL circuits.
2 To explain the techniques for design and analysis of single phase diode rectifier circuits.
3 To explain different power transistors, their steady state and switching characteristics and limitations.
4 To explain different types of Thyristors, their gate characteristics and gate control requirements.
5 To explain the design, analysis techniques, performance parameters and characteristics of controlled
rectifiers, DC- DC, DC -AC converters and Voltage controllers.
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Annexure-II 3
Semester-End Examination:
Theory SEE will be conducted by the University as per the scheduled timetable, with common question papers
for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 4
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Template for Practical Course and if AEC is a practical Course Annexure-V
3 Characteristic of TRIAC.
5 SCR digital triggering circuit for a single phase controlled rectifier and ac voltage regulator.
Single phase controlled full wave rectifier with R load, R –L load, R-L-E load with and without freewheeling
6
diode.
7 AC voltage controller using TRIAC and DIAC combination connected to R and RL loads.
11 Speed control of a separately excited D.C. Motor using an IGBT or MOSFET chopper.
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Template for Practical Course and if AEC is a practical Course Annexure-V
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Annexure-II 1
1. To understand the conduction and breakdown mechanism in gases, liquid and solid dielectrics.
2. To know about the generation of high voltages and currents and their measurement.
3. To understand the various types of over voltages phenomena and protection methods.
4. To discuss non-destructive testing of materials and electric apparatus.
5. To discuss high-voltage testing of electrical equipment
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Annexure-II 2
Generation of High Direct Current Voltages: Voltage Doubler circuit, Voltage multiplier
circuit- Cockcroft Walton circuit, Ripple and voltage drop in multiplier circuit. Vandegraaff
generator.
Generation of High Alternating Voltages: Cascade transformers, Resonant transformers,
Tesla coil.
Generation of Impulse Voltages and currents: Standard impulse wave, Circuit for producing
impulse waves- Analysis of impulse generator RLC circuit, Wave shape control, Marx circuit ,
Generation of impulse current: standard impulse current wave ,Circuit for producing impulse
current wave.
Module-3
Measurement of High DC Voltages and Currents: Measurement of High DC Voltages –
Series Resistance micro ammeter, Resistance potential divider, Generating voltmeter.
Measurement of High AC voltages- Series impedance voltmeter, Series capacitance voltmeter,
Capacitance potential dividers, Capacitance voltage transformers. Electrostatic voltmeter, series
capacitance peak voltmeter (chubb-Fortscue method), Spark gaps for measurement of High dc,
ac and Impulse voltages - Spark gap measurements, Factors influencing the spark over voltage of
sphere gaps.
Measurement of Impulse Voltages – Resistance potential dividers, capacitance voltage
dividers, Mixed R-C potential dividers Peak reading voltmeters for impulse voltages.
Measurement of High DC, AC and impulse Currents - Hall generator, Resistive shunt,
Rogowski coils and Magnetic links.
Module-4
Natural Causes for Over voltages
Lightning phenomenon –Charge formation in the clouds, Mechanism of lightning strokes,
Mathematical model for lighting, Over voltages due to indirect stroke.
Power frequency Overvoltage – Sudden load rejection, Ferranti effect. Control of over voltages
due to switching.
Protection of transmission lines against over voltages- Using shielded or ground wires,
Ground rods and counter poise wires, Surge arresters -Protector tubes, Nonlinear element surge
arrestor.
Module-5
Non-Destructive Testing of Materials and Electrical Apparatus
Power frequency measurements- Schering bridge for audio frequency, transformer ratio arm
bridge. Partial discharge measurements- straight discharge detection, Balance detection.
High Voltage Testing of Electrical Apparatus-Testing of insulators, bushings, circuit breakers,
cables. Testing of transformers- Impulse test, Tests on surge arrestors.
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Annexure-II 3
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module(total for 100
marks).
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 4
Textbook:
1. High Voltage Engineering M.S. Naidu, V.Kamaraju McGraw Hill 5th Edition, 2013.
2. High Voltage Engineering Wadhwa C.L. New Age International 3rd Edition, 2012
Reference Books:
3. High Voltage Engineering Farouk A.M. Rizk CRC Press 1st Edition2014
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Annexure-II 1
Module-3
Wind Energy Conversion: Wind Turbine characteristics, Grid requirement for Wind, PMSM
and DFIG for wind generators, Power electronic converters for PMSM and DFIG, Control
techniques, MPPT, Grid connected and Islanding mode.
Module-4
Qualitative study of other renewable energy resources: Ocean energy, Biomass energy, Hydrogen
energy, Fuel cells: Operating principles and characteristics
Module-5
Converters for PV systems- front end buck boost, boost converters, bridge in verters for feeding the grid,
Stand-alone PV systems, Grid integrated solar PV Systems – Grid Connection Issues, line side and
machine side converters for wind energy systems.
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Annexure-II 2
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions of 20 marks, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 3
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Annexure-II 1
Module-1
Introduction to Electric Vehicles : Electric Vehicle – Need - Types – Cost and Emissions –
End of life. Electric Vehicle Technology – layouts, cables, components, Controls. Batteries –
overview and its types. Battery plug-in and life. Ultra-capacitor, Charging – Methods and
Standards. Alternate charging sources – Wireless & Solar.
Module-2
Electric Vehicle Motors: Motors (DC, Induction, BLDC) – Types, Principle, Construction,
Control. Electric Drive Trains (EDT) – Series HEDT (Electrical Coupling) – Power Rating
Design, Peak Power Source (PPS); Parallel HEDT (Mechanical Coupling) – Torque Coupling
and Speed Coupling. Switched Reluctance Motors (SRM) Drives – Basic structure, Drive
Convertor, Design.
Module-3
Electronics and Sensor-less control in EV: Basic Electronics Devices – Diodes, Thyristors,
BJTs, MOSFETs, IGBTs, Convertors, Inverters. Safety – Risks and Guidance, Precautions,
High Voltage safety, Hazard management. Sensors - Autonomous EV cars, Selfdrive Cars,
Hacking; Sensor less – Control methods- Phase Flux Linkage-Based Method, Phase Inductance
Based, Modulated Signal Injection, Mutually Induced Voltage-Based, Observer-Based.
Module-4
Hybrid Vehicles: Hybrid Electric vehicles – Classification – Micro, Mild, Full, Plug-in, EV.
Layout and Architecture – Series, Parallel and Series-Parallel Hybrid, Propulsion systems and
components. Regenerative Braking, Economy, Vibration and Noise reduction. Hybrid Electric
Vehicles System – Analysis and its Types, Controls.
Module-5
Fuel Cells for Electric vehicles: Fuel cell – Introduction, Technologies & Types, Obstacles.
Operation principles, Potential and I-V curve, Fuel and Oxidation Consumption, Fuel cell
Characteristics – Efficiency, Durability, Specific power, Factors affecting, Power design of fuel
Cell Vehicle and freeze capacity. Lifetime cost of Fuel cell Vehicle – System, Components,
maintenance.
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Annexure-II 2
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions totaling to 100 marks, selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1. Jack Erjavec and Jeff Arias, “Hybrid, Electric and Fuel Cell Vehicles”, Cengage Learning, 2012.
2. Mehrdad Ehsani, Yimin Gao, sebastien E. Gay and Ali Emadi, “Modern Electric, Hybrid Electric
and Fuel Cell Vehicles: Fundamentals, Theory and Design”, CRC Press, 2009.
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Annexure-II 3
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FUNDAMENTALS OF VLSI DESIGN Semester 5
Course Code BEE515D CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE)
Course objectives:
Impart knowledge of mass transistors theory and CMOS technology.
Understand the basic electrical properties of mass and BICMOS circuits.
Cultivate the concept of subsystem design and layout processes .
Understand the concept of design process computational elements.
Module-1
Moore’s law, speed power performance, nMOS fabrication, CMOS fabrication: n-well, p-well processes,
BiCMOS, Comparison of bipolar and CMOS.
Basic Electrical Properties of MOS And BiCMOS Circuits: Drain to source current versus voltage
characteristics, threshold voltage, transconductance.
Module-2
Basic Electrical Properties of MOS And BiCMOS Circuits: nMOS inverter, Determination of pull up to pull
down ratio, nMOS inverter driven through one or more pass transistors, alternative forms of pull up, CMOS
inverter, BiCMOS inverters, latch up.
Basic Circuit Concepts: Sheet resistance, area capacitance calculation, Delay unit, inverter delay, estimation
of CMOS inverter delay, driving of large capacitance loads, super buffers, BiCMOS drivers.
Module-3
MOS and BiCMOS Circuit Design Processes: MOS layers, stick diagrams, nMOS design style, CMOS design
style, design rules and layout, λ - based design.
Scaling of MOS Circuits: scaling factors for device parameters, limitations of scaling.
Module-4
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Subsystem Design and Layout-1 : Switch logic pass transistor, Gate logic inverter, NAND gates, NOR gates,
pseudo nMOS, Dynamic CMOS, example of structured design, Parity generator, Bus arbitration, multiplexers,
logic function block, code converter.
Subsystem Design and Layout-2 : Clocked sequential circuits, dynamic shift registers, bus lines, subsystem
design processes, General considerations, 4-bit arithmetic processes, 4-bit shifter.
Module-5
Design Process-Computational Elements: Regularity, design of ALU subsystem, ALU using adders, carry
look ahead adders, Multipliers, serial parallel multipliers, Braun array, Bough – Wooley multiplier.
Memory, Register and Aspects of Timing: Three Transistor Dynamic RAM cell, Dynamic memory cell,
Pseudo- Static RAM, JK Flipflop, D Flip-flop circuits, RAM arrays, practical aspects and testability: Some
thoughts of performance, optimization and CAD tools for design and simulation
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Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer for 100 marks ( 5 full questions), selecting one full question from each
module.
4. Marks
Suggested scoredResources:
Learning shall be proportionally reduced to 50 marks.
Books
1. Basic VLSI Design -3rd Edition, Douglas A Pucknell, Kamaran Eshraghian, Prentice Hall of India
publication, 2005.
2. CMOS Digital Integrated Circuits, Analysis And Design, 3rd Edition, Sung – Mo (Steve) Kang, Yusuf
Leblbici, Tata McGraw Hill, 2002.
3. VLSI Technology - S.M. Sze, 2nd edition Tata McGraw Hill, 2003.
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. .VTU e-shikshana programme
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TEMPLATE for IPCC (26.04.2022) Annexure-III
To introduce the per unit system and explain its advantages and computation.
To explain the concept of one line diagram and its implementation in problems.
To explain the necessity and conduction of short circuit analysis.
To explain analysis of three phase symmetrical faults on synchronous machine and simple
power systems.
To discuss selection of circuit breaker.
To explain symmetrical components, their advantages and the calculation of symmetrical
components of voltages and currents in un-balanced three phase circuits.
To explain the concept of sequence impedance and its analysis in three phase unbalanced
circuits.
To explain the concept of sequence networks and sequence impedances of an unloaded
synchronous generator, transformers and transmission lines.
To explain the analysis of synchronous machine and simple power systems for different
unsymmetrical faults using symmetrical components.
To discuss the dynamics of synchronous machine and derive the power angle equation for a
synchronous machine.
Discuss stability and types of stability for a power system and the equal area criterion for the
evaluation of stability of a simple system.
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TEMPLATE for IPCC (26.04.2022) Annexure-III
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TEMPLATE for IPCC (26.04.2022) Annexure-III
Sl.NO Experiments
1 Write a program to drawpower angle curves for salient and non-salient pole synchronous
machines, reluctance power, excitation, EMF and regulation.
2
Write a program to calculate Sag of a transmission line for
i)Poles at equal height ii)Poles at unequal height
3 Write a program to determinethe efficiency, Regulation, ABCD parameters for short and long
transmission line and verify AD-BC=1.
4 Write a program to determinethe efficiency, Regulation and ABCD parameters for medium
transmission line for i) П- configuration ii) T- Configuration and verify AD-BC=1.
5 Write a program to calculate sequence components of line voltages given the unbalanced
phase voltages.
6 Write a program to calculate the sequence components of line currents, given the unbalanced
phase currents in a three phase i) 3-wire system ii) 4 wire system.
7 Determination of fault currents and voltages in a single transmission line for
i) Single Line to Ground Fault. ii)Line to Line Fault
iii) Double Line to Ground Fault Using suitable simulating software package.
8 Determination of fault currents and voltages in a single transmission line for Three phase Fault
Using suitable simulating software package.
9 Write a program to obtain critical disruptive voltage for various atmospheric and conductor
conditions.
10 Write a program to evaluate transient stability of single machine connected to infinite bus
using equal area criterion.
Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
Model the power system components &construct per unit impedance diagram of power
system.
Analyse three phase symmetrical faults on power system.
Compute unbalanced phasors in terms of sequence components and vice versa, also develop sequence
networks.
Analyse various unsymmetrical faults on power system.
Examine dynamics of synchronous machine and determine the power system stability..
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). The student is declared as a pass in the course if
he/she secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.
The IPCC means the practical portion integrated with the theory of the course. CIE marks for the theory component
are 25 marks and that for the practical component is 25 marks.
CIE for the theory component of the IPCC
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two Tests,
each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other assessment methods
mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the syllabus and the second test after
covering 85-90% of the syllabus.
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TEMPLATE for IPCC (26.04.2022) Annexure-III
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the theory
component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks for the
test to be conducted after the completion of all the laboratory sessions.
On completion of every experiment/program in the laboratory, the students shall be evaluated including viva-
voce and marks shall be awarded on the same day.
The CIE marks awarded in the case of the Practical component shall be based on the continuous evaluation of
the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of all experiments’ write-
ups are added and scaled down to 15 marks.
The laboratory test (duration 02/03 hours) after completion of all the experiments shall be conducted for 50
marks and scaled down to 10 marks.
Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory component of
IPCC for 25 marks.
The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3
sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have a CIE
component only. Questions mentioned in the SEE paper may include questions from the practical
component.
The minimum marks to be secured in CIE to appear for SEE shall be 10 (40% of maximum marks-25) in the
theory component and 10 (40% of maximum marks -25) in the practical component. The laboratory
component of the IPCC shall be for CIE only. However, in SEE, the questions from the laboratory
component shall be included. The maximum of 04/05 sub-questions are to be set from the practical
component of IPCC, the total marks of all questions should not be more than 20 marks.
SEE will be conducted for 100 marks and students shall secure 35% of the maximum marks to qualify for
the SEE. Marks secured will be scaled down to 50.
The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100)
in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
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TEMPLATE for IPCC (26.04.2022) Annexure-III
Reference Books
1. Elements of Power System, William D. Stevenson Jr, McGraw Hill, 4th Edition, 1982.
2. Power System Analysis and Design, J. Duncan Gloveretal, Cengage, 4th Edition, 2008.
3. Power System Analysis, Hadi Sadat, McGraw Hill,1stEdition,2002.
Web links and Video Lectures (e-Resources):
https://nptel.ac.in/courses/108104051
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
Activity Based Learning, Quizzes, Seminars.
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74
CONTROLSYSTEMS (PCC)
Subject Code BEE602 IA Marks 50
Number of Lecture Hours/Week 04 Exam Hours 03
Total Number of Lecture Hours 50 ExamMarks 50
Credits 04 Exam Hours 03
Course objectives:
(1)To analyze and model electrical and mechanical system using analogous systems.
(2) To formulate transfer functions using block diagram and signal flow graphs.
(3) To analyze the transient and steady state time response.
(4) To illustrate the performance of a given system in time and frequency domains, stability analysis using Root
locus and Bode plots.
(5) To discuss stability analysis using Nyquist plots, Design controller and compensator for a given specification.
Module-1 Teaching
Hours
Introduction to control systems: Introduction, classification of control systems. 10
Mathematical models of physical systems: Modeling of mechanical system elements, electrical
systems, Analogous systems, Transfer function, Single input single output systems, Procedure for
Deriving transfer functions, servomotors, synchros, gear trains.
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel
Module-2
Block diagram: Elements of Block Diagram, Block diagram of a closed loop system, Block diagram 10
reduction techniques, procedure for drawing block diagram and block diagram reduction to find
transfer function. Numerical.
Signal flow graphs: Construction of signal flow graphs, definition of some important terms, basic
properties of signal flow graph, Mason’s gain formula, signal flow graph algebra, construction of
signal flow graph for control systems. Numerical
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel
Module-3
Time Domain Analysis: Introduction, Standard test signals, time response of first order systems, 10
time response of second order systems, types of control systems, steady state errors and error
constants, Approximation of higher order systems and step response of second order systems with
zero’s.
Routh Stability criterion: BIBO stability, Necessary conditions for stability, Routh stability
criterion, difficulties in formulation of Routh table, application of Routh stability criterion to linear
feedback systems, relative stability analysis. Numerical
RevisedBloom’s L2–Understanding,L3–Applying,L4–Analysing,L5–Evaluating.
TaxonomyLevel
Module-4
Root locus : Introduction, root locus concepts, construction of root loci, rules for the construction of 10
root locus. Numerical
Frequency domain analysis: Introduction, Co-relation between time and frequencyresponse–
2ndorder systems only.
Bode plots: Basic factors G(iw)/H(jw), General procedure for constructing Bode plots, computation
of gain margin and phase margin. Numerical
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel
Module-5 Teaching
Hours
Nyquistplot: Introduction, Principle of argument, Nyquist stability criterion, assessment of relative 10
stability using Nyquist criterion.
Design of Control Systems: Introduction, Design with the PD Controller, Design with the PI
Controller, Design with the PID Controller, Design with Phase-Lead Controller ,Design with Phase
-Lag Controller, Design with Lead-Lag Controller.∎
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel
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75
There are 25 marks for the CIE's Assignment component and 25 for the Internal
Assessment Test component.
Each test shall be conducted for 25 marks. The first test will be administered after 40-50%
of the coverage of the syllabus, and the second test will be administered after 85-90% of
the coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments
shall be planned properly by the course teacher. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned. Each assignment
shall be conducted for 25 marks. (If two assignments are conducted then the sum of the
two assignments shall be scaled down to 25 marks)
The final CIE marks of the course out of 50 will be the sum of the scale-down marks of
tests and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers
for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions(for 100 marks), selecting one full question from each
module.
Marks scored shall be proportionally reduced to 50 marks.
Textbook
1 Control Systems Anand Kumar PHI 2ndEdition,2014
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Reference Books
1 Automatic Control Systems Farid Golnaraghi, Wiley 9thEdition,2010
Benjamin C.Kuo
2 Control Systems Engineering Norman S.Nise Wiley 4thEdition,2004
3 Modern Control Systems Richard C D orfetal Pearson 11thEdition,2008
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Annexure-II
Module-1
Substation Basics
Substation Introduction and Classifications, Busbar Types in Outdoor Switchyard, Outdoor
/Indoor Substation - Auxiliary Equipment in a Substation, Standards and Practices, Factors
Influencing Substation Design -Different factors like Altitude, Ambient Temperature etc. with
animation, Selection of Dielectric Strength for Electrical Equipment with animation on
creepage distance, Testing of Electrical Equipment, Concepts of Single Line Diagram.
Module-2
Transformers and Switchgears
Classification of Transformers with a practical overview, Transformer Percentage Impedance
and Losses, Construction including busbar arrangement and safety features, Classifications of
MV Switchgear and Key Design Parameters, MV Switchgear Construction, LV Compartment,
Security Interlocks & General Arrangement, Control Circuit Components - Control Relays,
Time Delay Relays & Latched Relays), Control Scheme Basics, Trip Lockout, TCS and Anti-
pumping Circuits, Logic Schemes.
Module-3
Protection and Station Auxiliary equipment and Digital Substation
Power System Network, Protection System, Overcurrent and Earth Fault, Overcurrent and
Earth Fault – Coordination. Distribution Feeder Protection, Transformer – Unit/Main
Protection, Transformer Protection, Familiarization of NUMERICAL Relays, Diesel Generator
System, Instrument transformers (CT), Basics of AC/DC Auxiliary Power System & Sizing of
Aux. Transformer, DC System Components, Battery Sizing & charger Sizing, DG Set
Classification, and sizing. Evolution of Substation Automation, Communication System
Fundamentals, Substation Automation System: DI, DO, AI, AO, Remote Terminal Unit –
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Annexure-II
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Annexure-II
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 maks), selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1. Partap Singh Satnam, P.V. Gupta, “Sub-station Design and Equipment”, Dhanpat Rai
Publications, 1 st Edition, 2013
2. Sunil S. Rao, “Switchgear Protection and Power Systems (Theory, Practice & Solved
Problems)”, Khanna Publications, 14th Edition, 2019.
3. Electrical substation and engineering & practice by S. Rao, Khanna Publishers 2015
4. McDonald John D, “Electric Power Substations Engineering,” CRC Press, 3 rd. Edition,
2012
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Annexure-II
.
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1
Module-2
Characteristics and quality attributes of embedded systems: Characteristics, Operational and
nonoperational quality attributes, application specific embedded system - washing machine, domain
specific – automotive Chapter 3 & 4 – Text 1
Module-3
Hardware Software Co design and Program Modelling : Fundamental issues in Hardware
Software Co-design, Computational models in Embedded System Design Chapter 7 – Text 1: 7.1, 7.2
Embedded Hardware Design and Development: Analog Electronic Components, Digital Electronic
Components, VLSI & Integrated Circuit Design, Electronic Design Automation Tools
Chapter 8 – Text 1: 8.1, 8.2, 8.3, 8.4
Module-4
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2
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 marks), selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1.Shibu K V, “Introduction to Embedded Systems”, Second Edition, McGraw Hill Educatiion
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3
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Annexure-II 1
To learn multi level topology (Symmetry &Asymmetry) with common DC bus link.
To study the working of cascaded H-Bridge, Diode Clamped and Flying Capacitor MLI.
To study the working of MLI with reduced switch count.
To simulate three level diode clamped MLI and there level flying capacitor based MLI
with resistive and reactive load
To simulate the MLI with reduced switch count.
Module-4
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Annexure-II 2
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Annexure-II 3
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of
3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 marks), selecting one full question from each module.
4. Marks scored shall be proportionally reduced to50 marks.
MarianP.Kazmierkowski,R.KrishnanandF.Blaabjerg,“ControlinPowerElectronics”,AcademicPress,
ElsevierScience,2002.
4. Euzeli Cipriano dos Santos Jr.andEdison RobertoCabral Da Silva “Advanced Power Electronics Converters -
PWM Converters Processing AC Voltages”, Willey – IEEE Press, 2014.
5. Muhammad H. Rashid,“PowerElectronicsHandbook”,Elsevier,3rded.,2011.
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Annexure-II 1
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Annexure-II 2
DC Motor Drives:
Operating principle, Speed characteristics of DC motors,
Combined Armature Voltage and Field Control, Chopper Control of DC Motors.
Control Methods- Two-Quadrant Control -Single Chopper with a Reverse Switch,
Class C Two-Quadrant Chopper,Four-Quadrant control.
Module-4
Induction Motor Drives:
Basic Operation Principles of Induction Motors , Steady-State Performance
Constant v/f Control, Power Electronic Control.
Field Orientation Control(FOC)
Principles of FOC,Control methods- Direction Rotor Flux control, Indirect Rotor Flux control,
Voltage Source Inverter control - Voltage Control, Current Control.
Module-5
BLDC Motor Drives:
BLDC Machine Construction and Classification, Performance Analysis, Control of BLDC
Motor Drives.
Control Techniques - Methods Using Observers, Methods Using Back EMF Sensing.
Switched Reluctance Motor Drives (SRM)-Basic Magnetic Structure, Torque Production,
Methods of Control -Phase Flux Linkage Method, Mutually Induced Voltage Method,
Observer-Based Method, Self-Tuning Using an Artificial Neural Network.
Course outcome (Course Skill Set)
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Annexure-II 3
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Annexure-II 4
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Annexure-II 1
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Annexure-II 2
Module-4
Braking: Introduction, Regenerative Braking with Three Phase Induction Motors, Braking with Single
Phase Series Motors, Mechanical braking, Magnetic Track Brake, Electro – Mechanical Drum Brakes.
Electric Traction Systems and Power Supply: System of Electric Traction AC Electrification,
Transmission Lines to Sub - Stations, Sub – Stations, Feeding and Distribution System of AC Traction Feeding
and Distribution System for DC Tramways, Electrolysis by Currents through Earth, Negative Booster, System
of Current Collection, Trolley Wires.
Trams, Trolley Buses and Diesel – Electric Traction: Tramways, The Trolley – Bus, Diesel Electric Traction.
Module-5
Electric Vehicles: Configurations of Electric Vehicles, Performance of Electric Vehicles, Tractive Effort
in Normal Driving, Energy Consumption.
Hybrid Electric Vehicles: Concept of Hybrid Electric Drive Trains, Architectures of Hybrid Electric Drive
Trains.
Course outcome (Course Skill Set)
At the end of the course the student will be able to :
1. Discuss different methods of electric heating & welding.
2. Discuss the laws of electrolysis, extraction, refining of metals and electro deposition process.
3. Discuss the laws of illumination, different types of lamps, lighting schemes and design of lighting systems.
Analyze systems of electric traction, speed time curves and mechanics of train movement.
4. Explain the motors used for electric traction, their control & braking and power supply system used for
electric traction.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Continuous Internal Evaluation:
There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
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Annexure-II 3
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 1
Module-1
Introduction: Causes of Energy Scarcity, Solution to Energy Scarcity, Factors Affecting Energy Resource
Development, Energy Resources and Classification, Renewable Energy – Worldwide Renewable Energy
Availability, Renewable Energy in India.
Energy from Sun: Sun- earth Geometric Relationship, Layer of the Sun, Earth – Sun Angles and their
Relationships, Solar Energy Reaching the Earth’s Surface, Solar Thermal Energy Applications.
Module-2
Solar Thermal Energy Collectors: Types of Solar Collectors, Configurations of Certain Practical Solar
Thermal Collectors, Material Aspects of Solar Collectors, Concentrating Collectors, Parabolic Dish – Stirling
Engine System, Working of Stirling or Brayton Heat Engine, Solar Collector Systems into Building Services,
Solar Water Heating Systems, Passive Solar Water Heating Systems, Applications of Solar Water Heating
Systems, Active Solar Space Cooling, Solar Air Heating, Solar Dryers, Crop Drying, Space Cooing, Solar
Cookers, Solar pond.
Solar Cells: Components of Solar Cell System, Elements of Silicon Solar Cell, Solar Cell materials, Practical
Solar Cells, I – V Characteristics of Solar Cells, Efficiency of Solar Cells, Photovoltaic panels (series and parallel
arrays).
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Annexure-II 2
Module-3
Hydrogen Energy: Benefits of Hydrogen Energy, Hydrogen Production Technologies, Hydrogen Energy
Storage, Use of Hydrogen Energy, Advantages and Disadvantages of Hydrogen Energy, Problems
Associated with Hydrogen Energy.
Wind Energy: Windmills, Wind Turbines, Wind Resources, Wind Turbine Site Selection.
Geothermal Energy: Geothermal Systems, Classifications, Geothermal Resource Utilization, Resource
Exploration, Geothermal Based Electric Power Generation, Associated Problems, environmental Effects.
Solid waste and Agricultural Refuse: Waste is Wealth, Key Issues, Waste Recovery Management
Scheme, Advantages and Disadvantages of Waste Recycling, Sources and Types of Waste, Recycling
of Plastics.
Module-4
Biomass Energy: Biomass Production, Energy Plantation, Biomass Gasification, Theory of
Gasification, Gasifier and Their Classifications, Chemistry of Reaction Process in Gasification, Updraft,
Downdraft and Cross-draft Gasifiers, Fluidized Bed Gasification, Use of Biomass Gasifier, Gasifier
Biomass Feed Characteristics, Applications of Biomass Gasifier, Cooling and Cleaning of Gasifiers.
Biogas Energy: Introduction, Biogas and its Composition, Anaerobic Digestion, Biogas Production,
Benefitsof Biogas, Factors Affecting the Selection of a Particular Model of a Biogas Plant, Biogas Plant Feeds
and theirCharacteristics.
Tidal Energy: Introduction, Tidal Energy Resource, Tidal Energy Availability, Tidal Power
Generation in India, Leading Country in Tidal Power Plant Installation, Energy Availability in Tides, Tidal
Power Basin, Turbines for Tidal Power, Advantages and Disadvantages of Tidal Power, Problems
Faced in Exploiting Tidal Energy.
Module-5
Sea Wave Energy: Introduction, Motion in the sea Waves, Power Associated with Sea Waves, Wave Energy
Availability, Devices for Harnessing Wave Energy, Advantages and Disadvantages of Wave Power.
Ocean Thermal Energy: Introduction, Principles of Ocean Thermal Energy Conversion (OTEC), Ocean
Thermal Energy Conversion plants, Basic Rankine Cycle and its Working, Closed Cycle, Open Cycle
and Hybrid Cycle, Carnot Cycle, Application of OTEC in Addition to Produce Electricity, Advantages,
Disadvantages and Benefits of OTEC.
Course outcome (Course Skill Set)
At the end of the course the student will be able to :
1. Discuss causes of energy scarcity and its solution, energy resources and availability of renewable
energy. Outline energy from sun, energy reaching the Earth’s surface and solar thermal energy
applications.
2. Discuss types of solar collectors, their configurations, solar cell system, its characteristics and their
applications.
3. Explain generation of energy from hydrogen, wind, geothermal system, solid waste and agriculture
refuse.
4. Discuss production of energy from biomass, biogas.
5. Summarize tidal energy resources, sea wave energy and ocean thermal energy.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
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Annexure-II 3
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 marks), selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 1
Module-3
Generalized Control Theory: Servo Block Diagrams, Frequency-Response Characteristics and Construction
of Approximate (Bode) Frequency Charts, Nichols Charts, Servo Analysis Techniques, Servo Compensation.
Indexes of Performance: Definition of Indexes of Performance for Servo Drives, Indexes of Performance
for Electric and Hydraulic Drives.
Module-4
Performance Criteria: Percent Regulation, Servo System Responses.
Servo Plant Compensation Techniques: Dead-Zone Nonlinearity, Change-in-Gain Nonlinearity, Structural
Resonances, Frequency Selective Feedback, Feed forward Control. Machine Considerations: Machine feed
drive Considerations, Ball Screw Mechanical Resonances and Reflected Inertias for Machine Drives.
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Annexure-II 2
Module-5
Machine Considerations: Drive Stiffness, Drive Resolution, Drive Acceleration, Drive Speed
Considerations, Drive Ratio Considerations, Drive Thrust/Torque And Friction Considerations, Drive Duty
Cycles.
Course outcome (Course Skill Set)
1. Explain the evolution and classification of servos, with descriptions of servo drive actuators,
amplifiers,feedback transducers, performance, and troubleshooting techniques.
2. Discuss system analogs, vectors and transfer functions of differential equations.
3. Discuss mathematical equations for electric servo motors, both DC and brushless DC servo motors.
4. Represent servo drive components by their transfer function, to combine the servo drive building
blocksinto system block diagrams.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions for 100 marks, selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 3
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SEMICONDUCTOR DEVICES Semester VI
Course Code BEE654D CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
Course objectives:
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Power Diodes: Introduction, Basic Structure and I – V characteristics, Breakdown Voltage
Considerations, On –State Losses, Switching Characteristics, Schottky Diodes.
Bipolar Junction Transistors: Introduction, Vertical Power Transistor Structures, Z-V
Characteristics, Physics of BJT Operation, Switching Characteristics, Breakdown Voltages,
Second Breakdown, On-State Losses, Safe Operating areas.
Power MOSFETs : Introduction, Basic Structure, I-V Characteristics, Physics of Device
Operation, Switching Characteristics, Operating Limitations and Safe Operating Areas
Module-3
Thyristors: Introduction, Basic Structure, I-V Characteristics, Physics of Device Operation,
Switching Characteristics, Methods of Improving di/dt and dv/dt Ratings.
Gate Turn-Off Thyristors: Introduction, Basic Structure and Z-V Characteristics,
Physics of Turn-Off Operation, GTO Switching Characteristics, Overcurrent Protection of GTOs.
Insulated Gate Bipolar Transistors: Introduction, Basic Structure, I-V Characteristics, Physics
of Device Operation, Latchup in IGBTs, Switching Characteristics, Device Limits and SOAs.
Emerging Devices and Circuits: Introduction, Power Junction Field Effect Transistors, Field-
Controlled Thyristor, JFET-Based Devices versus Other Power Devices, MOS-Controlled
Thyristors, Power Integrated Circuits, New Semiconductor Materials for Power Devices
Module-4
Snubber Circuits: Function and Types of Snubber Circuits, Diode Snubbers, Snubber Circuits
for Thyristors, Need for Snubbers with Transistors, Turn-Off Snubber, Overvoltage Snubber,
Turn-On Snubber, Snubbers for Bridge Circuit Configurations, GTO Snubber Considerations.
Gate and Base Drive Circuits: Preliminary Design Considerations, dc-Coupled Drive Circuits,
Electrically Isolated Drive Circuits, Cascode-Connected Drive Circuits, Thyristor Drive Circuits,
Power Device Protection in Drive Circuits, Circuit Layout Considerations
Module-5
Component Temperature Control and Heat Sinks: Control of Semiconductor Device
Temperatures, Heat Transfer by Conduction, Heat sinks, Heat Transfer by Radiation and
Convection.
Design of Magnetic Components: Magnetic Materials and Cores, Copper Windings, Thermal
Considerations, Analysis of a Specific Inductor Design, Inductor Design Procedures, Analysis of
a Specific Transformer Design, Eddy Currents, Transformer Leakage Inductance, Transformer
Design Procedure, Comparison of Transformer and Inductor Sizes
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circuits of power semiconductor devices; thyristors, power IGBT, power FET
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions for 100 marks, selecting one full question from each
module.
4. Marks
Suggested scoredResources:
Learning shall be proportionally reduced to 50 marks.
Books
1. . Power Electronics, Daniel W Hart, McGraw Hill.
2. Power Electronics Converters, Applications, and Design, Ned Mohan et al, Wiley, 3rd
Edition, 2014.
3. Semiconductor Device Modeling with Spice, G. Massobrio, P. Antognetti, McGraw-Hill,
2nd Edition, 2010.
4. Power Semiconductor Devices, B. Jayant Baliga, Springer, 2008.
5. Power Electronics Principles and Applications, Joseph Vithayathil, McGraw-Hill, 2011.
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.
Youtube videos
NPTEL lecturers
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B. E. ELECTRICAL AND ELECTRONICS ENGINEERING
Choice Based Credit System (CBCS) and Outcome Based Education (OBE)
SEMESTER – VI
CONTROL SYSTEM LABORATORY
Course Code BEEL606 CIE Marks 50
Number of Practical Hours/Week(L:T:P) 0.0.2
SEE Marks 50
Credits 01 Exam Hours 03
Course Learning Objectives:
To draw the speed torque characteristics of AC and DC servo motor.
To determine the time and frequency reposes of a given second order system using
discrete components.
To design and analyze Lead, Lag and Lag – Lead compensators for given specifications.
To study the feedback control system and to study the effect of P, PI, PD andPID controller
and Lead compensator on the step response of the system.
To s i m u l a t e a n d write a script files to plot root locus, bode plot, to study the stability of
the system
Sl. Experiments
NO
1 Experiment to draw the speed torque characteristics of (i) AC servo motor (ii) DC servo motor
2 Experiment to draw synchro pair characteristics
3 Experiment to determine frequency response of a second order system
4 (a) To design a passive RC lead compensating network for the given specifications, viz, the
maximum
phase lead and the frequency at which it occurs and to obtain the frequency response.
5 (a) To design a passive RC lag compensating network for the given specifications, viz, the
maximum phase lag and the frequency at which it occurs and to obtain the frequencyresponse.
(b) To determine experimentally the transfer function of the lag compensating network
6 Experiment to draw the frequency response characteristics of the lag – lead compensator
network and determination of its transfer function.
7 To study a second order system and verify the effect of (a) P, (b) PI, (c) PD and (d) PID controller on
the step response.
8 (a) To simulate a typical second order system and determine step response and evaluate time
response specifications.
(b) To evaluate the effect of adding poles and zeros on time response of second order system.
(c) To evaluate the effect of pole location on stability
9 (a) To simulate a D.C. Position control system and obtain its step response.
(b) To verify the effect of input waveform, loop gain and system type on steady state errors.
(c) To perform trade-off study for lead compensator.
(d) To design PI controller and study its effect on steady state error.
10 (a) To examine the relationship between open-loop frequency response and stability, open-loop
frequency and closed loop transient response
(b) To study the effect of open loop gain on transient response of closed loop system using
root locus.
11 (a) To study the effect of open loop poles and zeros on root locus contour
(b) Comparative study of Bode, Nyquist and root locus with respect to stability.
Note:
Sl. Description Experiment numbers
1 Perform experiments using suitable components/equipment’s 1&2
2 Perform experiments using suitable components/equipment’s and 3,4,5,6 and 7
verify the results using standard simulation package
3 Perform simulation only using standard package 8,9,10 and 11
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Course Outcomes: At the end of the course the student will be able to:
Utilize software package and discrete components in assessing the time and frequency
domain response of a given second order system.
Design, analyze and simulate Lead, Lag and Lag – Lead compensators for given
specifications.
Determine the performance characteristics of ac and DC servomotors and synchro-transmitter
receiver pair used in control systems.
Simulate the DC position and feedback control system to study the effect of P, PI, PD and
PID controller and Lead compensator on the step response of the system.
Develop a script files to plot Root locus, Bode plot and Nyquist plot to study the stability of
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE
minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to
have satisfied the academic requirements and earned the credits allotted to each subject/ course if the
student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.
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TEMPLATE for AEC (if the course is atheory) Annexure-IV
Module-2
Fundamentals of Energy Management Energy storage technologies for EVs - Lithium-ion
batteries; Solid-state batteries; Supercapacitors; Fuel cells. Battery charging and discharging
techniques - Charging infrastructure for EVs; Charging modes (AC and DC charging); Fast
charging vs. slow charging; Battery management systems (BMS). Energy efficiency and energy
loss analysis - Losses in power electronics and motor drive systems; Losses in battery systems;
Factors affecting energy efficiency in EVs.
Module-3
Advanced Energy Management Strategies State-of-charge (SoC) estimation and
management - SoC estimation techniques (Coulomb counting, Kalman filtering, etc.); SoC
balancing techniques; Impact of SoC on battery life and performance. Power management
strategies - Optimal power allocation between different vehicle systems; Dynamic power
allocation based on driving conditions; Power flow control in EVs. Regenerative braking and
energy recovery - Principles of regenerative braking; Control strategies for regenerative
braking; Energy recovery and utilization.
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TEMPLATE for AEC (if the course is atheory) Annexure-IV
Module-4
Optimization Techniques for Energy Management Optimization models for energy
management - Linear programming and nonlinear optimization; Model predictive control (MPC)
for energy management; Genetic algorithms and other heuristic optimization techniques.
Intelligent energy management systems - Artificial intelligence (AI) and machine learning
techniques for energy management; Reinforcement learning-based energy management; Data-
driven approaches for energy optimization. Realtime energy management algorithms - Real-time
optimization algorithms for energy allocation; Adaptive control strategies for energy
management; Integration of energy management with navigation systems.
Module-5
Case Studies and Applications Energy management in electric buses and fleet management
- Challenges and strategies for energy management in public transportation; Fleet management
and scheduling optimization. Energy management in electric vehicles charging infrastructure -
Smart charging stations and grid integration; Demand-side management and load balancing.
Emerging trends and future directions in energy management - Wireless charging technologies;
Vehicle-to-vehicle (V2V) communication for energy optimization; Advanced energy storage and
conversion technologies.
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understand and analyse the energy storage technologiesused in electric vehicles.
2. Understand the design and implementation of energy management strategies for electric
vehicles, considering factors such as battery charging, power allocation and regenerative
braking.
3. Understand optimization techniques and intelligent algorithms to optimize energy
management in electric vehicles, considering real-time constraints and factors such as
driving conditions and energy efficiency goals.
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TEMPLATE for AEC (if the course is atheory) Annexure-IV
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Templatefor Practical Course and if AEC is a practical Course Annexure-V
2 (a) Simulate a single phase half controlled full wave rectifier. Input 100V, 50 Hz. AC supply. At the out
put, resistance of 50 ohms.
(b) Simulate a single phase fully controlled full wave rectifier. Input 100V, 50 Hz. AC supply. At the out
put, resistance of 50 ohms.
3 Simulate a buck converter with 20 V DC input, and regulate the output at 10 V by implementing a PI
controller for closed loop operation. The out put power to vary from 10 W to 20 W. Ensure that voltage
ripple is limited to 1%.
4 Simulate a boost converter with 20 V DC input, and regulate the output at 35 V by implementing a PI
controller for closed loop operation. The out put power to vary from 30W to 60 W. Ensure that voltage
ripple is limited to 1%
5 Simulate a single phase AC voltage controller using a triac with 100V ,50 Hz. AC supply for an RL load of
10 oms and 2 mH.
6 Simulate a three phase inverter with 180 degree conduction mode with DC input of 100V and a star
connected balanced resistive of 40 ohms each. Use IGBT for inverter.
7 Simulate a single phase SPWM inverter with 50V DC input with modulation indices of 0.5, 0.6 and 0.8.
connect a resistance of 25 ohms at the output of inverter. Use power Mosfets for inverter.
8 Simulate a three phase inverter with 120 degree mode of conduction. Take input DC voltage of 100V and
three phase star connected balanced resistive load of 50 ohms each.
Demonstration Experiments ( For CIE )
9 In expt. 8. connect suitable LC filter at the output to obtain a sinusoidal output with THD of less than 8 %.
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Templatefor Practical Course and if AEC is a practical Course Annexure-V
10 Simulate a three phase SPWM inverter with 50V DC input with modulation indices of 0.5, 0.6 and 0.8.
connect a star connected resistances of 25 ohms each at the output of the inverter. Use power Mosfets for
inverter.
11 Simulate a three phase, 5 level, neutral point clamped (NPC) inverter. Input DC voltage is 100V. The
inverter output is connected to a balanced 3 phase resistive load of 40 Ohms each.
12 Simulate a forward converter with input DC voltage of 30 V. Take transformer ratio of 1.5:1. Observe the
output voltages for duty cycles of 0.4, 0.6 and 0.8. Ensure that the output voltage ripple is less than 0.5 V.
The load resistance is 10 Ohms.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Simulate any given power electronic circuit and evaluate its performance under different test conditions
and also observe the performance for different values of passive filtering elements used in the converter.
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Templatefor Practical Course and if AEC is a practical Course Annexure-V
https://in.mathworks.com/solutions/electrification/power-electronics-simulation.html
- This provides design examples for power electronics simulation using MATLAB
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Template for Practical Course and if AEC is a practical Course Annexure-V
Students shall select real time project/audit with the approval of the guide. The following shall be
considered by the students and guide while auditing.
(1) Building and Utility Data Analysis: The main purpose of this step is to evaluate the characteristics of
the energy systems and the patterns of energy use for the premises considered. The premises
characteristics can be collected from the architectural/ mechanical/electrical drawings and/or from
consultation/discussions with premises operators. The energy use patterns can be obtained from a
compilation of utility bills over a period.
(2) Walk-Through Survey: This step should identify potential energy savings measures. The results of this
stepare important since they determine if the building warrants any further energy auditing work. Some of
the tasks involved in this step are • Identify the customer’s concerns and needs • Check the current
operating and maintenance procedures • Determine the existing operating conditions of major energy use
equipment (lighting,HVAC systems, motors, etc.) • Estimate the occupancy, equipment, and lighting (energy
use density and hours of operation).
(3)Baseline for Building Energy Use: The main purpose of this step is to develop a base-case model that
represents the existing energy use and operating conditions for the building. This model will be used as a
reference to estimate the energy savings due to appropriately selected energy conservation measures.
Evaluation of Energy-Saving Measures: In this step, a list of cost-effective energy conservation measures is
determined using both energy savings and economic analysis.
Based on the ability/abilities of the student/s and recommendations of the mentor, a single discipline or a
multidisciplinary project under ability enhancement can be assigned to an individual student or to a group
havingnot more than 4 students.
Assessment Details (both CIE and SEE)
CIE procedure for project ability enhancement course:
(i) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the
concernedDepartment and two senior faculty members of the Department, one of whom shall be the Guide.
The CIE marks awarded for the project work, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project
reportshall be the same for all the batch mates.
Interdisciplinary: Continuous Internal Evaluation shall be group wise at the college level with the
participation of all the guides of the college.
The CIE marks awarded for the project, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project
report shall be thesame for all the batch mates.
SEE for project:
(i) Single discipline: Contribution to the Mini-project and the performance of each group member shall be
assessed individually in the semester end examination (SEE) conducted at the department.
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Template for Practical Course and if AEC is a practical Course Annexure-V
(ii) Interdisciplinary: Contribution to the Mini-project and the performance of each group member shall
be assessed individually in semester end examination (SEE) conducted separately at the departments to
which the student/s belong to.
The SEE marks awarded for the project, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project
report shall be thesame for all the batch mates.
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Template for Practical Course and if AEC is a practical Course Annexure-V
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Template for Practical Course and if AEC is a practical Course Annexure-V
Based on the ability/abilities of the student/s and recommendations of the mentor, a single discipline or a
multidisciplinary project under ability enhancement can be assigned to an individual student or to a group having
not more than 4 students.
Assessment Details (both CIE and SEE)
CIE procedure for project ability enhancement course:
(i) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the concerned
Department and two senior faculty members of the Department, one of whom shall be the Guide.
The CIE marks awarded for the project work, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project report
shall be the same for all the batch mates.
(ii) Interdisciplinary: Continuous Internal Evaluation shall be group wise at the college level with the
participation of all the guides of the college.
The CIE marks awarded for the project, shall be based on the evaluation of project report, project presentation
skill and question and answer session in the ratio 50:25:25.The marks awarded for the project report shall be the
same for all the batch mates.
SEE for project:
(i) Single discipline: Contribution to the Mini-project and the performance of each group member shall be
assessed individually in the semester end examination (SEE) conducted at the department.
(ii) Interdisciplinary: Contribution to the Mini-project and the performance of each group member shall be
assessed individually in semester end examination (SEE) conducted separately at the departments to which the
student/s belong to.
The SEE marks awarded for the project, shall be based on the evaluation of project report, project presentation
skill and question and answer session in the ratio 50:25:25.The marks awarded for the project report shall be the
same for all the batch mates.
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Template for Practical Course and if AEC is a practical Course Annexure-V
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Template for Practical Course and if AEC is a practical Course Annexure-V
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TEMPLATE for IPCC (26.04.2022) Annexure-III
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TEMPLATE for IPCC (26.04.2022) Annexure-III
Introduction to Power System Protection: Need for protective schemes, Nature and Cause of
Faults, Types of Fault, Effects of Faults, Fault Statistics, Zones of Protection, Primary and
Backup Protection, Essential Qualities of Protection, Performance of Protective Relaying,
Classification of Protective Relays, Automatic Reclosing, Current Transformers for protection,
Voltage Transformers for Protection.
Relay Construction and Operating Principles: Introduction, Electromechanical Relays, Static
Relays – Merits and Demerits of Static Relays, Numerical Relays, Comparison between
Electromechanical Relays and Numerical Relays.
MODULE-2
Overcurrent Protection Introduction, Time – current Characteristics, Current Setting, Time
Setting. Overcurrent Protective Schemes, Reverse Power or Directional Relay, Protection of
Parallel Feeders, Protection of Ring Mains, Earth Fault and Phase Fault Protection, Combined
Earth Fault and Phase Fault Protective Scheme, Phase Fault Protective Scheme, Directional Earth
Fault Relay, Static Overcurrent Relays, Numerical Overcurrent Relays.
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TEMPLATE for IPCC (26.04.2022) Annexure-III
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TEMPLATE for IPCC (26.04.2022) Annexure-III
he/she secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.
The IPCC means the practical portion integrated with the theory of the course. CIE marks for the theory
component are 25 marks and that for the practical component is 25 marks.
CIE for the theory component of the IPCC
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two Tests,
each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other assessment methods
mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the syllabus and the second test after
covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the theory
component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks for the
test to be conducted after the completion of all the laboratory sessions.
On completion of every experiment/program in the laboratory, the students shall be evaluated including viva-
voce and marks shall be awarded on the same day.
The CIE marks awarded in the case of the Practical component shall be based on the continuous evaluation of
the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of all experiments’ write-
ups are added and scaled down to 15 marks.
The laboratory test (duration 02/03 hours) after completion of all the experiments shall be conducted for 50
marks and scaled down to 10 marks.
Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory component of
IPCC for 25 marks.
The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3
sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions for 100 marks, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have a CIE
component only. Questions mentioned in the SEE paper may include questions from the practical
component.
The minimum marks to be secured in CIE to appear for SEE shall be 10 (40% of maximum marks-25) in
the theory component and 10 (40% of maximum marks -25) in the practical component. The laboratory
component of the IPCC shall be for CIE only. However, in SEE, the questions from the laboratory
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TEMPLATE for IPCC (26.04.2022) Annexure-III
component shall be included. The maximum of 04/05 sub-questions are to be set from the practical
component of IPCC, the total marks of all questions should not be more than 20 marks.
SEE will be conducted for 100 marks and students shall secure 35% of the maximum marks to qualify for
the SEE. Marks secured will be scaled down to 50.
The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100)
in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Suggested Learning Resources:
Text Books
1.Power System Protection and Switchgear Badri Ram, D.N. Vishwakarma McGraw Hill 2nd Edition
2. Power System Protection and Switchgear BhuvaneshOza et al McGraw Hill 1st Edition, 2010
Reference Books
1. Protection and Switchgear Bhavesh et al Oxford 1st Edition, 2011
2. Power System Switchgear and Protection N. Veerappan S.R. Krishnamurthy S. Chand 1 st
Edition, 2009
3. Fundamentals of Power System Protection Y.G.Paithankar S.R. Bhide PHI 1st Edition, 2009
Web links and Video Lectures (e-Resources):
https://nptel.ac.in
http:// acl.digimat.in/nptel/courses/video/108105017/108105017.html
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34
Module-4
Synchronous Motor Drives: Operation from fixed frequency supply-starting, synchronous motor variable
speed drives, variable frequency control of multiple synchronous motors. Self-controlled synchronous motor
drive employing loadcommutated thyristor inverter, Starting Large Synchronous Machines, Permanent
Magnet ac (PMAC) Motor Drives, Sinusoidal PMAC Motor Drives, Brushless DC Motor Drives.
Stepper Motor Drives: Variable Reluctance, Permanent Magnet, Important Features of Stepper Motors, Torque
Versus Stepping rate Characteristics, Drive Circuits for Stepper Motor.
Module-5
Energy conservation in Electrical Drives: Losses in electrical drive system, Measures for energy conservation
in Electrical drives, Energy efficient operation of drive, use of right rating motors, improvement of quality of
supply.
Solar powered Drives: Solar powered pump drives, solar powered Electric vehicles.
Industrial Drives: Textile Mills, Steel Rolling Mills, Cranes and Hoists, Machine Tools, use of single to three
phase semiconductor converters in rural applications.
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35
Course Outcomes: At the end of the course the student will be able to:
• Explain the advantages, choice and control of electric drive
• Explain the dynamics, generating and motoring modes of operation of electric drives
• Analyze the performance & control of DC motor drives and AC motor drives using controlled rectifiers.
• Analyze the solar powered drives.
• Explain the application of drives in industry and in rural areas.
Sl Name of the
Title of the Book Name of the Author/s Edition and Year
No Publisher
Textbooks
1 Fundamentals of Electrical Drives Gopal K. Dubey Narosa 2nd Edition, 2001
Publishing
2 Electrical Drives: Concepts and VedumSubrahmanyam McGraw Hill 2nd Edition, 2011
Applications (Refer to chapter 07 for
Industrial Drives
Reference Books
1 Electric Drives N.K De,P.K. Sen PHI Learning 1st Edition, 2009
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TEMPLATE for IPCC (26.04.2022) Annexure-III
MODULE-4
Economic Operation of Power System: Introduction and Performance curves Economic generation
Scheduling neglecting losses and generator limits Economic generation scheduling including generator limits
and neglecting losses Economic dispatch including transmission losses Derivation of transmission loss
formula.Illustrative examples.
Unit Commitment: Introduction, Constraints and unit commitment solution by prior list method and
dynamic forward DP approach (Flow chart and Algorithm only).
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TEMPLATE for IPCC (26.04.2022) Annexure-III
MODULE-5
Symmetrical Fault Analysis: Z Bus Formulation by Step by stepbuilding algorithm without mutual
Coupling between the elements by addition of link and addition of branch. Illustrative examples. Zbus
Algorithm for Short Circuit Studies excluding numerical.
Power System Stability: Numerical Solution of Swing Equation by Point by Pointmethod and Runge Kutta
Method. Illustrative examples
5 Formation of Jacobian matrix in Polar Coordinates, for a System having less than 4 Buses.
6 Determination of Bus Currents, Bus Power and Line Flows, for a Specified System Voltage.
7 Load Flow Analysis using Gauss Siedal Method for the system with both PQ buses and PV
Buses. By simulation
8 Load Flow Analysis using NR Method and Fast Decoupled Method for the system with both
PQ buses and PV Buses. By simulation
9 Write a program to generate unit commitment schedule for a system with three units using
priority listing method (priority based on least cost).
10 Optimal Generation Scheduling for Thermal power plants by simulation.
Formulate network matrices and models for solving load flow problems.
Perform steady state power flow analysis of power systems using numerical iterative
techniques. Solve issues of economic load dispatch and unit commitment problems.
Analyse short circuit faults in power system networks using bus impedance
matrix. Apply Point by Point method and Runge Kutta Method to solve
Swing Equation.
Develop programs toformulate bus admittance and bus impedance matrices of inter connected power
systems.
Use suitable package to solve power flow problem for simple power systems.
Use of suitable package to study optimal generation scheduling problems for thermal power plants.
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TEMPLATE for IPCC (26.04.2022) Annexure-III
passing mark is 35% of the maximum marks (18 out of 50 marks). The student is declared as a pass in the course if
he/she secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.
The IPCC means the practical portion integrated with the theory of the course. CIE marks for the theory component
are 25 marks and that for the practical component is 25 marks.
CIE for the theory component of the IPCC
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two Tests,
each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other assessment methods
mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the syllabus and the second test after
covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the theory
component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks for the
test to be conducted after the completion of all the laboratory sessions.
On completion of every experiment/program in the laboratory, the students shall be evaluated including viva-
voce and marks shall be awarded on the same day.
The CIE marks awarded in the case of the Practical component shall be based on the continuous evaluation of
the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of all experiments’ write-
ups are added and scaled down to 15 marks.
The laboratory test (duration 02/03 hours) after completion of all the experiments shall be conducted for 50
marks and scaled down to 10 marks.
Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory component of
IPCC for 25 marks.
The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3
sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have a CIE
component only. Questions mentioned in the SEE paper may include questions from the practical
component.
The minimum marks to be secured in CIE to appear for SEE shall be 10 (40% of maximum marks-25) in the
theory component and 10 (40% of maximum marks -25) in the practical component. The laboratory
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TEMPLATE for IPCC (26.04.2022) Annexure-III
component of the IPCC shall be for CIE only. However, in SEE, the questions from the laboratory
component shall be included. The maximum of 04/05 sub-questions are to be set from the practical
component of IPCC, the total marks of all questions should not be more than 20 marks.
SEE will be conducted for 100 marks and students shall secure 35% of the maximum marks to qualify for
the SEE. Marks secured will be scaled down to 50.
The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100)
in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Suggested Learning Resources:
Books
1. Modern Power System Analysis, D P Kothari, I J Nagrath, McGraw Hill, 4th Edition, 2011.
2. Computer Methods in Power Systems Analysis, Glenn W. Stagg, Ahmed H Ei- Abiad, Scientific
International, Pvt. Ltd,1stEdition, 2019.
3. Power Generation Operation and Control, AllenJ Wood etal, Wiley, 2nd Edition, 2016.
4. Computer Techniques in Power System Analysis, M.A. Pai,McGraw Hill, 2ndEdition, 2012.
5. Power System Analysis, Hadi Saadat, McGraw Hill, 2nd Edition, 2002.
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Annexure-II 1
Course objectives:
To describe various levels of controls in power systems and the vulnerability of the system.
To explain components, architecture and configuration of SCADA.
To explain basic generator control loops, functions of Automatic generation control, speed
governors and mathematical models of Automatic Load Frequency Control
To explain automatic generation control, voltage and reactive power control in an interconnected
power system.
To explain reliability and contingency analysis, state estimation and related issues.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L)needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical
thinking.
5.Adopt Problem Based Learning(PBL),which fosters students’ Analytical skills, develop design
thinking skills
Such as the ability to design, evaluate, generalize, andanalyzeinformation rather than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world -and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction: Operating States of Power System, Objectives of Control, Key Concepts of Reliable
Operation, Preventive and Emergency Controls, Energy Management Centers.
Supervisory Control and Data acquisition (SCADA): Introduction, components, applicationin Power
System, basic functions and advantages. Building blocks of SCADA system, components of RTU,
communication subsystem, IED functional block diagram.
Classification of SCADA system: Single master–single remote; Single master–multiple RTU; Multiple
master–multiple RTUs; and Singlemaster, multiple submaster, multiple remote.
Module-2
Automatic Generation Control(AGC): Introduction, Schematic diagram of load frequency and
excitationvoltage regulators of turbo generators.
Load frequency control(Single area case), Turbine speed governing system, Model of speed
governing system, Turbine model, Generator load model, Complete block diagram ofRepresentationof
load frequency control of an isolated power system, Steady state analysis, Control area concept,
Proportional plus Integral Controller
Module-3
Automatic Generation Control in Interconnected Power system:Two real load frequency control,
Optimal(Two area) load frequency control by state variable, Automatic voltage control, Load frequency
control with generation rate constraints (GRCs), Speed governorand its effect on AGC, Digital
lLFControllers, Decentralized control.
Module-4
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Annexure-II 2
Control of Voltage and Reactive Power: Introduction, Generation and absorption of reactive power,
RelationBetween voltage, power and reactive power at a node, Methods of voltage control, Injection of
reactive power, Shunt capacitors and reactors, Series capacitors, Synchronous compensators, Series
injection.Tap changing transformers. Combined use of tap changing transformers and reactive power
injection, Booster transformers, Phase shift transformers, Voltage collapse.
Module-5
Power System Security: Introduction, Factors affecting power system security, Contingency Analysis,
Linear Sensitivity Factors, AC powerflow methods, Contingency Selection and Ranking.
State estimation of Power Systems: Introduction, Linear Least Square Estimation.
Course outcome(Course Skill Set)
At the end of the course the student will be able to:
(1)Describe various levels of controls in power systems, architecture and configuration of SCADA.
(2)Develop and analyse mathematical models of Automatic Load Frequency Control.
(3)Develop mathematical model of Automatic Generation Control in Interconnected Power system.
(4)Discuss the Control of Voltage, Reactive Power and Voltage collapse.
(5)Explainsecurity, contingency analysis, and state estimation of power systems.
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Annexure-II 3
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions for 100 marks, selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1. Power System Operation and Control, K. Uma Rao, Wiley, 1st Edition, 2012.
2. Modern Power System Analysis, D. P.Kothari, McGraw Hill, 4thEdition, 2011.
3. Power Generation Operation and Control, Allen J Woodetal, Wiley, 2nd Edition, 2003.
4. Electric Power Systems, B M Weedy, B J Cory, Wiley. 4th Edition, 2012.
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Annexure-II 1
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Annexure-II 2
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 3
.
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Annexure-II
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Annexure-II
Module-2
Developing Fundamental PLC Wiring Diagrams and Ladder Logic Programs: Electromagnetic Control
Relays, Contactors, Motor Starters, Manually Operated Switches, Mechanically Operated Switches, Sensors,
Output Control Devices, Seal-In Circuits, Latching Relays, Converting Relay Schematics into PLC Ladder
Programs, Writing a Ladder Logic Program Directly from a Narrative Description.
Programming Timers: Mechanical Timing Relays, Timer Instructions, On-Delay Timer Instruction, Off-Delay
Timer Instruction, Retentive Timer, Cascading Timers.
Module-3
Programming Counters: Counter Instructions, Up-Counter, Down-Counter, Cascading Counters, Incremental
Encoder-Counter Applications, Combining Counter and Timer Functions.
Program Control Instructions: Master Control Reset Instruction, Jump Instruction, Subroutine Functions,
Immediate Input and Immediate Output Instructions, Forcing External I/O Addresses, Safety Circuitry,
Selectable Timed Interrupt, Fault Routine, Temporary End Instruction, Suspend Instruction
Module-4
Data Manipulation Instructions: Data Manipulation, Data Transfer Operations, Data Compare Instructions,
Data Manipulation Programs, Numerical Data I/O Interfaces, Closed-Loop Control.
Math Instructions: Math Instructions, Addition Instruction, Subtraction Instruction, Multiplication
Instruction, Division Instruction, Other Word-Level Math Instructions, File Arithmetic Operations
Module-5
Sequencer and Shift Register Instructions: Mechanical Sequencers, Sequencer Instructions, Sequencer
Programs, Bit Shift Registers, Word Shift Operations.
Process Control, Network Systems, and SCADA: Types of Processes, Structure of Control Systems, On/Off
Control, PID Control, Motion Control, Data Communications, Supervisory
Control and Data Acquisition (SCADA).
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Describe the hardware components of PLC: I/O modules, CPU, memory devices, other support
devices,operating modes and PLC programming.
2. Develop Fundamental PLC Wiring Diagrams and Ladder Logic Programs
3. Describe the operation of different program control instructions.
4. Discuss the execution of data transfer instructions, data compare instructions and the basic operation
of PLC closed-loop control system.
5. Describe the operation of mechanical sequencers, bit and word shift registers, processes and structure of
control systems and communication between the processes.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The student
is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100) in the
sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
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Annexure-II
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
Textbook
1. Programmable Logic Controllers, Frank D Petruzella, McGraw Hill, 4th Edition, 2011
Reference Books
1. Programmable Logic Controllers anEngineer’s Guide, E A Parr Newnes, 3rd Edition, 2013
2. Introduction Programmable LogicControllers, Gary Dunning, Cengage, 3rd Edition, 2006
Web links and Video Lectures (e-Resources):
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BIG DATA ANALYTICS IN POWER SYSTEMS (PROFESSIONAL ELECTIVE)
Course Code BEE714D CIE Marks 50
Teaching Hours/Week (L:T:P) (3:0:0) SEE Marks 50
Credits 03 Exam Hours 03
Course objectives:
To define big data and to explain big data application and analytics to power systems.
To explain the role of big data in smart grid communications and optimization of big data in electric
power systems.
To explain security methods for the infrastructure communication and data mining methods for theft
detection in power systems.
To explain the application of unit commitment method in the control of smart grid.
To explain protection algorithm for transformer based on data pattern recognition
Module-1
Introduction: Big Data, Future Power Systems.
Big Data Application and Analytics in a Large - Scale Power System: Introduction, General Applications
of Big Data, Algorithms for Processing Big Data, Application of Big Data in Power Systems.
Module-2
Role of Big Data in Smart Grid Communications: Introduction, The Grid Modernization, The Grid
Interconnection with the Internet of Things, Data Traffic Pattern in a Smart Grid Environment, The Massive
Flow of Information in a Smart Scenario ,The Volume of Generated Data in a Smart Distribution System: A
Case of Study.
Big Data Optimization in Electric Power Systems: Introduction, Background, Scientometric Analysis of
Big Data, Big Data and Power Systems, Optimization Techniques Used in the Big Data Analysis.
Module-3
Security Methods for Critical Infrastructure Communications: Introduction, Effects of Successful
Communication System Threats, General Communication System Operations, Industrial Control Networks
and Operations, High-Level Communication System Threats, Cyber Threats and Security.
Data - Mining Methods for Electricity Theft Detection: Introduction, Transmission and Distribution
System Losses, Electricity Theft Methods, Data Mining and Electricity Theft, Issues and Directions in
Electricity Theft-Related Data-Mining Research.
Module-4
Unit Commitment Control of Smart Grids: Introduction, Renewable Energy Resources, The Unit
Commitment Problem, A Multi-agent Architecture, Illustrative Example.
Module-5
Transformer Differential Protection Algorithm Based on Data Pattern Recognition: Big Data and Power
System Protection, Methods for Differential Protection Blocking, Principal Component Analysis,
Curvilinear Component Analysis (CCA), PCA Applied to Discriminate Between Inrush and Fault, Currents
in Transformers, Application of the CCA as a Base for a Differential Protection System Under Study,
Results.
Course outcomes:
At the end of the course the student will be able to:
Discuss role of big data and machine-learning methods applicable to power systems and in particular to
Smart Grid communications.
Discuss optimization methods which are suitable for big data models in power systems.
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Discuss various cyber security issues, electricity theft detection and mitigation that exist in IoT-enabled
future power systems.
Discuss renewable energy planning concerns associated with planned future power systems that have high
renewable penetration.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks(18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 marks), selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Sl No Title of the Book Name of the Author/s Name of the Publisher Edition and Year
Textbook
1 Big Data Analytics in Ahmed F. Zobaa and CRC Press 2019. 2019.
Future Power Systems Trevor J. Bihl
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Annexure-II 1
Module-1
Electric and Hybrid Electric Vehicles:
History of Electric Vehicles, Hybrid Electric Vehicles, Fuel Cell Vehicles, Performance of EVs -
Traction Motor Characteristics, Tractive Effort and Transmission Requirement, Vehicle performance,
Energy Consumption
Hybrid Electric Vehicles Concept of Hybrid Electric Drive Trains, Architectures of Hybrid Electric
Drive Trains
Module-2
Design Principle of Series and parallel Hybrid Electric Drive Train
Operation Patterns, Control Strategies-Max. SOC-of-PPS and Engine On–Off
Series Hybrid Electric Drive Train Design Electrical Coupling Device, Power Rating Design of the
Traction Motor, Power Rating Design of the Engine/Generator, Design of PPS, Power Capacity of PPS,
Energy Capacity of PPS.
Parallel Hybrid Electric Drive Train Design
Drive Train Configuration and Design Objectives, Control Strategies, Max. SOC-of-PPS Control
Strategy Engine On–Off (Thermostat) Control Strategy, Constrained Engine On–Off Control Strategy.
Module-3
Batteries in Electric and Hybrid vehicles
Basics of Battery-Battery cell Structure and Chemical reactions. Battery Parameters -Battery capacity,
Open circuit voltage, Terminal voltage, Practical capacity, Discharge rate, State of charge, Battery
energy, Battery power, Specific power,
Fuel Cells
Operating Principles, Fuel Cell System Characteristics, Fuel Cell Technologies, Proton Exchange
Membrane Fuel Cells (PEMFC)Types of fuel cells-Alkaline,, Phosphoric Acid, Molten Carbonate, Solid
Oxide, Direct Methanol.
Module-4
Power Grid of Electric Vehicles
Vehicle grid interface -electric vehicle charging -dc fast chargers,480 V Fast Charger, MV Fast Charger,
Electric vehicle Charging station, Grid impact of fast chargers, Electric vehicles in micro grids. Micro
grid and controls --Primary- and Secondary-Level Controls, Droop-Based Controls, Oscillator-Based
Controls, Tertiary control,V2h and h2V power converter, Solar generation Integration with electric
Vehicles --Coordinated Control of Solar PV Generation, Storage and PEV
Module-5
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Annexure-II 2
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 3
1. Mehrdad Ehsani, Yimin Gao, sebastien E. Gay and Ali Emadi, “Modern Electric, Hybrid Electric
and Fuel Cell Vehicles: Fundamentals, Theory and Design”, CRC Press, 2009.
2. Electric and Hybrid Vehicles: Design Fundamentals by Iqbal Husain, CRC Press, 2003.
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Annexure-II 1
Module-2
Energy Efficiency in Electrical Systems: Electricity billing, Electrical load management and maximum
demand Control, Maximum demand controllers; Power factor improvement, Automatic power factor
controllers, efficient operation of transformers, energy efficient motors, Soft starters, Variable
speed drives; Performance evaluation of fans and pumps, Flow control strategies and energy conservation
opportunities in fans and pumps, Electronic ballast, Energy efficient lighting and measures of energy
efficiency in lighting system.
Module-3
Energy auditing: Introduction, Elements of energy audits, different types of audit, energy use profiles,
measurements in energy audits, presentation of energy audit results.
Module-4
Electricity vis-à-vis Other Commodities: Distinguishing features of electricity as a commodity, Four pillars of
market design: Imbalance, Scheduling and Dispatch, Congestion Management, Ancillary Services. Framework
of Indian power sector and introduction to the availability based tariff (ABT).
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Annexure-II 2
Module-5
Energy Audit Applied to Buildings: Energy – Saving Measures in New Buildings, Water Audit, Method
of Audit, General Energy – Savings Tips Applicable to New as well as Existing Buildings.
Demand side Management: Scope of DSM, Evolution of DSM concept, DSM planning and
Implementation, Load management as a DSM strategy, Applications of Load Control, End use energy
conservation, Tariff options for DSM.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Analyze about energy scenario nationwide and worldwide, also outline Energy Conservation Act and
it features.
2. Discuss load management techniques and energy efficiency.
3. Understand the need of energy audit and energy audit methodology.
4. Understand various pillars of electricity market design.
5. Conduct energy audit of electrical systems and buildings.
6. Show an understanding of demand side management and energy conservation.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 3
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Annexure-II 1
Module-1
Programmable Logic Controllers: Introduction, Parts of a PLC, Principles of Operation, Modifying the
Operation, PLCs versus Computers, PLC Size and Application.
PLC Hardware Components: The I/O Section, Discrete I/O Modules, Analog I/O Modules, Special I/O
Modules, I/O Specifications, The Central Processing Unit (CPU), Memory Design, Memory Types,
Programming Terminal Devices, Recording and Retrieving Data, Human Machine Interfaces (HMIs).
Basics of PLC Programming: Processor Memory Organization, Program Scan, PLC Programming
Languages, Relay-Type Instructions, Instruction Addressing, Branch Instructions, Internal Relay
Instructions, Programming Examine If Closed and Examine If Open Instructions, Entering the Ladder
Diagram, Modes of Operation.
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Annexure-II 2
Module-2
Developing Fundamental PLC Wiring Diagrams and Ladder Logic Programs: Electromagnetic Control
Relays, Contactors, Motor Starters, Manually Operated Switches, Mechanically Operated Switches, Sensors,
Output Control Devices, Seal-In Circuits, Latching Relays, Converting Relay Schematics into PLC Ladder
Programs, Writing a Ladder Logic Program Directly from a Narrative Description.
Programming Timers: Mechanical Timing Relays, Timer Instructions, On-Delay Timer Instruction,
Off-Delay Timer Instruction, Retentive Timer, Cascading Timers.
Module-3
Programming Counters: Counter Instructions, Up-Counter, Down-Counter, Cascading Counters,
Incremental Encoder-Counter Applications, Combining Counter and Timer Functions.
Program Control Instructions: Master Control Reset Instruction, Jump Instruction, Subroutine
Functions, Immediate Input and Immediate Output Instructions, Forcing External I/O Addresses, Safety
Circuitry, Selectable Timed Interrupt, Fault Routine, Temporary End Instruction, Suspend Instruction.
Module-4
Data Manipulation Instructions: Data Manipulation, Data Transfer Operations, Data Compare Instructions,
Data Manipulation Programs, Numerical Data I/O Interfaces, Closed-Loop Control. Math Instructions: Math
Instructions, Addition Instruction, Subtraction Instruction, Multiplication Instruction, Division Instruction,
Other Word-Level Math Instructions, File Arithmetic Operations.
Module-5
Sequencer and Shift Register Instructions: Mechanical Sequencers, Sequencer Instructions, Sequencer
Programs, Bit Shift Registers, Word Shift Operations.
Process Control, Network Systems, and SCADA: Types of Processes, Structure of Control Systems, On/Off
Control, PID Control, Motion Control, Data Communications, Supervisory Control and Data Acquisition
(SCADA).
Course outcome (Course Skill Set)
At the end of the course the student will be able to :
1. Discuss history of PLC and describe the hardware components of PLC: I/O modules, CPU, memory
devices, other support devices, operating modes and PLC programming.
2. Describe field devices Relays, Contactors, Motor Starters, Switches, Sensors, Output Control Devices, Seal-
In Circuits, and Latching Relays commonly used with I/O module.
3. Analyze PLC timer and counter ladder logic programs and describe the operation of different program
control instructions
4. Discuss the execution of data transfer instructions, data compare instructions and the basic operation of
PLC closed-loop control system.
5. Describe the operation of mechanical sequencers, bit and word shift registers, processes and structure of
control systems and communication between the processes.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
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Annexure-II 3
Semester-End Examination:
Theory SEE will be conducted by the University as per the scheduled timetable, with common question papers
for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 1
Module-3
NON LINEAR PROGRAMMING:
Classification of Non Linear programming – Lagrange multiplier method – Karush – Kuhn
Tucker conditions–Reduced gradient algorithms–Quadratic programming method – Penalty
and Barrier method.
Module-4
INTERIOR POINT METHODS:
Karmarkar’s algorithm–Projection Scaling method–Dual affine algorithm–Primal affine
algorithm Barrier algorithm.
Module-5
DYNAMIC PROGRAMMING:
Formulation of Multi stage decision problem–Characteristics–Concept of sub-optimization and
the principle of optimality–Formulation of Dynamic programming–Backward and Forward
recursion– Computational procedure–Conversion offinal value problem in to Initial value
problem.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Understand and formulate Linear Programming model.
2. Solve problems on Duality theory, transportation, Assignment problems-Travelling sales man problem.
3. Classify Non Linear programming and solve related problems.
4. Understand interior point methods.
5. Understand and formulate multi stage decision problem and explain the concept of sub optimisation.
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Annexure-II 2
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Annexure-II 3
.
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