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Lecture 5 microporcessor

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Lecture 5 microporcessor

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khaledmogahedalabyad
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© © All Rights Reserved
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ADDRESSING MODES

Lecture 5
LECTURE OUTLINE
 Data-addressing modes
 PROGRAM MEMORY-ADDRESSING MODES
 STACK MEMORY-ADDRESSING MODES
EXAMPLE 3-2
 Example 3–2 shows various immediate instructions in a short assembly
language program.
The .MODEL TINY statement directs the assembler to assemble the
program into a single code segment.
The .CODE statement or directive indicates the start of the code
segment;
The .STARTUP statement indicates the starting instruction in
the program.
The .EXIT statement causes the program to exit to DOS.
The END statement indicates the end of the program file.
 Example 3–4 shows a function in a
Visual C++ program that includes
some code written with the inline
assembler.
 This function adds 20H to the
number returned by the function.
EXAMPLE 3-6
 Example 3–6 shows a short program using models that address
information in the data segment.
Note that the data segment begins with a .DATA statement to inform
the assembler where the data segment begins.
 The SMALL model allows one data segment and one code segment.
Notice how this example allocates memory locations in the data
segment by using the DB and DW directives.
Here the .STARTUP statement not only indicates the start of the code,
but it also loads the data segment register with the segment address of
the data segment.
EXAMPLE 3-7
 The sequence shown in Example 3–7 loads register BX with the
starting address of the table
 it initializes the count, located in register CX, to 50.
 The OFFSET directive tells the assembler to load BX with the offset
address of memory location TABLE, not the contents of TABLE.
For example, the MOV BX,DATAS instruction copies the contents of
memory location DATAS into BX, while the MOV BX,OFFSET DATAS
instruction copies the offset address DATAS into BX.
When the OFFSET directive is used with the MOV instruction, the
assembler calculates the offset address and then uses a MOV
immediate instruction to load the address in the specified 16-bit
register.
EXAMPLE 3-7
 Once the counter and pointer are initialized, a repeat-until CX = 0 loop
executes.
Here data are read from extra segment memory location 46CH with the MOV
AX,ES:[046CH] instruction and stored in memory that is indirectly addressed by
the offset address located in register BX.
 Next, BX is incremented (1 is added to BX) twice to address the next word in
the table.
Finally, the LOOP instruction repeats the LOOP 50 times. The LOOP instruction
decrements (subtracts 1 from) the counter (CX); if CX is not zero, LOOP causes a
jump to memory location AGAIN.
 If CX becomes zero, no jump occurs and this sequence of instructions ends.
This example copies the most recent 50 values from the clock into the memory
array DATAS.
EXAMPLE 3-9

Example 3–9 shows how this new addressing mode can transfer the
contents of array element10H into array element 20H.
Notice the similarity between this example and Example 3–8.
The main difference is that, in Example 3–9, register BX is not used to
address memory ARRAY; instead, ARRAY is used as a displacement to
accomplish the same task.
EXAMPLE 3-11
Example 3–11 shows a sequence of instructions that uses scaled-index
addressing to access a word-sized array of data called LIST.
 Note that the offset address of LIST is loaded into register EBX with the
MOV EBX,OFFSET LIST instruction.
Once EBX addresses array LIST, the elements (located in ECX) of 2, 4,
and 7 of this word-wide array are added, using a scaling factor of 2 to
access the elements.
This program stores the 2 at element 2 into elements 4 and 7.
 Also notice the .386 directive to select the 80386 microprocessor. This
directive must follow the .MODEL statement for the assembler to process
80386 instructions for DOS.
If the 80486 is in use, the .486 directive appears after the .MODEL
statement.
3-2 PROGRAM MEMORY-ADDRESSING
MODES

 Used with the JMP (jump) and CALL instructions.


 Consist of three distinct forms:
- direct, relative, and indirect.
1- DIRECT PROGRAM MEMORY ADDRESSING
 used for all jumps and calls. Direct program memory addressing is
also used in high-level languages
- such as the BASIC language GOTO and GOSUB instructions.
 The microprocessor uses this form of addressing, but not as often as
relative and indirect program memory addressing are used.
The instructions for direct program memory addressing store the
address with the opcode.
FIGURE 3–14 The 5-byte machine language version of a JMP [10000H] instruction.

 This JMP instruction loads CS with 1000H and IP with 0000H to


jump to memory location 10000H for the next instruction.
 (An intersegment jump is a jump to any memory location within
the entire memory system.)
 The direct jump is often called a far jump because it can jump to
any memory location for the next instruction.
• In the real mode, a far jump accesses any location within the first
1M byte of memory by changing both CS and IP.
• In protected mode operation, the far jump can jump to any
memory location in the entire 4G-byte address range in the 80386
through Core2 microprocessors.
The only other instruction that uses direct program addressing is
the intersegment or far CALL instruction.
Usually, the name of a memory address, called a label, refers to
the location that is called or jumped to instead of the actual
numeric address.
 When using a label with the CALL or JMP instruction, most
assemblers select the best form of program addressing
2- RELATIVE PROGRAM MEMORY ADDRESSING
The term relative means “relative to the instruction pointer (IP).”
 The JMP instruction is a 1-byte instruction, with a 1-byte or a 2-byte
displacement that adds to the instruction pointer.
A 1-byte displacement is used in short jumps, and a 2-byte
displacement is used with near jumps and calls.
Both types are considered to be intrasegment jumps. (An intrasegment
jump is a jump anywhere within the current code segment.)
 An example is shown in Figure 3–15.
FIGURE 3–15 A JMP [2] instruction. This instruction skips over the 2 bytes of memory that
follow the JMP instruction.
3- INDIRECT PROGRAM MEMORY ADDRESSING

 The microprocessor allows several forms of program indirect memory


addressing for the JMP and CALL instructions.
 In the 80386 and above, an extended register can also be used to hold
the address or indirect address of a relative JMP or CALL.
- For example, the JMP EAX jumps to the location address by register
EAX.
If a 16-bit register holds the address of a JMP instruction, the jump is
near.
 For example, if the BX register contains 1000H and a JMP BX instruction
executes, the microprocessor jumps to offset address 1000H in the current
code segment.
If a relative register holds the address, the jump is also considered to be an indirect
jump.
For example, JMP [BX] refers to the memory location within the data segment at the
offset address contained in BX.
- At this offset address is a l6-bit number that is used as the offset address in the
intrasegment jump.
TABLE 3–10 EXAMPLES OF INDIRECT PROGRAM MEMORY ADDRESSING.
3-3 STACK MEMORY-ADDRESSING MODES
 The stack plays an important role in all microprocessors.
- holds data temporarily and stores the return addresses used by procedures.
 Stack memory is an LIFO (last-in, first-out) memory
- describes the way that data are stored and removed from the stack.
 Data are placed onto the stack with a PUSH instruction and removed with a POP
instruction.
 Stack memory is maintained by two registers:
- the stack pointer (SP or ESP)
- the stack segment register (SS).
 Whenever a word of data is pushed onto the stack, the high-order 8 bits are placed in
the location addressed by SP – 1.
- The low-order 8 bits are placed in the location addressed by SP – 2.
 The SP is then decremented by 2 so that the next word of data is
stored in the next available stack memory location.
Whenever data are popped from the stack, the low-order 8 bits are
removed from the location addressed by SP. The high-order 8 bits are
removed from the location addressed by SP+1. The SP register is then
incremented by 2.
Note that PUSH and POP store or retrieve words of data—never bytes—
in the 8086 through the 80286 microprocessors. The 80386 and above
allow words or doublewords to be transferred to and from the stack.
Data may be pushed onto the stack from any 16-bit register or segment
register; in the 80386 and above, from any 32-bit extended register. Data
may be popped off the stack into any register or any segment register
except CS. The reason that data may not be popped from the stack into CS
is that this only changes part of the address of the next instruction.
FIGURE 3–17 The PUSH and POP instructions: (a) PUSH BX places the contents of BX onto
the stack; (b) POP CX removes data from the stack and places them into CX. Both instructions
are shown after execution.
PUSHA and POPA instructions either push or pop
all of the registers, except segment registers, onto
the stack. - --These instructions are not available
on the early 8086/8088 processors.
 80386 and above also allow extended registers to
be pushed or popped.
- 64-bit mode for the Pentium 4 and Core2 does
not contain a PUSHA or POPA instruction.
TABLE 3–11 Example PUSH and POP instructions.

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