Printed Page 1 of 2 Sub Code:KCS302 Paper Id:

B, TECH. 110322 Roll No:

(SEM-111) THEORY EXAMNATION 2019-20
COMPUTER ORGANIZATION AND ARCHITECTURE
Time: 3 Houn Total Marks: 100
Note: 1, Attempt all Sections. If require any missing data; then choose suitably.

SECTION A

1. Attempt all questions in brief.

Qno. Question Marks c

o
a. Define the ta•m Computer Architecture. 2 1
b. Draw the basic functional units of a computer. 2 1
c. Paform the 2 's complement subtraction of smaller number (101011) from 2 2
lar 111001 .
d. What is the role of Multiplexer and Decoda? 2 2
e. Write the differuwes between RISC and CISC. 2 3
What are the types of microinsÜuctions available? 2 3

g. What is SRAM and DRAM? 2 4

h. What is the difference between 2D and 2 1/2 D m organization? 2 4
i. What is I/O control method? 2
What is bus arbitration? 2
S

2. Attempt any three of the fo

Qno.
Question o
a. Conva•t infix 5+5 1
notation:
etic expressions from
lish
ii. A* B+C*CD+E G+H
b. DesiY1 a 4-bit Carry-Look ahead Adder 10 2
andwith exam le.
c. i. Draw the timing diayam for a instructio e and explain. 5+5 3
ii. Give a note on subroutine.
d. What do you mean by virtual memo scuss how paging helps in 10 4
im lementin virtual memo
e. 10 5
What is DMA? Describe howDM I d to transfer data from eri herals.
SECTION c
3, Attempt any one part oft e following:
Qno. Question Marks
c
o
a. Describe in detail the different kinds of addressing modes with an example. 10 1
b. Discuss stack Organization. Explain the following in details- 10 1
(i) stack ii Mem
stack

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Paper Id: 110322 Roll No:

4. Attempt any one part of the following:

Qno. Question N'larks
c
o
a. Represent the following decimal number in IEEE standard floating-point 5+5 2
format in a single precision method (32-bit) representation method.
i. (65. 1 75)10 ii. -
307.1875 10
b. Using Booth algorithm perform the multiplication on the following 6-bit unsi ned 10 2
inte er 10110011 * 11010101
5. Attempt any one part of the following:
Qno. Question Marks c
o
a. What is parallelism and pipelining in computer Architecture? 10 3
b. Explain the organization of Microprogrammed control unit in detail. 3

6. Attempt any one part of the following:

Qno. Question Marks
c
a. Discuss the different mapping techniquesßl$d in cache memories and their 10 4
relative merits and demerits.
b. RAM chip 4096 x 8 bits has two enable fines. How many pins are needed for the 4
integrated circuits package? Draw block diagram and label all input and out uts
of the RAM. What is ma feature of random-access memo ?

7. Attempt any one following:

Qno. Marks
Question
c
O
a. Write down the difference between isolated I/O and memory mapped I/O. Also 10 5
discuss advanta es and disadvanta es of isolated I/O and emor ma ed I/O.
b. i. Discuss the design of a typical input or output in fface. 10 5
ii. What are interru ts? How are the handled?

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