Tidubh 9
Tidubh 9
ADS54J60 LMH3401
400-MHz LPF
16
400-MHz LPF
16
LMH6401
LMK04828
÷
÷N
PFD
÷
÷R 122.88 MHz
÷
An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.
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2 Circuit Description
This reference design discusses the use and performance of the Ultra-Wideband Fixed-gain high-speed
amplifier, the LMH3401 to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device.
Different options for common-mode voltages, power supplies, and interfaces are discussed and measured,
including AC-coupling and DC-coupling, to meet the requirements for a variety of applications.
This type of circuit may be used in Software Defined Radio, Military Communications, Test Equipment,
Cable head-end receiver, Radar receiver and Digitizer applications.
3 Introduction
This reference design, the TSW54J60EVM, serves as a comprehensive summary of the performance and
trade-offs when driving an ADC with high-speed amplifiers. A printed-circuit board was developed in order
to test different setups in AC and DC coupled applications. This board consists of an ADS54J60 device,
which is a dual-channel, 16-Bit, 1-GSPS ADC, and two high-speed fully-differential amplifiers: the
LMH3401 (Fixed gain) and the LMH6401 (Digital variable gain). This board uses the LMH6401 amplifier to
drive one channel of the ADC and a LMH3401 to drive the other channel. The board includes a jitter-
cleaning clock generator (LMK04828), a USB interface to allow operation with TI’s High Speed Data
Converter Pro GUI, and TI power solution LDO’s, and switchers. The JESD204B standard interface allows
the EVM to be used with the TITSW14J56EVM capture board or other JESD204B compatible platforms
for data analysis.
The LMH3401 is an Ultra-Wideband, Fixed-gain, Fully-Differential Amplifier (FDA) designed for DC to
radio frequency (RF), intermediate frequency (IF) or high-speed time-domain applications with signal
bandwidths up to 2 GHz. The device is an ideal analog-to-digital converter (ADC) driver for DC or AC-
coupled applications. The device supports both single-and split-supply operation for driving an ADC. A
common-mode reference input pin is provided to align the amplifier output common-mode with the ADC
input requirements.
The LMH3401 includes internal feedback and gain set resistors to provide 16-dB of gain when configured
for single-ended inputs driven from a 50-Ω source. When used in fully-differential configuration, 12 dB is
obtained when matching the input to a 100-Ω differential source. The on-chip resistors simplify PCB
design and ensure the highest performance over the useable bandwidth.
This document includes the general considerations when driving an ADC with an amplifier, such as
common-mode voltages, power supplies, AC-coupling and DC-coupling, and filter interfaces. This
document also includes a discussion of the measured performance. This TIDesign only focuses on the
LMH3401 channel driving the ADS54J60. TIDesign TIDUB15 features the LMH6401 channel driving the
ADS54J60. See the TSW54J60EVM Evaluation Mode User’s Guide, (SLAU649A), for more information
regarding operation and testing of this EVM.
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4 General Considerations
NOTE: the ac coupling on both inputs provides a similar frequency response to balance the gain
over frequency. In single-ended to differential applications, the input impedance is actively
set by the amplifier. This active input impedance match allows for lower noise than the case
of a purely resistive input impedance.
Detailed solutions for input impedance calculations are shown in the Input Impedance Calculations section
of the LMH3401 Data sheet.
When considering the input impedance of the LMH3401, the device input pins move in a common-mode
sense with the input signal. The common-mode current functions to increase the apparent input
impedance at the device input into the gain element over the value of RG. Input signals may also cause
input clipping if this common-mode signal moves beyond the input range. This input active impedance
issue applies to both AC- and DC-coupled designs and requires somewhat more complex solutions for the
resistors to account for this issue.
The full set of resistor value calculations is included in the Resistor Design Equations for Single-to-
Differential Applications section of the data sheet.
AC-coupling is the default configuration of the LMH3401 path on the TSW54J60EVM. TI recommends that
the AC-coupling configuration be used if the application does not require processing of signals close to
DC. The TSW54J60 provides an option to input a 50 Ω single-ended input or a true 100-Ω differential
signal for the LMH3401 device.
On the TSW54J60EVM, the LMH3401 operates from a single-supply voltage of 5.0 V. Single supply
operation is most appropriate when the signal path is ac coupled and the input and output common-mode
voltages are set to mid-supply by the CM pin and are preserved by coupling capacitors on the input and
output.
The CM input controls the output common-mode voltage. CM has no internal biasing network and must be
driven by an external source or resistor divider network to the positive power supply. The TSW54J60EVM
provides option to drive CM from either the ADC or an external source using a test point (TP1).
The output of the amplifier goes through a 370MHz low pass filter before connecting to the ADC. The
specifications of the filter and data captured plots are shown in Section 6.
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Figure 1 shows the default configuration of the LMH3401 channel of the TSW54J60EVM.
U1 R1 R8 L1 L2 R2
C1 C2 LMH3401
2200 pF 1 3 7.5 nH 18 nH U2 ADS54J60
0.01 µF VS+ VS- 20 0 4.99
10 8 22
VS+ VS- R3 VCM
53.6
13 13
OUT+ C5 C6 C7 INP 16 8 LANES
J1 S MA R11 0 5 5.6 pF 9 pF 6.2pF 14 OUT
IN- DNI INM JESD204B
INP EN D C8 SERIAL
2 .1 µF
CM OUTPUTS
R4
R10 0 6 53.6
IN+ 12
OUT- R5 R9 L3 L4 R6
R7 7.5 nH 18 nH
20 0 4.99
49.9 11
GND 14
GND
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Because the LMH3401 is configured as a single-ended input, a bandpass filter is used to improve the
SFDR from the signal source and a 6-dB attenuation pad for better impedance matching. The setup is as
shown in Figure 3.
7.5 µH 18 µH
200 20 5
INP
53
VIN 10
Bandpass 6-dB
Filter
Bias-T Attenuator
100 µF
(50 ) 12.5 LMH3401 9 pF 6.2 p ADS54J60
53
10
VDC
12.5
INN
50 20 5
200 18 µH VCM =2.1 V
7.5 µH
External
Vcm
0.01 µF
Amp Supply Voltage:
Vs+ = 5 V
Vs- = 0 V
Figure 3. Balancing the DC Offset of the LMH3401 Using a Bias-T and External DC Source
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A 170-MHz tone was used as the test tone, and the ADC was sampling at Fs= 983.04Msps. Figure 4
shows the captured results.
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6 Filter Design
The TSW54J60EVM follows the LMH3401 with a 370-MHz 4th order Chebyshev Low-Pass Filter (LPF)
filter to remove out-of-band noise and harmonics aliasing into the first Nyquist zone of the ADS54J60. The
filter has been designed for less than 2-dB pass-band ripple with cut-off frequency at 370 MHz, and stop-
band attenuation of 30 dB at 1 GHz. The circuit is appropriately biased to match the ADC common-mode
level by connecting the VCM output to the common mode termination. Figure 5 shows the filter simulated
response.
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The LMH3401, as with most RF amplifiers, has two 10-Ω, on-chip resistors on each output leg to provide
isolation from board parasitic at the output pins. When designing a filter between the amplifier and the
interfacing circuitry (ADC), the filter source impedance must be calculated by taking into account the two
10-Ω, on-chip resistors. Table 1 lists the calculated external source impedance values (RO+ and RO–)
required for various matched filter loads (RL). An important note is that the filter design between the
LMH3401 and the ADC is not limited to a matched filter, and source impedance values (RO+ and RO–) can
be reduced to achieve higher swing at the filter outputs. Achieving lower loss in the filter source
impedance resistors or higher swing at the filter outputs is often desirable because the amplifier must
reduce the output swing to maintain the same full-scale input at the ADC. Thus, better linearity
performance occurs.
The 370-MHz, un-matched, low-pass filter between the LMH3401 and ADS54J60 is shown in Figure 4,
with (RO+ and RO–) set to 20 Ω and RL set to 100 Ω. Since the ADC input impedance (RL) is set to 100 Ω
and the termination resistors including the two on-chip 10-Ω resistors on LMH3401 output is 60 Ω, the
termination loss (or insertion loss) between the LMH3401 and ADS54J60 is approximately 4-dB (or 2-dB).
The termination loss is calculated by the voltage division between the ADC input and the termination
resistors at the amplifier output.
VINADC (diff ) = Loss ´ VOUTAMP (diff ) (1)
For the LMH3401 and the ADS54J60 interface, use:
æ RL ö
Loss(dB) = 20 ´ log10 ç ÷
ç R L + R 0 + + R 0 - + 20 ÷
è ø (2)
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(1)
The total load includes termination resistors.
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Results www.ti.com
8 Results
Table 2 and Figure 7 were made using results from a TSW54J60 connected to a TSW14J56EVM and the
HSDC Pro GUI. Data was collected with the board configured from DC and AC-coupling. Two signal
generators, band pass filters, and 3 dB attenuators were used, along with a power combiner for the two
tests. Data was collected using frequencies ranging from 70 MHz to 250 MHz. Figure 8 shows captured
data using Two Tone format in the test selection option of HSDC Pro GUI. The two two tones were
centered around 170 MHz, separated by 2 MHz.
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Figure 8 is a screen shot from HSDC Pro GUI of a two-tone test using (169 MHz and 171 MHz).
The measured results show that the LMH3401 device is a good solution to drive a high-speed ADC such
as the ADS54J60 device for single-ended differential high speed, wide input voltage range digitizer
applications. The LMH3401 device may be set in either DC-coupled or AC-coupled configuration. An
important consideration is proper common-mode biasing. One difficulty with the DC-coupling case is the
need to provide the optimal common-mode voltage at the amplifier output pins and the ADC input pins.
Another challenge with DC-coupling is the requirement to level-shift the DC source to the amplifier's input
common mode voltage.
In terms of SNR and SFDR, the performance may be improved if time is spent to optimize the interface
circuit and filtering, likely further than what is shown in this document. One way of improving the SFDR
performance is by designing the output filter with lower termination resistor values at the amplifier output
and keeping the same ADC input impedance. Such an output filter design lowers the amplifier output
swing for the same full-scale input at the ADC and results in lower SFDR.
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