Counters

Counter.......................................................................................................................................................... 2
Applications of Counter ............................................................................................................................ 2
Asynchronous counter .............................................................................................................................. 2
Advantages of Asynchronous Counter ................................................................................................. 3
Disadvantages of Asynchronous Counter ............................................................................................. 3
Use of Asynchronous Counter .............................................................................................................. 3
Synchronous counter................................................................................................................................. 3
The advantages of the Synchronous counter ......................................................................................... 3
The advantages of the Synchronous counter ......................................................................................... 3
Use of Synchronous Counter ................................................................................................................ 4
1. 4-bit Asynchronous up Counter ............................................................................................................ 4
2. 4-bit Synchronous Counter ................................................................................................................... 4
Up-Down Counters ....................................................................................................................................... 6
Synchronous 3-bit Up/Down Counter....................................................................................................... 6
Asynchronous 3-bit up/down counters ..................................................................................................... 6
UP Counting.......................................................................................................................................... 6
DOWN Counting .................................................................................................................................. 7
Shift-Resister and Frequency Counters......................................................................................................... 7
Serial-in to Parallel-out (SIPO) Shift Register .......................................................................................... 8
Serial-in to Serial-out (SISO) Shift Register........................................................................................... 10
Parallel-in to Serial-out (PISO) ............................................................................................................... 10
Parallel-in to Parallel-out (PIPO) ............................................................................................................ 11
The Universal Shift Register ................................................................................................................... 12
Summary ................................................................................................................................................. 13
Digital Clock ............................................................................................................................................... 14
References ................................................................................................................................................... 15

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
Counter

A Counter is a device which stores (and sometimes displays) the number of times a particular event or
process has occurred, often in relationship to a clock signal. Counters are used in digital electronics for
counting purpose, they can count specific event happening in the circuit. For example, in UP counter a
counter increases count for every rising edge of clock. Not only counting, a counter can follow the certain
sequence based on our design like any random sequence 0,1,3,2…. They can also be designed with the help
of flip flops. They are used as frequency dividers where the frequency of given pulse waveform is divided.
Counters are sequential circuit that count the number of pulses can be either in binary code or BCD form.
The main properties of a counter are timing, sequencing, and counting. Counter works in two modes:

• Up counter
• Down counter
Counters are broadly divided into two categories:

• Asynchronous counter
• Synchronous counter

Applications of Counter
These counter circuits are the basic ones in the ‘Digital Electronics’. These counters possess various
applications.

• In the conversions from Analog to Digital, these counters are used.

• In the applications of Timers for example Washings machines where we set the time. These
counters are used.
• With the help of these counters, a ‘Digital Triangular Wave Generator’ can be designed.
• In the application of ‘Digital Clock’ counters are used.
• A practical example of these devices is seen in malls, stadiums, or auditoriums. In the above
situations to keep the data on the number of persons. This can be made possible or it will become
simple because of these counters.
• In the frequency divider circuits

Asynchronous counter
Asynchronous counters are those whose output is free from the clock signal. Because the flip flops in
asynchronous counters are supplied with different clock signals, there may be delay in producing output.
The required number of logic gates to design asynchronous counters is very less. So they are simple in
design. Another name for Asynchronous counters is “Ripple counters”.
The number of flip flops used in a ripple counter is depends up on the number of states of counter (ex: Mod
4, Mod 2 etc). The number of output states of counter is called “Modulus” or “MOD” of the counter. The
maximum number of states that a counter can have is 2n where n represents the number of flip flops used
in counter.

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
For example, if we have 2 flip flops, the maximum number of outputs of the counter is 4 i.e. 22. So it is
called as “MOD-4 counter” or “Modulus 4 counter”.

Advantages of Asynchronous Counter

• Asynchronous counters can be easily built using Type D flip-flops. They can be implemented using
“divide by n” counter circuit, which offers much more flexibility on larger counting range related
applications, and the truncated counter can produce any modulus number count.

Disadvantages of Asynchronous Counter

• While using the Asynchronous counter, an additional re-synchronizing output flip-flops required
for resynchronizing the flipflops. Also, For the truncated sequence count, when it is not equal to ,
extra feedback logic is needed.
• When counting a large number of bit, due to the chain system, propagation delay by successive
stages became too large which is very difficult to get rid off. In such a situation, Synchronous
counters are faster and reliable. There are also counting errors in Asynchronous Counter when high
clock frequencies are applied across it.

Use of Asynchronous Counter

• Asynchronous counters, often known as divide by N counters, are used as frequency dividers.
• These are utilized for low-power applications and emit less noise.
• These are utilized in the creation of an asynchronous decade counter.

Synchronous counter
Synchrounous generally refers to something which is cordinated with others based on time. Synchronous
signals occur at same clock rate and all the clocks follow the same reference clock.
In synchronous counter, the clock input across all the flip-flops use the same source and create the same
clock signal at the same time. So, a counter which is using the same clock signal from the same source at
the same time is called Synchronous counter.

The advantages of the Synchronous counter

• It’s easier to design than the Asynchronous counter.

• It acts simultaneously.
• No propagation delay associated with it.
• Count sequence is controlled using logic gates, error chances are lower.
• Faster operation than the Asynchronous counter.

The advantages of the Synchronous counter

• One major disadvantage of working with Synchronous counter is that it requires a lot of extra logic
to perform.

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
Use of Synchronous Counter
• Machine Motion control
• Motor RPM counter
• Rotary Shaft Encoders
• Digital clock or pulse generators.
• Digital Watch and Alarm systems.

1. 4-bit Asynchronous up Counter

In asynchronous counter we don’t use
universal clock, only first flip flop is
driven by main clock and the clock
input of rest of the following flip flop
is driven by output of previous flip
flops. We can understand it by
following diagram-
It is evident from timing diagram that
Q0 is changing as soon as the rising
edge of clock pulse is encountered, Q1
is changing when rising edge of Q0 is
encountered (because Q0 is like clock
pulse for second flip flop) and so on.
In this way ripples are generated
through Q0,Q1,Q2,Q3 hence it is also
called Ripple counter. A ripple
counter is a cascaded arrangement of
flip flops where the output of one flip
flop drives the clock input of the
following flip flop

2. 4-bit Synchronous Counter

Unlike the asynchronous counter, synchronous counter has one global clock which drives each flip flop so
output changes in parallel. The one advantage of synchronous counter over asynchronous counter is, it can
operate on higher frequency than asynchronous counter as it does not have cumulative delay because of
same clock is given to each flip flop.

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
 Synchronous counter circuit

Timing diagram synchronous up counter

From circuit diagram we see that Q0 bit gives response to each falling edge of clock while Q1 is dependent
on Q0, Q2 is dependent on Q1 and Q0, Q3 is dependent on Q2, Q1 and Q0

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
Up-Down Counters

Both Synchronous and Asynchronous counters are capable

of counting “Up” or counting “Down”, but their is another
more “Universal” type of counter that can count in both
directions either Up or Down depending on the state of their
input control pin and these are known as Bidirectional
Counters.
Bidirectional counters, also known as Up/Down counters,
are capable of counting in either direction through any
given count sequence and they can be reversed at any point
within their count sequence by using an additional control
input as shown below.

Synchronous 3-bit Up/Down Counter

The circuit above is of a simple 3-bit Up/Down
synchronous counter using JK flip-flops configured to
operate as toggle or T-type flip-flops giving a maximum
count of zero (000) to seven (111) and back to zero again.
Then the 3-Bit counter advances upward in sequence
(0,1,2,3,4,5,6,7) or downwards in reverse sequence
(7,6,5,4,3,2,1,0).
Generally most bidirectional counter chips can be made to
change their count direction either up or down at any point within their counting sequence. This is achieved
by using an additional input pin which determines the direction of the count, either Up or Down and the
timing diagram gives an example of the counters operation as this Up/Down input changes state.
Nowadays, both up and down counters are incorporated into single IC that is fully programmable to count
in both an “Up” and a “Down” direction from any preset value producing a complete Bidirectional
Counter chip. Common chips available are the 74HC190 4-bit BCD decade Up/Down counter, the 74F569
is a fully synchronous Up/Down binary counter and the CMOS 4029 4-bit Synchronous Up/Down counter.

Asynchronous 3-bit up/down counters

By adding up the ideas of UP counter and
DOWN counters, we can design asynchronous
up /down counter. The 3 bit asynchronous up/
down counter is shown below.
It can count in either ways, up to down or down
to up, based on the clock signal input.

UP Counting
If the UP input and down inputs are 1 and 0
respectively, then the NAND gates between first
flip flop to third flip flop will pass the non

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
inverted output of FF 0 to the clock input of FF 1. Similarly, Q output of FF 1 will pass to the clock input
of FF 2. Thus the UP /down counter performs up counting.

DOWN Counting
If the DOWN input and up inputs are 1 and 0 respectively, then the NAND gates between first flip flop to
third flip flop will pass the inverted output of FF 0 to the clock input of FF 1. Similarly, Q output of FF 1
will pass to the clock input of FF 2. Thus the UP /down counter performs down counting.
The up/ down counter is slower than up counter or a down counter, because the addition propagation delay
will added to the NAND gate network

Shift-Resister and Frequency Counters

This sequential device loads the data present on its inputs and then moves or “shifts” it to its output once
every clock cycle, hence the name Shift Register.
A shift register basically consists of several single-bit “D-Type Data Latches”, one for each data bit, either
a logic “0” or a “1”, connected together in a serial-type daisy-chain arrangement so that the output from
one data latch becomes the input of the next latch and so on.
Data bits may be fed in or out of a shift register serially, that is one after the other from either the left or the
right direction, or all together at the same time in a parallel configuration.
The number of individual data latches required to make up a single Shift Register device is usually
determined by the number of bits to be stored with the most common being 8-bits (one byte) wide
constructed from eight individual data latches.
Shift Registers are used for data storage or for the movement of data and are therefore commonly used
inside calculators or computers to store data such as two binary numbers before they are added together, or
to convert the data from either a serial to parallel or parallel to serial format. The individual data latches
that make up a single shift register are all driven by a common clock ( Clk ) signal making them
synchronous devices.
Shift register IC’s are generally provided with a clear or reset connection so that they can be “SET” or
“RESET” as required. Generally, shift registers operate in one of four different modes with the basic
movement of data through a shift register being:
▪ Serial-in to Parallel-out (SIPO) – the register is loaded with serial data, one bit at a time,
with the stored data being available at the output in parallel form.
▪ Serial-in to Serial-out (SISO) – the data is shifted serially “IN” and “OUT” of the
register, one bit at a time in either a left or right direction under clock control.
▪ Parallel-in to Serial-out (PISO) – the parallel data is loaded into the register
simultaneously and is shifted out of the register serially one bit at a time under clock
control.
▪ Parallel-in to Parallel-out (PIPO) – the parallel data is loaded simultaneously into the
register, and transferred together to their respective outputs by the same clock pulse.
The effect of data movement from left to right through a shift register can be presented graphically as:

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
Also, the directional movement of the data through a shift register can be either to the left, (left shifting) to
the right, (right shifting) left-in but right-out, (rotation), or both left and right shifting within the same
register thereby making it bidirectional. Here, it is assumed that all the data shifts to the right, (right
shifting).
Serial-in to Parallel-out (SIPO) Shift Register
(4-bit Serial-in to Parallel-out Shift Register)

The operation is as follows. Let's assume that all the flip-flops ( FFA to FFD ) have just been RESET
( CLEAR input ) and that all the outputs QA to QD are at logic level “0” ie, no parallel data output.
If logic “1” is connected to the DATA input pin of FFA then on the first clock pulse the output of FFA and
therefore the resulting QA will be set HIGH to logic “1” with all the other outputs still remaining LOW at
logic “0”. Assume now that the DATA input pin of FFA has returned LOW again to logic “0” giving us
one data pulse or 0-1-0.
The second clock pulse will change the output of FFA to logic “0” and the output of FFB and QB HIGH to
logic “1” as its input D has the logic “1” level on it from QA. The logic “1” has now moved or been “shifted”
one place along the register to the right as it is now at QA.

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
When the third clock pulse arrives this logic “1” value moves to the output of FFC ( QC ) and so on until
the arrival of the fifth clock pulse which sets all the outputs QA to QD back again to logic level “0” because
the input to FFA has remained constant at logic level “0”.
The effect of each clock pulse is to shift the data contents of each stage one place to the right, and this is
shown in the following table until the complete data value of 0-0-0-1 is stored in the register. This data
value can now be read directly from the outputs of QA to QD.
Then the data has been converted from a serial data input signal to a parallel data output. The truth table
and following waveforms show the propagation of the logic “1” through the register from left to right as
follows.
Basic Data Movement Through A Shift Register

Clock Pulse No QA QB QC QD

0 0 0 0 0

1 1 0 0 0

2 0 1 0 0

3 0 0 1 0

4 0 0 0 1

5 0 0 0 0

Note that after the fourth clock pulse has

ended the 4-bits of data ( 0-0-0-1 ) are
stored in the register and will remain there
provided clocking of the register has
stopped. In practice the input data to the
register may consist of various
combinations of logic “1” and “0”.
Commonly available SIPO IC’s include
the standard 8-bit 74LS164 or the
74LS594.

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
Serial-in to Serial-out (SISO) Shift Register
This shift register is very similar to the SIPO above, except were before the data was read directly in a
parallel form from the outputs QA to QD, this time the data is allowed to flow straight through the register
and out of the other end. Since there is only one output, the DATA leaves the shift register one bit at a time
in a serial pattern, hence the name Serial-in to Serial-Out Shift Register or SISO.
The SISO shift register is one of the simplest of the four configurations as it has only three connections, the
serial input (SI) which determines what enters the left hand flip-flop, the serial output (SO) which is taken
from the output of the right hand flip-flop and the sequencing clock signal (Clk). The logic circuit diagram
below shows a generalized serial-in serial-out shift register.
4-bit Serial-in to Serial-out Shift Register

You may think what’s the point of a SISO shift register if the output data is exactly the same as the input
data. Well this type of Shift Register also acts as a temporary storage device or it can act as a time delay
device for the data, with the amount of time delay being controlled by the number of stages in the register,
4, 8, 16 etc or by varying the application of the clock pulses. Commonly available IC’s include the 74HC595
8-bit Serial-in to Serial-out Shift Register all with 3-state outputs.

Parallel-in to Serial-out (PISO)

The Parallel-in to Serial-out shift register acts in the opposite way to the serial-in to parallel-out one above.
The data is loaded into the register in a parallel format in which all the data bits enter their inputs
simultaneously, to the parallel input pins PA to PD of the register. The data is then read out sequentially in
the normal shift-right mode from the register at Q representing the data present at PA to PD.
This data is outputted one bit at a time on each clock cycle in a serial format. It is important to note that
with this type of data registers a clock pulse is not required to parallel load the register as it is already
present, but four clock pulses are required to unload the data.
4-bit Parallel-in to Serial-out

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
As this type of shift register converts parallel data, such as an 8-bit data word into serial format, it can be
used to multiplex many different input lines into a single serial DATA stream which can be sent directly to
a computer or transmitted over a communications line. Commonly available IC’s include the 74HC166 8-
bit Parallel-in/Serial-out Shift Registers.

Parallel-in to Parallel-out (PIPO)

The final mode of operation is the Parallel-in to Parallel-out Shift Register. This type of shift register also
acts as a temporary storage device or as a time delay device similar to the SISO configuration above. The
data is presented in a parallel format to the parallel input pins PA to PD and then transferred together directly
to their respective output pins QA to QD by the same clock pulse. Then one clock pulse loads and unloads
the register. This arrangement for parallel loading and unloading is shown below.
4-bit Parallel-in to Parallel-out

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
The PIPO shift register is the simplest of the four configurations as it has only three connections, the parallel
input (PI) which determines what enters the flip-flop, the parallel output (PO) and the sequencing clock
signal (Clk).
Similar to the Serial-in to Serial-out shift register, this type of register also acts as a temporary storage
device or as a time delay device, with the amount of time delay being varied by the frequency of the clock
pulses. Also, in this type of register there are no interconnections between the individual flip-flops since no
serial shifting of the data is required.

The Universal Shift Register

Today, there are many high-speed bi-directional “universal” type Shift Registers available such as the TTL
74LS194, 74LS195, or the CMOS 4035 which are available as 4-bit multi-function devices that can be used
in either serial-to-serial, left shifting, right shifting, serial-to-parallel, parallel-to-serial, or as a parallel-to-
parallel multifunction data register, hence their name “Universal”.
These universal shift registers can perform any combination of parallel and serial input-to-output operations
but require additional inputs to specify the desired function and to pre-load and reset the device. A
commonly used universal shift register is the TTL 74LS194 as shown below.
4-bit Universal Shift Register 74LS194

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
Universal shift registers are very useful digital devices. They can be configured to respond to operations
that require some form of temporary memory storage or for the delay of information such as the SISO or
PIPO configuration modes or transfer data from one point to another in either a serial or parallel format.
Universal shift registers are frequently used in arithmetic operations to shift data to the left or right for
multiplication or division.

Summary
Then to summarise a little about Shift Registers
• A simple Shift Register can be made using only D-type flip-Flops, one flip-Flop for each
data bit.
• The output from each flip-Flop is connected to the D input of the flip-flop at its right.
• Shift registers hold the data in their memory which is moved or “shifted” to their required
positions on each clock pulse.
• Each clock pulse shifts the contents of the register one bit position to either the left or the
right.
• The data bits can be loaded one bit at a time in a series input (SI) configuration or be
loaded simultaneously in a parallel configuration (PI).
• Data may be removed from the register one bit at a time for a series output (SO) or
removed all at the same time from a parallel output (PO).
• One application of shift registers is in the conversion of data between serial and parallel, or
parallel to serial.
• Shift registers are identified individually as SIPO, SISO, PISO, PIPO, or as a Universal
Shift Register with all the functions combined within a single device.
In the next tutorial about Sequential Logic Circuits, we will look at what happens when the output of the
last flip-flop in a shift register is connected directly back to the input of the first flip-flop producing a closed
loop circuit that constantly recirculates the data around the loop. This then produces another type of
sequential logic circuit called a Ring Counter that are used as decade counters and dividers.

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
Digital Clock

At the heart of the clock there is a piece that can generate an accurate 60-hertz (Hz, oscillations per second)
signal. There are two ways to generate this signal:

• The signal can be extracted from the 60-Hz oscillations in a normal power line. Many clocks that
get their power from a wall socket use this technique because it is cheap and easy. The 60-Hz signal
on the power line is reasonably accurate for this purpose.
• The signal can be generated using a crystal oscillator. Obviously, any battery-operated clock or
wristwatch will use this technique instead. It takes more parts, but is generally much more accurate.
A high frequency is used to keep the size of the crystal small. Generally 32 KHz crystal oscillator is used
to give a stable frequency.

• This is divided by 250 gives an output of 128 pulses per second.

• These are fed to the first counter/divider which divides by 128 to give a pulse every second.
• It counts these pulses, in binary, up to 59 seconds.
• The count is shown on the first 7 segment display.
• Since the output from the counter is in binary form, it is converted to suit the display by the decoder.
• When the count and display reaches 59 seconds, it resets to zero on the next pulse.
• The one second pulses are also sent to the next divider/counter which divides by 60 to give one
pulse every minute.
• These pulses are counted and displayed as minutes.
• When the count and display reaches 59 minutes and 59 seconds it resets to zero on the next pulse.
• A pulse every minute is fed to the final divider/counter.
• This divides by 60 to give one pulse every hour.
• These pulses are counted and displayed as hours.
• When the count and display reaches 23 hours 59 minutes 59 seconds, the counters and display
resets to zero on the next pulse.

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Md. Saifur Rahman, Assistant Professor, Department of Physics, University of Rajshahi / 4H / Chapter-7 / 2021
References

1. Pulse, Digital and Switchin Waveforms – Millman, J and Taub, H

2. Digital System Principles & Applications – Tocci, RJ
3. Electronic Devices and Circuits: An indtroduction – Mottershead, A
4. Introduction to Pulse Shaping Circuits – Blitzer, R
5. https://www.geeksforgeeks.org/counters-in-digital-logic/
6. https://www.hobbyprojects.com/block_diagrams/digital_clock.html
7. https://www.electrical4u.com/parallel-in-parallel-out-pipo-shift-
register/#:~:text=Parallel%20In%20Parallel%20Out%20(PIPO)%20shift%20registers%20are%20
the%20type,data%20word%20(Data%20in).
8. https://www.electrical4u.com/parallel-in-serial-out-piso-shift-register/
9. https://www.electronics-tutorials.ws/sequential/seq_5.html
10. https://www.electronics-tutorials.ws/counter/count_3.html
11. https://www.electronics-
tutorials.ws/counter/count_4.html#:~:text=Bidirectional%20counters%2C%20also%20known%2
0as,control%20input%20as%20shown%20below.
12. https://www.electronicshub.org/asynchronous-counter/
13. https://electronics.howstuffworks.com/gadgets/clocks-watches/digital-clock2.htm

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