VLSI-Projects
VLSI-Projects
DOMAIN AREA:
DSP.
Robotics.
Automobile.
3 Fully Reused VLSI Architecture of FM0/Manchester Encoding Using SOLS Technique for DSRC
Applications.
5 Crosstalk noise and delay analysis for high speed on-chip global RLC VLSI interconnects with mutual
inductance using 90nm process technology.
6 A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits.
7 Improvement in error resilience for compressed VLSI test data using Hamming code based technique.
8 High efficiency VLSI implementation of an edge-directed video up-scaler using high level synthesis.
9 High performance VLSI architecture for 2-D DWT using lifting scheme.
10 Low-Power VLSI Architectures for DCT/DWT: Precision vs Approximation for HD Video, Biomedical,
and Smart Antenna Applications.
14 Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video
Applications.
15 Unified VLSI architecture for photo core transform used in JPEG XR.
16 Design and VLSI implementation of novel pre-screening and simplified sorting based K-best detection
for MIMO systems.
17 A VLSI Circuit Emulation of Chemical Synaptic Transmission Dynamics and Postsynaptic DNA
Transcription.
18 A VLSI architecture for watermarking of grayscale images using weighted median prediction.
19 DEJA VU: An Entropy Reduced Hash Function for VLSI Layout Databases.
21 VLSI Implementation of a Key Distribution Server Based Data Security Scheme for RFID System.
23 A High-Throughput VLSI Architecture for Hard and Soft SC-FDMA MIMO Detectors.
26 A novel approach for constrained via minimization problem in VLSI channel routing.
27 A review report on low power VLSI systems analysis and modeling techniques.
28 Revisiting Central Limit Theorem: Accurate Gaussian Random Number Generation in VLSI.
29 High-Throughput Power-Efficient VLSI Architecture of Fractional Motion Estimation for Ultra-HD HEVC
Video Encoding.
30 An efficient VLSI architecture for fingerprint recognition using O2D-DWT architecture and modified
CORDIC-FFT.
31 A Novel Area-Efficient VLSI Architecture for Recursion Computation in LTE Turbo Decoders.
32 Fast obstacle-avoiding octilinear steiner minimal tree construction algorithm for VLSI design.
34 An algorithm for Via minimization in two layer channel routing of VLSI design.
42 GFCG: Glitch free combinational clock gating approach in nanometer VLSI circuits.
43 Design and synthesis of bandwidth efficient QPSK modulator for low power VLSI design.
44 VLSI implementation of embedded back-end for photo-acoustic based continuous noninvasive blood
glucose monitoring system.
48 From the present to the future: Scaling of planar VLSI-CMOS devices towards 3D-FinFETs and beyond
10nm CMOS technologies; manufacturing challenges and future technology concepts.