Microprocessors

COURSE PCC-EE 503

NIRMAL MURMU
DEPARTMENT OF APPLIED PHYSICS
UNIVERSITY OF CALCUTTA
DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA
Course Outcomes
At the end of this course, students will demonstrate the ability
to,
CO1: Understand the basic concept and architecture of Microprocessors.

CO2: Do assembly language programming with clear understanding of

algorithms.
CO3: Develop knowledge of interfacing of peripherals like I/O, A/D, D/A,
timer etc.
CO4: Develop systems using microprocessor and understand
microcontroller.

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

 Syllabus
Module 1: 8085 Microprocessor Architecture (8 Hours)
Microprocessor Architecture-8085 microprocessor CPU architecture, pin diagram,
temporary registers, ALU, timing and control unit, machine cycles, bus interfacing,
memory maps, special function registers, stack memory.

Module 2: Data transfer techniques (4 Hours)

Data transfer techniques: Programmed data transfer, concept of interrupt,
Interrupts of 8085, interrupt priority, interrupt driven data transfer, 8259
programmable interrupt controller, DMA transfer, 8257 DMA controller.

Module 3: Interfacing issues (8 Hours)

Interfacing- Basic principles of interfacing memory and I/O devices, 8255A
programmable peripheral interface, Interfacing of D/A and A/D converter, Concept
of serial data transfer, 8251 USART; concept of timer and counter, 8253
programmable timer interval IC.

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Syllabus
Module 4: Instruction set and programming (14 Hours)
Programming of 8085 mocroprocessors: Addressing modes, instruction
set, assembly language programming, simple numerical operations, data
sorting examples, block data movement.

Module 5: 8051 microcontroller introductions (6 Hours)

Microcontroller- 8051 basics, architecture, Internal RAM, SFR area,
Instruction set and basic interfacing programes.

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Lecture Plan
Sl no. Topic Hours
1. Introduction To Microprocessor & 2
Computer
2. 8085 Architecture 2

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Prerequisite
Understanding of
◦ Digital system
◦ Digital number system
◦ Digital Logic

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

References
[1] Ramesh S. Goankar, “Microprocessor Architecture,
Programming and Applications with 8085”, 5th Edition, Prentice
Hall
[2] K. Uday Kumar and B. S. Umashankar, ”8085 Microprocessor”,
Pearson India, 2008.
[3] D. V. Hall, “Microprocessors & Interfacing”, McGraw Hill
Higher Education, 1991.

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Virtual Lab:
8085 Simulator: http://vlabs.iitb.ac.in/vlabs-
dev/labs_local/microprocessor/labs/exp7/procedure.php

8051 Simulator: http://vlabs.iitb.ac.in/vlabs-dev/labs/8051-

Microcontroller-Lab/labs/index.php

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Logical Instructions
These instructions perform logical operations on data
stored in registers, memory and status flags.

The logical operations are:

◦ AND
◦ OR
◦ XOR
◦ Rotate
◦ Compare
◦ Complement
AND, OR, XOR
Any 8-bit data, or the contents of register, or memory
location can logically have
◦ AND operation

◦ OR operation

◦ XOR operation

with the contents of accumulator.

The result is stored in accumulator.
Rotate
Each bit in the accumulator can be shifted
either left or right to the next position.
Compare
Any 8-bit data, or the contents of register, or memory
location can be compares for:
◦ Equality

◦ Greater Than

◦ Less Than

with the contents of accumulator.

The result is reflected in status flags.

Complement
The contents of accumulator can be
complemented.
Each 0 is replaced by 1 and each 1 is replaced
by 0.
Logical Instructions
Opcode Operand Description
CMP R Compare register or memory with
M accumulator

The contents of the operand (register or memory)

are compared with the contents of the
accumulator.
Both contents are preserved .
The result of the comparison is shown by setting
the flags of the PSW as follows:
Logical Instructions
Opcode Operand Description
CMP R Compare register or memory with
M accumulator

if (A) < (reg/mem): carry flag is set

if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags are reset.
Example: CMP B or CMP M
Logical Instructions
Opcode Operand Description
CPI 8-bit data Compare immediate with accumulator

The 8-bit data is compared with the contents of

accumulator.
The values being compared remain unchanged.
The result of the comparison is shown by setting the
flags of the PSW as follows:
Logical Instructions
Opcode Operand Description
CPI 8-bit data Compare immediate with accumulator

if (A) < data: carry flag is set

if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset
Example: CPI 89H
Program Example

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Logical Instructions
Opcode Operand Description
ANA R Logical AND register or memory with
M accumulator

The contents of the accumulator are logically ANDed with the

contents of register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
S, Z, P are modified to reflect the result of the operation.
CY is reset and AC is set.
Example: ANA B or ANA M.
Logical Instructions
Opcode Operand Description
ANI 8-bit data Logical AND immediate with
accumulator

The contents of the accumulator are logically ANDed

with the 8-bit data.
The result is placed in the accumulator.
S, Z, P are modified to reflect the result.
CY is reset, AC is set.
Example: ANI 86H.
Program Example

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Logical Instructions
Opcode Operand Description
ORA R Logical OR register or memory with
M accumulator

The contents of the accumulator are logically ORed with the

contents of the register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: ORA B or ORA M.
Logical Instructions
Opcode Operand Description
ORI 8-bit data Logical OR immediate with accumulator

The contents of the accumulator are logically ORed with the 8-

bit data.
The result is placed in the accumulator.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: ORI 86H.
Program Example

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Logical Instructions
Opcode Operand Description
XRA R Logical XOR register or memory with
M accumulator

The contents of the accumulator are XORed with the contents of

the register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
S, Z, P are modified to reflect the result of the operation.
CY and AC are reset.
Example: XRA B or XRA M.
Logical Instructions
Opcode Operand Description
XRI 8-bit data XOR immediate with accumulator

The contents of the accumulator are XORed with the 8-bit data.
The result is placed in the accumulator.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: XRI 86H.
Program Example

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Logical Instructions
Opcode Operand Description
RLC None Rotate accumulator left

Each binary bit of the accumulator is rotated left by one

position.
Bit D7 is placed in the position of D0 as well as in the Carry flag.
CY is modified according to bit D7.
S, Z, P, AC are not affected.
Example: RLC.
Logical Instructions
Opcode Operand Description
RRC None Rotate accumulator right

Each binary bit of the accumulator is rotated right by one

position.
Bit D0 is placed in the position of D7 as well as in the Carry
flag.
CY is modified according to bit D0.
S, Z, P, AC are not affected.
Example: RRC.
Logical Instructions
Opcode Operand Description
RAL None Rotate accumulator left through carry

Each binary bit of the accumulator is rotated left by one

position through the Carry flag.
Bit D7 is placed in the Carry flag, and the Carry flag is
placed in the least significant position D0.
CY is modified according to bit D7.
S, Z, P, AC are not affected.
Example: RAL.
Logical Instructions
Opcode Operand Description
RAR None Rotate accumulator right through carry

Each binary bit of the accumulator is rotated right by one

position through the Carry flag.
Bit D0 is placed in the Carry flag, and the Carry flag is
placed in the most significant position D7.
CY is modified according to bit D0.
S, Z, P, AC are not affected.
Example: RAR.
RLC vs. RAL
RLC Carry Flag

7 6 5 4 3 2 1 0

Accumulator

Carry Flag

RAL
7 6 5 4 3 2 1 0

Accumulator

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Logical Instructions
Opcode Operand Description
CMA None Complement accumulator

The contents of the accumulator are complemented.

No flags are affected.
Example: CMA.
Logical Instructions
Opcode Operand Description
CMC None Complement carry

The Carry flag is complemented.

No other flags are affected.
Example: CMC.
Logical Instructions
Opcode Operand Description
STC None Set carry

The Carry flag is set to 1.

No other flags are affected.
Example: STC.
Manipulating Addresses
Now that we have a 16-bit address in a register pair,
how do we manipulate it?
◦ It is possible to manipulate a 16-bit address stored in a
register pair as one entity using some special
instructions.
◦ INX Rp (Increment the 16-bit number in the register pair)
◦ DCX Rp (Decrement the 16-bit number in the register pair)
◦ The register pair is incremented or decremented as one
entity. No need to worry about a carry from the lower
8-bits to the upper. It is taken care of automatically.

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Logic Operations
These instructions perform logic operations on the
contents of the accumulator.
◦ ANA, ANI, ORA, ORI, XRA and XRI
◦ Source: Accumulator and
◦ An 8-bit number
◦ The contents of a register
◦ The contents of a memory location
◦ Destination: Accumulator
ANA R/M AND Accumulator With Reg/Mem
ANI # AND Accumulator With an 8-bit number

ORA R/M OR Accumulator With Reg/Mem

ORI # OR Accumulator With an 8-bit
number
XRA R/M XOR Accumulator With Reg/Mem
XRI # XOR Accumulator With an 8-bit number
DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA
Logic Operations
Complement:
◦ 1’s complement of the contents of the
accumulator.
◦ CMA No operand

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Additional Logic
Operations
Rotate
◦ Rotate the contents of the accumulator one
position to the left or right.
◦ RLC Rotate the accumulator left.
◦ Bit 7 goes to bit 0 AND the Carry flag.
◦ RAL Rotate the accumulator left through the carry.
◦ Bit 7 goes to the carry and carry goes to bit 0.
◦ RRC Rotate the accumulator right.
◦ Bit 0 goes to bit 7 AND the Carry flag.
◦ RAR Rotate the accumulator right through the carry.
◦ Bit 0 goes to the carry and carry goes to bit 7.

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA

Logical Operations
Compare
◦ Compare the contents of a register or memory location
with the contents of the accumulator.
– CMP R/M Compare the contents of the register or
memory location to the contents of the
accumulator.
– CPI # Compare the 8-bit number to the
contents of the accumulator.

◦ The compare instruction sets the flags (Z, Cy, and S).
◦ The compare is done using an internal subtraction that
does not change the contents of the accumulator. A – (R
/ M / #)

DEPARTMENT OF APPLIED PHYSICS, UNIVERSITY OF CALCUTTA