Practical Buck Design Revised 2018
Practical Buck Design Revised 2018
Dr. TAUFIK
[email protected]
http://www.ee.calpoly.edu/faculty/taufik
Outline
• DC-DC Converter Basics
• Design Equations
• Loss Considerations
• Layout Considerations
• Efficiency Improvements
• Controller
VS
Wants: Wants:
to switch
DC Voltage and DC controller
DC Voltage and DC
Current Current
Wants:
No AC Component
No Harmonics
Gets: Gets:
Needs Filtering
VS
VS
Controller
• Two types of Conduction Modes
– Continuous Conduction Mode (CCM)
where Inductor current remains positive
throughout the switching period
– Discontinuous Conduction Mode (DCM)
where Inductor current remains zero for
some time in the switching period
– Boundary Conduction Mode (BCM)
Practical Design of Buck Converter Taufik | Page 14
The Basic Topology
CCM
DCM
iL
• Thus:
iL
iSwitch
iDiode
IF
iL max iL iL max 1 D T
2iL max iL 1 D
2 T 2
I F I L 1 D I o 1 D
I F I o max 1 Dmin
Practical Design of Buck Converter Taufik | Page 35
Schottky Diode Rating Example
Courtesy of Infineon
iC
0 t
ON OFF ON OFF ON OFF
T 2T 3T
+Q
iC
-Q t
T/2
VO
1 T iL iL 1 D T 1 D VO
q Area L
2 2 2 8 f 8f 8Lf 2
q C Vo C
q
1 D VO
1 D
Vo 8 Lf Vo 8 Lf 2 Vo VO
2
C
1 Dmin
8Lf 2 Vo VO Percent Vopp
Practical Design of Buck Converter Taufik | Page 39
Sizing Output Capacitor: RMS Current Rating
iLmax – Io = ∆iL/2
iC
ON OFF ON OFF ON OFF
t
T 2T 3T
0 t
ON OFF ON OFF ON OFF
– D*IO
T 2T 3T
q Area toff D I O 1 D T D I O
1 D D IO
f
1 D D IO
q C Vin C
q
f
1 D D IO
Vin Vin f Vin
C
1 D D I O max
f Vin
Practical Design of Buck Converter Taufik | Page 42
Sizing Input Capacitor: RMS Current Rating
iC iLmax – D*IO
0 t
ON OFF ON OFF ON OFF
– D*IO
T 2T 3T
Recall
2
iL
D I o
2
I Crms I o D 1
2 Io
Practical Design of Buck Converter Taufik | Page 43
To Summarize
1 (1 Dmin )
I L max V0
I Switch max I o max Dmax R
min 2 Lf
Vswitch-max = Vinmax (1 Dmax ) Rmax
LC
2f
C
1 Dmin
i
2
8 Lf 2 Vo VO
I o D 1 L D I o
I F I o max 1 Dmin
2
I Crms
2 I o Vcmax = Vo + ∆Vo/2
C
1 D D I O max VRRM = Vinmax
iCrms
1 Dmin VO
f Vin 2 3L
Practical Design of Buck Converter Taufik | Page 44
Simple Buck Design: 12V to 2.5V 1A
Given: Vs 12V Vo 2.5V Iomax 1A
Solution:
Vo
D D 0.208
Vs
Inductor:
( 1 D) Vo 4
Lcrit Lcrit 1.979 10 H
2 f Ioccm
6
Choose: L 200 10 H
( 1 D) Vo
ILmax Iomax ILmax 1.099 A
2 Lf
( 1 D) Vo
IL IL 0.198 A
Lf
Practical Design of Buck Converter Taufik | Page 45
Simple Buck Design: 12V to 2.5V 1A
MOSFET:
Vds Vs Vds 12 V
Id DIomax Id 0.208 A
Diode:
Vrrm Vs Vrrm 12 V
If ( 1 D) Iomax If 0.792 A
Capacitor:
%VoVo
Vcmax Vo Vcmax 2.513 V
2
( 1 D) 1 5
C C 1.979 10 F
2 %Vo
8 Lf
6
Choose Co 50 10 F
( 1 D)
%Vo %Vo 0.396 %
2
8 Lf Co
Practical Design of Buck Converter Taufik | Page 46
Simple Buck Design: 12V to 2.5V 1A L1
1 2
200u
S1
-
++
-
V1 Sbreak D1 R1
12 Dbreak C1
2.5
50u
V1 = 0 V2
V2 = 1
TD = 0
TR = 10n
TF = 10n
PW = {(3.185/12)*(1/50k)}
PER = {1/50k}
1.00A
SEL>>
0.59A
I(L1)
2.0A
Input Current
1.0A
0A
3.6800ms 3.7000ms 3.7200ms 3.7400ms 3.7600ms 3.7800ms 3.8000ms 3.8182ms
-I(V1)
Time
Analog Devices
www.analog.com
Analog Devices
www.analog.com
Analog Devices
www.analog.com
1.24 Voltage
Reference
• Note that Vreference and Vout are known, R1 and R2 are not
• Select R2 then solve for R1 (since R1 may use potentiometer)
• If say R2 is chosen to be 100 k, then for a 5V output with 1.24V reference
the R1 value will be
0
I
L1 Vout
+
-
Sbreak 1 2
V1 50u
V
R1a Vfb
48 C1 {Rtop}
D1 R1
Dbreak 50u
R1b
{mult*((ratio*Rtop)/(1-ratio))}
0 {(100/percentload)*(Vo/10)}
4
COMPARATOR Vg
{Vref} 100 IN+ OUT+
0 IN- OUT-
Vfb EVALUE
LIMIT(1MEG*V(%IN+, %IN-),5,0)
V1 = 5 Vtri
V2 = 0
TD = 0
TR = {5u-10n} 0
TF = {5u-10n}
PW = 20n 0
PER = {1/100k}
(12.008 V)
10V
SEL>>
0V
V(Vout)
30A
20A
(10.000 Amps)
10A
0A
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms
I(L1)
Time
(12.023 V)
12.0000V
11.9800V
(11.977 V)
SEL>>
11.9695V
V(Vout)
11A
Inductor Current Ripple at Maximum Load
(9.1136 Amps)
10A
(10.883 Amps)
9A
4.68517ms 4.69000ms 4.69500ms 4.70000ms 4.70500ms 4.71000ms 4.71500ms
I(L1)
Time
Pstatic I switch
2
rms RDSon
2
iL
Pstatic I o D 1 RDSon
2 Io
Practical Design of Buck Converter Taufik | Page 65
Switching Loss of MOSFET
• The switching loss depends on how the voltage and current
overlaps
• May be approximated with a scenario where voltage and
current start moving simultaneously and reach their
endpoints
• The overlap causes power loss (V x I)
• Will assume to occur both at turn-on and turn-off transitions
ton toff
Practical Design of Buck Converter Taufik | Page 66
Switching Loss of MOSFET
turn on Io Io turn off
VIN VIN
0
ton toff
I oVinton I oVintoff
P(ton ) P (toff )
6T 6T
• Gate drive loss comes from the total gate charge Qgate
and the gate drive voltage Vgate used
Average RMS
Values Value
From datasheet
I f 1 D I o I f
1 D I 2
max min I max I min
2
I
3
Id0
t rra I rrm
dI d
dt t1( rr )
t rrb 1.11 t rr t rra
t 2rr , t 3rr k rr t rrb
Average
Inductor
Current, I
iC
ON OFF ON OFF ON OFF
t
T 2T 3T
Vonom
Nominal Duty Cycle: D 0.5
Vinom
Vonom2
( 1 D)
Critical Inductance: Lc
Iccm Pomax 12.000H
2 Fs
ILopk Vonom
1 ( 1 D)
Peak Inductor Current: 10.06A
2 2 Lo Fs
Vonom
Pomax
Switch Voltage: Vswmax Vinom 24V
Pomax
Switch Current: Id D 5A
Vonom
0.01
5
10
Loadn 20
Pomax
100 30
Output Current Array: Io
n
Vonom 40
50
Static Loss: 60
70
Idrms Io D 1 Iccm 80
n n
90
n n 2
Pmos1 Io D 1 Iccm Rdson 100
n n
Pd3 0.4 Vfp Vf tfr Ifavg Fs
n
0.905
2
IL
1 2 0.86
ILrms Io 1 PLo ILrms RLo
n n 3 2 Io n n 0.815
n 0.77
Efficiency
n 0.725
0.635
IL 2
Icrms 0.035A Pc Icrms ESR 0.59
2 3 0.545
0.5
0 10 20 30 40 50 60 70 80 90 100
Po
n
Efficiency ==>
n Po Ptotal
n n
pswitching(t)
Ion Ion
Voff Voff
0
turn on turn off
Texas Instruments
= 2k
= 10nF