19-5031; Rev 0; 11/09

TION KIT
EVALUA BLE
AVA A
IL

Single-Phase Power-Measurement
IC with I2C Interface
General Description Features

MAXQ314
The MAXQ314 is a dedicated power-measurement IC S High-Performance, Low-Power DSP Core
that collects and calculates voltage, current, power, and S On-Chip Digital Temperature Sensor
power factor for a single-phase load. The results can
S Precision Internal Voltage Reference
be retrieved by an external master through the internal
I2C bus. This bus is also used by the external master to S Active Power (W), < ±0.5% Error
configure the operation of the MAXQ314 and monitor the S Reactive Power (VAR), < ±0.7% Error
status of operations.
S Apparent Power (VA), < ±0.7% Error
The MAXQ314 performs voltage and current measure-
S Power Factor, < ±1% Error
ments using an integrated ADC that can measure voltage
and current. Other values such as power are calculated S Voltage RMS, < ±0.2% Error
from that data. The MAXQ314 also has an integrated S Current RMS, < ±0.5% Error
temperature sensor that provides the die temperature on
S I2C-Compatible Serial Interface
demand. The internal current amplifier produces up to
32x gain and the voltage amplifier gain is 1x. S Continuous Output of IRMS in Serial or PWM

Applications
Single-Phase AC Power Monitoring
Ordering Information
PART OPERATING VOLTAGE (V) TEMP RANGE PIN-PACKAGE
MAXQ314+ 3.0 to 3.6 -40NC to +85NC 20 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Block Diagram

MAXQ314
TEMP SENSOR

VP MUX PGA ADC

VN
IL
INTERNAL
REFERENCE

WATCHDOG SCL
TIMER SDA
I2C
A0
INTERFACE
A1
16-BIT
A2
MAXQ20
RISC CPU
BUS DSP
AVDD
POWER-ON SERIAL/PWM AUX
AGND
RESET
DVDD
(AVDD, DVDD) INTERNAL
DGND
8MHz CLOCK RST
GENERATOR

MAXQ is a registered trademark of Maxim Integrated Products, Inc.

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata.

________________________________________________________________ Maxim Integrated Products   1

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
 Single-Phase Power-Measurement
IC with I2C Interface
MAXQ314

TABLE OF CONTENTS
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Power-Monitoring Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
I2C Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
I2C Bus Controller Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Reset Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Voltage Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
I2C Slave Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
I2C Rate and Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
I2C Slave Address Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
I2C Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Data and Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Conversion to Physical Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
RMS Current Continuous Output (AUX Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Grounds and Bypassing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Specific Design Considerations for MAXQ314-Based Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Additional Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Development and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2   _______________________________________________________________________________________
 Single-Phase Power-Measurement
IC with I2C Interface

MAXQ314
LIST OF FIGURES
Figure 1. Series Resistors (RS) for Protecting Against High-Voltage Spikes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. I2C Bus Controller Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Calibration Circuit Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

LIST OF TABLES
Table 1. Slave Address Determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 2. Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 3. DSPCFG Register Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Calibration Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

_______________________________________________________________________________________   3
 Single-Phase Power-Measurement
IC with I2C Interface
ABSOLUTE MAXIMUM RATINGS
MAXQ314

Voltage Range on DVDD with Voltage Range on Any Lead with

Respect to DGND..............................................-0.3V to +4.0V Respect to (DGND = AGND)................................-0.3V to +4V
Voltage Range on AVDD with Operating Temperature Range........................... -40NC to +85NC
Respect to AGND..............................................-0.3V to +4.0V Storage Temperature Range............................ -65NC to +150NC
Voltage Range on AGND with Continuous Power Dissipation (TA = +70NC)
Respect to DGND..............................................-0.3V to +0.3V 20-Pin TQFN (derate 20.8mW/NC above +70NC)........1667mW
Voltage Range on AVDD with ESD Protection (Human Body Model) ................................Q2kV
Respect to DVDD...............................................-0.3V to +0.3V Soldering Temperature.......................... Refer to the IPC/JEDEC
J-STD-020 Specification.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

POWER-MONITORING SPECIFICATIONS
(VAVDD = VDVDD = 3.0V to 3.6V, TA = +25NC.) (Note 1)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Active-Power Error Current input DR 500:1 0.5 %
Reactive-Power Error Current input DR 500:1 0.7 %
Apparent-Power Error Current input DR 500:1 0.7 %
Power-Factor Error Current input DR 500:1 0.1 %
RMS Voltage Error Current input DR 30:1 0.2 %
RMS Current Error Current input DR 500:1 0.5 %

ELECTRICAL CHARACTERISTICS
(VAVDD = VDVDD = 3.0V to 3.6V, TA = +25NC, unless otherwise noted.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER SUPPLY
Digital Supply Voltage VDVDD 3.0 3.6 V
Supply Current IDVDD IDVDD + IAVDD, fCLK = 8MHz 6.5 15.0 mA
Analog Supply Voltage VAVDD 3.0 3.6 V
Supply Voltage Power-Fail Trip Rising, VDVDD = VAVDD 2.75 2.8 2.95 V
UVLO
Point Hysteresis 100 mV
DIGITAL I/O
Input High Voltage (RST) VIH 2.1 V
VDVDD
Input High Voltage (A0, A1, A2) VIH2 V
- 0.3
Input Low Voltage (RST) VIL 0.8 V
Input Low Voltage (A0, A1, A2) VIL2 0.3 V

4   _______________________________________________________________________________________
 Single-Phase Power-Measurement
IC with I2C Interface
ELECTRICAL CHARACTERISTICS (continued)

MAXQ314
(VAVDD = VDVDD = 3.0V to 3.6V, TA = +25NC, unless otherwise noted.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Output Low Voltage (AUX) VOL IOL = 6mA 0.4 V
Input Leakage (A0, A1, A2) IL -12 +12 FA
Input Capacitance (RST, A0,
CIN 10 pF
A1, A2)
RST Pullup Resistance RRST 50 150 200 kI
INTERNAL OSCILLATOR
Oscillator Frequency fSCLK 7.2 8 8.8 MHz
AFE AND ANALOG-TO-DIGITAL CONVERTER
Voltage Range (VP) 0 1.5 V
Voltage Range (VN) 0 1.5 V
Slow Current Channel (IL) 0 1.5 V
Input Capacitance Single-Ended 10 pF
ADC Sampling Rate Per channel 5 ksps
INTERNAL VOLTAGE REFERENCE
Reference Accuracy TA = -40NC to +85NC 1.8 2.07 2.3 V
TEMPERATURE SENSOR
Temperature Accuracy TEP = -40NC to +85NC 3 NC

I2C ELECTRICAL CHARACTERISTICS

(VAVDD = VDVDD = 3.0V to 3.6V, TA = -40NC to +85NC.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN MAX UNITS

Input Low Voltage VIL_I2C 0.3 x VDVDD V
Input High Voltage VIH_I2C 0.7 x VDVDD V
Input Hysteresis (Schmitt) VIHYS_I2C VDVDD > 2V (Note 1) 0.05 x VDVDD V
Output Logic-Low (Open Drain
VOL_I2C VDVDD > 2V, 6mA sink current 0 0.4 V
or Open Collector)
Input voltage from 0.1 x VDVDD to 0.9 x
Input Current on I/O IIN_I2C -10 +10 FA
VDVDD
I/O Capacitance CIO_I2C (Note 1) 10 pF

_______________________________________________________________________________________   5
 Single-Phase Power-Measurement
IC with I2C Interface
I2C BUS CONTROLLER TIMING
MAXQ314

(VDVDD = 3.0V to 3.6V, TA = +25NC, unless otherwise noted. Typical values are at VDVDD = 3.3V, TA = +25NC.) (Note 1, Figure 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Serial Clock Frequency fSCL 400 kHz
Bus Free Time Between a STOP
tBUF 1.3 Fs
and a START Condition
Hold Time (Repeated) START
tHD:STA 0.6 Fs
Condition
Repeated START Condition
tSU:STA 0.6 Fs
Setup Time
STOP Condition Setup Time tSU:STO 0.6 Fs
Data Hold Time tHD:DAT (Note 3) 0.9 Fs
Data Setup Time tSU:DAT 120 ns
SCL Clock Low Period tLOW 1.3 Fs
SCL Clock High Period tHIGH 0.6 Fs
Rise Time of Both SDA and SCL 20 +
tR_I2C (Notes 4, 5) 300 ns
Signals Receiving 0.1CB
Fall Time of Both SDA and SCL 20 +
tF_I2C (Notes 4, 5) 300 ns
Signals Receiving 0.1CB
20 +
Fall Time of SDA Transmitting tF_TX (Notes 4, 5) 250 ns
0.1CB
Pulse Width of Spike Suppressed tSP (Note 6) 50 ns
Capacitive Load for Each Bus
CB (Note 5) 400 pF
Line

Note 1: Specifications guaranteed, but not production tested.

Note 2: All parameters tested at TA = +25NC. Specifications over temperature are guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 4: ISINK P 6mA. tR_I2C and tF_I2C measured between 0.3 x VDVDD and 0.7 x VDVDD.
Note 5: CB = Total capacitance of one bus line in pF.
Note 6: Guaranteed by design. Input filters on the SDA and SCL pins suppress noise spikes less than 50ns.

6   _______________________________________________________________________________________
 Single-Phase Power-Measurement
IC with I2C Interface

MAXQ314
VDVDD

I2C I2C
DEVICE DEVICE
MAXQ314 RP RP

RS RS RS RS

SDA
SCL

Figure 1. Series Resistors (RS) for Protecting Against High-Voltage Spikes

S SR P S

SDA

tBUF
tF_I2C tR_I2C

tLOW tSU:DAT tSU:STA

SCL

tHD:STA tHIGH
tHD:DAT tSU:STO

Figure 2. I2C Bus Controller Timing Diagram

_______________________________________________________________________________________   7
 Single-Phase Power-Measurement
IC with I2C Interface
MAXQ314

Pin Configuration

TOP VIEW

RST
REF
VN

A0

A1
15 14 13 12 11

VP 16 10 A2

AVDD 17 9 N.C.

AGND 18 MAXQ314 8 SDA

IL 19 7 SCL

N.C. 20 EP* 6 N.C.

+

1 2 3 4 5
AUX

N.C.

DGND

DVDD

N.C.

TQFN
(5mm × 5mm)
*EXPOSED PAD.

Pin Description
PIN NAME FUNCTION
POWER PINS
3 DGND Digital Ground. AGND and DGND should be connected externally through a single point connection.
4 DVDD Digital Supply Voltage. Connect AVDD to DVDD externally. Connect a 0.1FF capacitor to DGND.
Buffered Reference Output. Connect this pin to AGND through a 1FF capacitor. No other signals should be
14 REF
connected to this pin.
17 AVDD Analog Supply Voltage. Connect AVDD to DVDD externally. Connect a 0.1FF capacitor to AGND.
18 AGND Analog Ground. AGND and DGND should be connected externally through a single point connection.
— EP Exposed Pad. Connect to AGND.
COMMUNICATION AND CONTROL PINS
RMS Current Continuous Output. This open-drain pin continuously outputs the value of the most recent 16-bit
1 AUX
RMS current measurement. If the SPCFG.PWMOUT bit is set, the value is instead output in PWM format.
7 SCL I2C Clock Line I/O
8 SDA I2C Data Line I/O
10 A2
11 A1 Device Selection Address Bits, Input. These bits select the slave address shown in Table 1.
12 A0
Active-Low Reset Input. The CPU is held in reset when this pin is low. The pin includes pullup current
13 RST
source and should be driven by an open-drain external source capable of sinking in excess of 4mA.

8   _______________________________________________________________________________________
 Single-Phase Power-Measurement
IC with I2C Interface
Pin Description (continued)

MAXQ314
PIN NAME FUNCTION
VOLTAGE AND CURRENT MEASUREMENT PINS
15 VN Differential Voltage Negative Input
16 VP Differential Voltage Positive Input
19 IL Single-Ended Current Input, Low Frequency
NO CONNECTION PINS
2, 5, 6,
N.C. No Connection. Do not connect any signal to this pin.
9, 20

Detailed Description Voltage Monitor

The device is held in reset any time the power supply
The MAXQ314 is a dedicated analog front-end (AFE) that AVDD drops below the supply voltage power-fail thresh-
measures voltage, current, and temperature. The internal old. Once the power supply rises above the supply volt-
DSP then derives calculated values. It communicates age power-fail level, the device exits reset, and all reg-
with a master device using the I2C communication proto- isters are reset to their defaults and execution resumes.
col, and continuously executes the following operations:
• S
 cans AFE channels and collects raw voltage and I2C Slave Operation
current samples The MAXQ314 operates as an I2C slave peripheral and
• Calculates power (real, reactive, apparent) requires an external I2C master. All communications
• R
 esponds to register write and read commands from between the two are performed over a standard I2C bus,
the master using commands to read and write values to internal
registers. These registers contain:
It is the master device’s responsibility to ensure that all
configuration registers have been set to their correct val- • Operating mode settings
ues in order to achieve the specified accuracy. • Calibration parameters (supplied by the master)
Clock Source • R
 ead-only registers containing power, current, and
An internal oscillator supplies a system clock of approxi- voltage data
mately 8MHz, varying slightly over temperature and volt- During operation, voltage and current measurements are
age. No external components are needed. taken, filtered, and the collected data is processed. The
output results then can be read by the master from read-
Reset Sources
only registers in parallel with the ongoing measurement
External Reset and processing operations.
An external reset is generated by driving the RST pin
low for at least 1Fs and remains as long as RST is held The device must be initialized by the master with con-
low. Once the external reset has been released, all reg- figuration and calibration parameters following every
isters are cleared to their default states, and the device power-up or reset cycle.
resumes execution.

_______________________________________________________________________________________   9
 Single-Phase Power-Measurement
IC with I2C Interface
I2C Rate and Resets the most significant bit and end with the least significant
MAXQ314

bit. All I2C transfers are 8 bits in length, followed by an

The I2C bus is dedicated to communications with the ACK/NACK bit.
master device. The master device initiates all communi-
cations. During an I2C transfer, data is transmitted and The clock rate used for the I2C interface is determined
received over the serial data line (SDA) with respect to by the bus master, but can be at most 400kHz. The
a serial shift clock (SCL). I2C transfers always start with MAXQ314 can hold the SCL line low while processing
commands to delay reception of further data. For fre-
quencies at or below 100kHz, the delay can be transpar-
Table 1. Slave Address Determination ent, but at 400kHz delays can be noticeable.
A2 A1 A0 SLAVE ADDRESS :7 A timeout provision resets the I2C controller if a low level
L L L 60h (1100 000b) is detected on the SCL pin for a period of 30ms. The I2C
L L Z 61h (1100 001b)
controller returns to its default state, and the SDA and
SCL pins go their idle state.
L L H 62h (1100 010b)
L Z L 63h (1100 011b) I2C Slave Address Generation
L Z Z 64h (1100 100b)
The A2, A1, and A0 pins are latched following every
L Z H 65h (1100 101b) reset and used to construct the 7-bit slave address as
L H L 66h (1100 110b) shown in Table 1. The pin states are represented by L for
L H Z 67h (1100 111b) logic 0, H for logic 1, and Z for high impedance.
L H H 68h (1101 000b)
I2C Protocol
Z L L 69h (1101 001b)
The I2C protocol supports bus timeout and optionally
Z L Z 6Ah (1101 010b) packet-error checking. When packet-error checking is
Z L H 6Bh (1101 011b) enabled by setting the PECEN bit (DSPCFG.3) to 1, a
Z Z L 6Ch (1101 100b) packet-error code (PEC) byte is appended at the end
Z Z Z 6Dh (1101 101b) of each transaction. The byte is calculated as CRC-8
Z Z H 6Eh (1101 110b) checksum, calculated over the entire message including
Z H L 6Fh (1101 111b) the address and read/write bit. The polynomial used is
x8 + x2 + x + 1 (the CRC-8-ATM HEC algorithm, initial-
Z H Z 70h (1110 000b)
ized to zero).
Z H H 71h (1110 001b)
Commands are read and write, the command code byte
H L L 72h (1110 010b)
being an address of a register to read/write. Data length
H L Z 73h (1110 011b)
is 2 bytes for most registers, both read and write; 3 bytes
H L H 74h (1110 100b) for power (P, Q, S, PAVG), VRMS, and IRMS read com-
H Z L 75h (1110 101b) mands. The MAXQ314 could be unable to report data
H Z Z 76h (1110 110b) like power, IRMS, VRMS, etc., immediately if the read
H Z H 77h (1110 111b) command is received while the requested data is being
H H L 78h (1111 000b) calculated. In such a case, the clock line is held low
H H Z 79h (1111 001b) until the calculation completes or a bus timeout occurs.
The firmware does not support ARA address or address
H H H 7Ah (1111 010b)
broadcast features.

10   �������������������������������������������������������������������������������������
 Single-Phase Power-Measurement
IC with I2C Interface
Data and Control Registers surement values taken by the device. All the read/write

MAXQ314
registers are calculation coefficients set by the master.
All transactions consist of the master writing to or read- The only exceptions are the DSPCFG register, which
ing from data, configuration, or control registers. Each configures operating features of the device, and the
register has an 8-bit address. There are several catego- ADC_AZ register, which resets the internal ADC when it
ries of internal registers; read-only registers return mea- is written to.

READ WORD
S ADDR:7 W A CMD:8 A SR ADDR:7 R A D0:8 A D1:8 N P

READ LONG
S ADDR:7 W A CMD:8 A SR ADDR:7 R A D0:8 A D1:8 A D2:8 N P

WRITE WORD
S ADDR:7 W A CMD:8 A D0:8 A D1:8 A P

READ WORD WITH PEC

S ADDR:7 W A CMD:8 A SR ADDR:7 R A D0:8 A D1:8 A PEC:8 N P

READ LONG WITH PEC

S ADDR:7 W A CMD:8 A SR ADDR:7 R A D0:8 A D1:8 A D2:8 A PEC:8 N P

WRITE WORD WITH PEC

S ADDR:7 W A CMD:8 A D0:8 A D1:8 A PEC:8 A P

A = ACKNOWLEDGE (ACK) BIT

ADDR:7 = 7-BIT DEVICE ADDRESS; MUST MATCH THE ADDRESS SELECTED BY A[2:0]
CMD:8 = REGISTER/COMMAND SELECTED IN TABLE 2
D0:8 = 8-BIT DATA; MULTIBYTE COMMANDS CAN REQUIRE D0, D1, D2, ETC.
PEC:8 = 8-BIT PEC DATA
N = NEGATIVE ACKNOWLEDGE (NACK) BIT
P = STOP BIT
S = START BIT
SR = REPEATED START BIT
W = WRITE BIT

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 Single-Phase Power-Measurement
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Table 2. Register Set
MAXQ314

NAME DESCRIPTION ACCESS BITS CMD CODE

P Active power R 23:0 0100 0010b (0x42)
Q Reactive power R 23:0 0011 0010b (0x32)
S Apparent power R 23:0 0011 1010b (0x3A)
PAVG Average power R 23:0 0101 1010b (0x5A)
VRMS RMS-voltage R 23:0 0100 1010b (0x4A)
IRMS RMS-current R 23:0 0101 0010b (0x52)
PF Power factor; LSB = 2-16 R 23:0 0011 1100b (0x3C)
RAWTEMP Temperature sample R 15:0 0000 0111b (0x07)
PA Phase-angle compensation coefficient R/W 15:0 0010 0100b (0x24)
I_GAIN Current gain coefficient R/W 15:0 0010 1011b (0x2B)
V_GAIN Voltage gain coefficient R/W 15:0 0010 1010b (0x2A)
DSPCFG DSP configuration R/W 15:0 0010 0010b (0x22)
LPFC Lowpass filter compensation R/W 15:0 0010 0011b (0x23)
SUMCNT Number of sampling frames per DSP cycle R/W 15:0 0011 0100b (0x34)
ADC autozero operation. The master issues this command only
when it is initializing the MAXQ314. Any value written to this
ADC_AZ W 7:0 0000 1111b (0x0F)
register initiates a reset of the ADC, which takes approximately
1.5ms to complete.
P_OFFS Offset added to the P register R/W 15:0 84
P_GAIN Gain added to the P register R/W 15:0 8c
IK Correction factor for IRMS calculation R/W 15:0 B2
IGV Voltage-dependent gain correction factor for IRMS calculation R/W 15:0 ba
I_OFFS Offset for IRMS calculation R/W 15:0 ac
I_OV Voltage-dependent offset for IRMS calculation R/W 15:0 ac

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Table 3. DSPCFG Register Detail

MAXQ314
BIT NAME DESCRIPTION
1 = disable IL measurements
0 DISIL
0 = enable IL measurements (default)
1 RESERVED Must be set to 1
2 RESERVED Must be set to 0
1 = PEC enabled for I2C transmission
3 PECEN
0 = PEC disabled for I2C transmission (default)
1 = Begin accumulating PAVG
4 AVGP
0 = Stop accumulating PAVG (default)
1 = PAVG calculation complete
5 AVGRD 0 = PAVG calculation in progress, following AVGP 1 R 0
(This bit is automatically cleared the next time the master sets AVGP to 1.)
1 = AUX pin outputs in PWM format
6 PWMOUT
0 = AUX pin outputs in digital format (default)
1 = Disable gain switching
7 DISPGA
0 = Enable gain switching (recommended, default)
1 = PGA for IL = x4 (default)
8 ILPGA
0 = PGA for IL = x1
1 = AC mode
9 ACMODE
0 = DC mode (default)
10:11 RESERVED —
Reset Status Indicator. These bits allow the master to determine if the MAXQ314 has per-
formed a reset since the last time these bits were cleared. When these bits are 1111, the
12:15 RESET_STATUS MAXQ314 has performed a reset. After the bits have been read, the master must write 0000
to these bits to clear the reset indicator. Writing to and reading from these bits does not
affect processor operation or cause a reset; they are only status bits.

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 Single-Phase Power-Measurement
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MAXQ314

Calibration The following equations convert “meter” units into physi-

cal units:
Four parameters can be calibrated to optimize system
performance. Voltage (V) = VRMS x VTR x VREF/224
Current (A) = IRMS x ITR x VREF/224
Conversion to Physical Units Active Power (kW) = P x VTR x ITR x VREF x VREF/
The output registers are in “meter” units, and need to be (103 x 224)
scaled with the input circuits to yield meaningful physical Reactive Power (kVAR) = Q x VTR x ITR x VREF x VREF/
values. Two conversion coefficients are needed: the volt- (103 x 224)
age transducer ratio (VTR) and the current transducer
ratio (ITR), each specifying the ratio between the input Apparent Power (kVA) = S x VTR x ITR x VREF x VREF/
and output of the corresponding transducer. The VTR (103 x 224)
represents the input voltage that would produce a 1V where VREF is the reference voltage on the REF pin in
signal on the VP or VN pin. The ITR represents the input volts.
current that would produce a 1V signal on the IL pin. The current RMS correction is:
For example, if the voltage-sensing circuit consists of a IRMS = I_OFFS + I_OV x VRMS + [(I_GAIN +IGV x
749kI and 1kI resistor-divider, then VTR = 750(V/V). VRMS)IMU + IK/IMU]
If the current-sensing circuit is a 20mI shunt, then 50A
current would produce 1V signal on the IL pin, so ITR = where IMU is the current measured in meter units before
50(A/V). correction.
Voltage RMS correction is:
LINE VRMS = V_GAIN x VMU
where VMU is the voltage measured in meter units before
749kΩ correction.
VP Active power correction is:
LOAD
P = V_GAIN x I_GAIN x P_GAIN x (P_OFFS + PMU)
1kΩ
MAXQ314 where PMU is the active power measured in meter units
before correction.
IL
Apparent power is computer from the corrected voltage
20mΩ and current:
NEUTRAL
AGND
S = VRMS x IRMS
Reactive power is computer from corrected S and P:

Figure 3. Calibration Circuit Example Q = S2 − P2

Table 4. Calibration Parameters

REGISTER DESCRIPTION
Voltage Gain Factor. This factor affects the voltage RMS output and power output. The VRMS output is scaled
V_GAIN
by (1 + V_GAIN/216). V_GAIN is a signed integer and defaults to 0x0000h.
Current Gain Factor. This factor affects the current RMS output and power output. The IRMS output is scaled by
I_GAIN
(1 + I_GAIN/216). I_GAIN is a signed integer and defaults to 0x0000h.
PA Phase-Angle Compensation
Lowpass Filter Coefficient. This factor affects the lowpass filtering. It can be left unchanged for typical configura-
tions. It is defined as:
LPFC
LPFC ~ G x fC x tFR x 216, where fC is the corner frequency
Default value ~ 3.14 x 1.82 (Hz) x 200 x E - 6 (s) x 216 = 75 = 0x004B

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MAXQ314
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

SYNC SAMPLE DATA FRAME GAP SYNC SAMPLE DATA FRAME GAP

1 1 0 0 D D D D D D D D D D D D D D D D L L L L 1 1 0 0 D D D D D D D D D D D D D D D D L L L L

RMS Current Continuous Output failure (damage to the silicon inside the device) or a soft
failure (unintentional modification of memory contents).
(AUX Pin) Voltage spikes above or below the device’s absolute
The AUX pin can be configured to output a 16-bit RMS maximum ratings can potentially cause a devastating IC
current value. Bit time is 2000 system clocks, or a typical latchup.
data rate of 4kbps. The bit format is pulse-width modula- Microcontrollers commonly experience negative volt-
tion, in which each bit cell is divided into four time slices. age spikes through either their power pins or general-
At the first time slice, the data line switches from a zero purpose I/O pins. Negative voltage spikes on power pins
state to a one state. Then, if the bit to be transmitted is a are especially problematic as they directly couple to the
zero, the data line switches back to zero after one time internal power buses. Devices such as keypads can
slice. If the bit to be transmitted is a one, the data line conduct electrostatic discharges directly into the micro-
switches back to zero after three time slices. controller and seriously damage the device. System
A data frame consists of one complete 20-bit sample designers must protect components against these tran-
word and a frame delimiter. The frame delimiter consists sients that can corrupt system memory.
of the data line idling in a low state for nominally four bit
times (tBIT). Specific Design Considerations for
MAXQ314-Based Systems
The receiver detects the first rising edge of the sync To reduce the possibility of coupling noise into the
field and synchronizes on the 1100 pattern. The receiver microcontroller, the systems that use an external crystal
should be synchronized by the time the first data bit is should be designed with a crystal in a metal case that
available. After 16 data bits, the data line becomes idle is grounded to the digital plane. Doing so reduces the
for four tBIT periods, after which the next synchronization susceptibility of the design to fast transient noise.
bit begins.
Because the MAXQ314 is used in systems where high
The AUX pin can output continuous PWM as well by voltages are present, care must be taken to route all
setting the PWMOUT (DSPCFG.6) bit. The PWM output signal paths, both analog and digital, as far away as pos-
period is 65,535 system clocks, or 8.19ms. sible from the high-voltage components. It is possible to
construct more elaborate metering designs using mul-
Applications Information tiple MAXQ314 devices. This can be accomplished by
Grounds and Bypassing using a single I2C bus, but with a different slave address
Careful PCB layout significantly minimizes system-level for each device.
digital noise that could interact with the microcontroller
or peripheral components. The use of multilayer boards Additional Documentation
is essential to allow the use of dedicated power planes. Designers must have the following documents to fully use
The area under any digital components should be a all the features of this device. This data sheet contains
continuous ground plane if possible. Keep any bypass pin descriptions, feature overviews, and electrical speci-
capacitor leads short for best noise rejection and place fications. Errata sheets contain deviations from published
the capacitors as close to the leads of the devices as specifications.
possible. • M
 AXQ314 data sheet, which contains electrical/timing
CMOS design guidelines for any semiconductor require specifications and pin descriptions
that no pin be taken above supply voltage or below • M
 AXQ314 revision-specific errata sheet
ground. Violation of this guideline can result in a hard (www.maxim-ic.com/errata)

______________________________________________________________________________________   15
 Single-Phase Power-Measurement
IC with I2C Interface
Development and Technical Package Information
MAXQ314

Support For the latest package outline information and land pat-
terns, go to www.maxim-ic.com/packages. Note that
Maxim offers the MAXQ314 evaluation kit (EV kit) as an
a “+”, “#”, or “-” in the package code indicates RoHS
aid in developing and prototyping applications based
status only. Package drawings may show a different suf-
on the MAXQ314. The EV kit is a reference design from
fix character, but the drawing pertains to the package
which a developer can begin designing their own sys-
regardless of RoHS status.
tem. The EV kit data sheet contains a schematic of the
board that can be reviewed by engineers who want to PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
perform a preliminary investigation of the device uses 20 TQFN-EP T2055+4 21-0140
before purchasing the EV kit.
Technical support is available at https://support.maxim-
ic.com/micro.

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
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