MEENAKSHI RAMASWAMY ENGINEERING COLLEGE

M.R. Kalvi Nagar, Thathanur, Ariyalur (Dt) – 621 804.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING

LAB MANUAL

REGULATION -2021

EC3462 LINEAR INTEGRATED CIRCUITS

LABORATORY

PREPARED APPROVED
BY BY
V.SEETHA M.ARIVASANTH
AP/ECE HOD/ECE

1
 LIST OF EXPERIMENTS:

DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS

1. Series and shunt feedback amplifiers – frequency response ,Input Output Impedance.
2. RC Phase shift oscillator and Wien bridge oscillator
3. Hartley Oscillator and Colpitts Oscillator.
4. RC Integrator and Differentiator circuits using Op-Amp
5. Clippers and Clampers.
6. Instrumentation amplifier
7. Active low-pass, High-pass and band-pass filters.
8. PLL characteristics and its use as Frequency Multiplier, clock synchronization
9. R-2R Ladder Type D - A Converter using Op amp.

SIMULATION USING SPICE(Using Transistor)

10. Tuned Collector Oscillator
11. Twin-T Oscillator/ Wien bridge oscillator
12. Double and Stagger tuned Amplifiers
13. Bistable Multivibrator
14. Schmitt Trigger circuit with Predictable hysteresis
15. Analysis of power amplifier
16. Analog multiplier
Ex. No: 1 SERIES AND SHUNT FEEDBACK AMPLIFIERS – FREQUENCY RESPONSE ,INPUT
OUTPUT IMPEDANCE

Date:

AIM:

To study the effects of feedback on the amplifier characteristics (gain, bandwidth, input
and output impedance).

APPARATUS REQUIRED

S.NO APPARATUS SPECIFICATION QUANTITY

1. OPAMP IC741 1
2. Resistors 1.2KΩ, 3,Each1
13KΩ,377Ω,12.5KΩ
3. Capacitors 0.1µF 3
4. RPS ±12V 1
5 CRO 1MHz 1
6. Connecting wires - Req.

THEORY
Feedback is a method in which a portion of the output returned to the input in order to modify the
characteristics of the device. Feedback can applied to transistor amplifier circuits to modify their
performance characteristics such as gain, bandwidth, input and output impedance etc. An amplifier in
which feedback is incorporated known as feedback amplifier. Block diagram of typical feedback
amplifier shown in Fig. (1). Feedback can divide in two categories depending upon the phase of the
returned (feedback) signal with respect to the input signal. If the returned signal is in phase with input
signal, feedback is known as positive feedback. It increases the gain of the amplifier but reduces the
bandwidth and stability of the circuit. It used to produce oscillation. If the feedback signal is out of
phase with respect to the input signal, it is know as a negative feedback. Negative feedback improves the
performance of an amplifier but reduces the Over all gain. It helps to stabilize the gain, increases
bandwidth: reduces distortions and assures the repeatability of the circuit performance. There are
number of ways by which a signal can be derived from output and can be returned to input. Therefore
feedback amplifiers can be classified in the following four groups depending upon the interconnections
of the basic amplifier and the input and output terminals of feedback network
(A) Voltage-Shunt Feedback Voltage-Shunt configuration of feedback amplifier is shown in Fig.(2-a).
The feedback network consists of a single resistance Rf. Voltage developed across RL is sampled
and feedback to input through Rf. The shunt connections at input and output terminals reduce input
and Output impedance. The amplifier works as trans-resistance type voltage amplifier

(B) Voltage-Series Feedback Voltage-Series topology of the feedback amplifier is shown in Fig.(2-b).
Voltage developed across load resistance is sampled and feedback to input through resistance R f and
RE (potential divider) as shown in Fig.(3-b). Sampled voltage is proportional to the output voltage
and feedback in series with the input voltage. Series connection at input increases input resistance
and shunt connection at output reduces output resistance.

(C) Current-Shunt Feedback Current-Shunt topology of the feedback amplifier is shown in Fig.(2-
c). Feedback signal is proportional to the output current and feedback to input in shunt. The series
connection at the output increases output resistance and shunt connection at input decreases input
resistance.

(D) Current-Series Feedback In Current-Series configuration feedback signal is proportional to the

load current and fed to input through a resistance RE in series with the input signal as shown in
Fig.(2-d). The series connection at the input and the output increases the input and output
impedance.

Tables (i) and (ii) show the different topologies of the feedback with their analysis and the effect of
negative feedback on amplifier characteristics respectively

Procedure:
1. Connect the circuit as shown in Fig.(4-a).

2. Measure dc collector current Icl without input signal (if the value of Ic1 is not between 4 and
4.5mA, change the value of RB.

3. With disconnect 22k , Set the input voltage at 5 kHz, and then change the input voltage until the
output becomes 4 Vp-p. Then calculate the voltage gain.

4. Measure the output resistances.

5. Find frequency response by measuring voltage gain to different frequencies (30, 100, 200, 500,
lk , 10k, 30k etc). Determine upper and lower half power frequencies and bandwidth.

6. Connect a resistance Rf (feedback network) = 470Kohm between points A and B, and repeat
steps 3 and 4. Determine bandwidth by measuring frequencies at which gain =0.707 times the gain
at 5 kHz.

7. Replace resistance Rf=470Kohm by 1M and repeat steps 4 and 5. Determine bandwidth as in step
6.

8. Connect circuit as shown in Fig. (4-b), and repeat steps 2, 3, 4 and 5.

9. Connect a resistance Rf of 22Kohm between points A and B as shown in Fig.(4-a) and repeat
steps 3, 4 and 6.

10. Replace Rf =22Kohm by 47kohm and repeat step 6.

11. Remove Rf and CE[ as shown in Fig.(4-d) and repeat steps 3,4, and 5.

12. Connect the circuit as shown in the Fig.(4e), and repeat steps 2, 3, 4 and 6.

13. Remove Rf and repeat step.3, 4 and 6.

14. Connect the circuit as shown in Fig. (4c) and repeat steps 2, 3, 4 and 6 15. Remove R f and Cf
and repeat steps 3, 4 and 6.
CIRCUIT DIAGRAM:
MODEL GRAPH:

TABULATION:

Amplitude(Volts) Time(ms) Frequency (KHz)

RESULT:
Thus the Series And Shunt Feedback Amplifiers – Frequency Response ,Input Output Impedance
was designed and its output waveform was verified.
Ex. No :2a RC PHASE SHIFT OSCILLATOR
Date:

AIM
To design a RC phase shift oscillator and to observe its output waveform.

APPARATUS REQUIRED
S.NO APPARATUS SPECIFICATION QUANTITY
1. OPAMP IC741 1
2. Resistors 1.2KΩ, 3,Each1
13KΩ,377Ω,12.5KΩ
3. Capacitors 0.1µF 3
4. RPS ±12V 1
5 CRO 1MHz 1
6. Connecting wires - Req.

DESIGN PROCEDURE:
 Frequency of oscillator F=1//2πRC.
 Assume C and find R to prevent loading of the amplifier by RC networkR1≤10R.

THEORY:
The amplifier stage is self biased with a capacitor by passed source resistor (Rs) and drain
bias resistor (Rd). the expression for voltage gain of the amplifier is given by Av =gm. rl. The feedback
network consists of three identical RC sections. Each section produces a phase shift of 60. Therefore
the net phase shift of the feedback network is 180 degree. Since the amplifier stage also introduces a
phase shift of 180°, therefore total phase shift is 360° or 0°. For the variable frequency oscillators, the
three capacitors are ganged and varied simultaneously. When the circuit is energized by switching on
the supply, the circuit starts oscillating. The oscillations may start due to the minor variation in dc
supply or inherent noise.

PROCEDURE:
 Hook up the circuit as shown in the circuit diagram.
 Switch on the power supply.
 Observe the output waveform in CRO.
CIRCUIT DIAGRAM:

MODEL GRAPH:
 TABULATION:

Amplitude(Volts) Time(ms) Frequency (KHz)

RESULT:
Thus the RC phase shift oscillator was designed and its output waveform was verified.

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 Ex.No :2b WEIN BRIDGE OSCILLATOR
Date:

AIM

To design a wein bridge oscillator and to observe its output waveform.

APPARATUS REQUIRED

S.NO APPARATUS SPECIFICATION QUANTITY

1. OPAMP IC741 1
2. Resistors 1.5KΩ, Each1
1KΩ,500Ω,1.5KΩ
3. Capacitors 0.1µF 1
4. RPS ±12V 1
5 CRO 1MHz 1
6. Connecting wires - Req.

THEORY:

Wein Bridge Oscillator uses a non inverting amplifier and hence does not produce any phase
shift during amplifier stage as total phase shift req. is 0. In wein bridge oscillator type no phase
shift is necessary through Feedback. Thus the total phase shift around a loop is 0.

DESIGN PROCEDURE:

Select approximate transistor and note down its specification

such as Vce,Vcc(max),h oe(min) and hfe(max) and Vbe(sat).
Vcc=VCEQ+ICQ(RC+RE)
Assuming appropriate stability factor and hence I2 flowing through the biasing resistor and
differentiator. Determine R1 and R2.
Using the condition for sustained oscillation R3>2R4, compute C for designed frequency for
the frequency of oscillator.
F=1/2πRC

a) PROCEDURE:
 Hook up the circuit as shown in the circuit diagram.
 Switch on the power supply.
 Observe the output waveform in CRO.

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 CIRCUIT DIAGRAM:

MODEL GRAPH:

TABULATION:

Amplitude(Volts) Time(ms) Frequency (KHz)

RESULT:
Thus the Wein bridge oscillator was designed and its output waveform was verified.

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Ex.No :3a HARTLEY OSCILLATOR
Date:

AIM

To design a Hartley oscillator and to observe its output waveform.

APPARATUS REQUIRED

S.NO APPARATUS SPECIFICATION QUANTITY

1. Transistor BC 107 1
2. Resistors 2.74 KΩ, 1,2,1
1.76KΩ,10.58KΩ
3. Capacitors 0.1µF, 0.1µF Each 2
4. Inductor 0.1mH,0.33mH Each 1
5. RPS ±12V 1
6. CRO 1MHz 1
7. Connecting wires - Req.

THEORY
The Hartley oscillator is an electronic oscillator circuit in which the oscillation
frequency is determined by a tuned circuit consisting of capacitors and inductors, that is, an LC
oscillator. Common emitter transistor configuration is used in Hartley oscillator to ensure good
oscillation.
There are many types of electronic oscillators, but they all operate according to the
same basic principle: an oscillator always employs a sensitive amplifier whose output is fed back
to the input in phase. Thus, the signal regenerates and sustains itself. This is known as positive
feedback.
The Hartley oscillator is Suitable for oscillations in RF (Radio-Frequency) range, up to
30 MHz. Hence they are used as a high-frequency oscillator.

DESIGN PROCEDURE:

Select a appropriate transistor and note down its specification such as VCE,IC(MAX),
hfe(max) andVbe(sat).
 VCC= VCEQ+ ICQ(RC+RE)
 R2=S* RE
 VCC[R2/( R1+ R2)= VBE+VBE(SAT)
 VR1+VR2=VCC

PROCEDURE:

 Hook up the circuit as shown in the circuit diagram.

 Switch on the power supply.
 Slight modification in value of L1 and L2 can be made to get perfect sinewave output.
 Observe the output waveform in CRO

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 a) CIRCUIT DIAGRAM: HARTLEY OSCILLATOR

MODEL GRAPH:

TABULATION:

Amplitude(Volts) Time(ms) Frequency (KHz)

RESULT:
Thus the Hartley oscillator was designed and its output waveform was verified.

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 Ex.No: 3 b COLPITTS OSCILLATOR
Date:

AIM

To design a Colpitts oscillator and to observe its output waveform.

APPARATUS REQUIRED

S.NO APPARATUS SPECIFICATION QUANTITY

1. Transistor BC 107 1
2. Resistors 11.64 KΩ, Each 1
552.2Ω,10.02KΩ1.67kΩ
3. Capacitors 53.5nF,80µF, 100mF 2,1,1
4. Inductor 0.78mH 1
5. RPS ±12V 1
6. CRO 1MHz 1
7. Connecting wires - Req.

THEORY
The basic configuration of the Colpitts Oscillator resembles that of the Hartley Oscillator but
the difference this time is that the centre tapping of the tank sub-circuit is now made at the junction of a
“capacitive voltage divider” network instead of a tapped autotransformer type inductor as in the Hartley
oscillator.
The Colpitts oscillator uses a single stage bipolar transistor amplifier as the gain element which
produces a sinusoidal output
The advantages of the Colpitts Oscillator over the Hartley oscillators are that the Colpitts
oscillator produces a more purer sinusoidal waveform due to the low impedance paths of the capacitors at
high frequencies.

DESIGN PROCEDURE:

Select a appropriate transistor and note down its specification such as V CE,IC(MAX),
hfe(min) andVbe(sat).
 VCC= VCEQ
 R2=S* RE
 VCC[R2/( R1+ R2)= VBE+VBE(SAT)
 VR1+VR2=VCC
 hfe ≥ C1* C2/( C1+ C1)
 XCE ≤ RE/10

PROCEDURE:

 Hook up the circuit as shown in the circuit diagram.

 Switch on the power supply.
 Slight modification in value of C1 and C2 can be made to get perfect sine wave output.
 Observe the output waveform in CRO.

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 CIRCUIT DIAGRAM: COLPITTS OSCILLATOR

MODEL GRAPH:

TABULATION:

Amplitude(Volts) Time(ms) Frequency (KHz)

RESULT:
Thus the Colpitts oscillator was designed and its output waveform was verified.

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 Ex.No :4 RC Integrator and Differentiator circuits using Op-Amp
DATE:

AIM
To design and test the following Op-Amp Circuits: a. Integrator b. Differentiator

APPARATUS REQUIRED

S.No. Name of the Apparatus Range/Value Qty

1. Bread Board - 1
2. IC Power Supply ±15 V 1
3. Resistor 10 k Ω, 100 k Ω,1.5 k Ω,15k Ω 2, 1,1,1
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Signal Generator 0-1 MHz. 1
7. Capacitor 0.1µF,0.01 µF 1(each)
8. Connecting Wires - Few

THEORY:

a. INTEGRATOR:
The circuit performs the mathematical operation of integration, that is, the output waveform is the
integral of the input waveform. The output voltage Vo(t) = - (1/RfCf) Vi(t) dt , Where Vi is the input
voltage , Rf is the feedback resistance & Cf is the feedback capacitence.
b. DIFFERENTIATOR:
The circuit performs the mathematical operation of differentiation, that is, the output waveform is the
derivative of the input waveform. The output voltage Vo(t) = - RC (dvi / dt) Where Vi is the input
voltage , Rf is the feedback resistance & Cf is the feedback capacitence
DESIGN:
a. Integrator: Design of Integrator with lower frequency limit of fmin = 160Hz.
f  1
min
2Rf C f
Rf = 10R1
Let R1=1.5KΩ, then Rf =
The range of Cf value from 0.001µF to 10µF is preferable. The capacitor has to very low leakage
Cf  1 
2Rf f min
b. Differentiator: Design of opamp differentiator that will differentiate an input signal with
fa =100Hz.The time period T of the input signal must be larger than or equal to RfC1.
1
Highest frequency of the input signal = fa 
2Rf C1
Select C1 ( 1F). Let C1  0.1F
1
f a  100 
2Rf C1
1
R  
f
2 100  0.1106
1
1  
fb  10 f a  1KHz  2 R C ; R1 2 1000  0.1106
1 1

1.59 103  0.1106 

R1 C1 = Rf Cf; C f  
15.9 103
1
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PROCEDURE:
1. Connections are given as per the circuit diagram for integrator.
2. The square wave of 2Vp-p is given as input to the inverting terminal of the IC.
3. The output waveform is observed in the CRO.
4. Plot the input and output waveforms.
5. Repeat the same for differentiator

CIRCUIT DIAGRAM
INTEGRATOR :

TABULATION:

Waveform Amplitude Time period

(Volts) (ms)

INPUT

OUTPUT

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DIFFERENTIATOR:

TABULATION:

Waveform Amplitude Time period

(volts) (ms)

INPUT

OUTPUT

1
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 MODEL GRAPH:
INTEGRATOR: DIFFERENTIATOR:

RESULT:
Thus the operation of Integrator and Differentiator was studied and the output was verified with the
theoretical calculation.

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Ex.No :5 CLIPPERS AND CLAMPERS
DATE:

AIM
To observe the waveforms of clipper circuits using a. Positive clipper b. Negative clipper

APPARATUS REQUIRED

S.No. Name of the Apparatus Range/Value Qty

1. 1N 4007 diodes 1N 4007 2
2. IC Power Supply ±15 V 1
3. Resistor 10 k Ω 1
4. CRO with CRO probes. - 1
5. TRPS -. 1
6. Function Generator 0-1 MHz. 1
7. Bread board and connecting wires 0.1µF,0.01 µF 1(each)
8. Connecting Wires - Few

THEORY:

Circuit operation:
Clippers are used to select a part of signal waveform above or below a reference voltage for
transmission.
Negative Clipper: For Vi < VR +Vr , The diode D is OFF ,since it is reverse biased and hence
does not contact. Since no current flows, there is no voltage drop across R. VO = Vi for Vi < VR +
Vr Where Vr is Cut-in voltage of the diode.For Vi > VR + Vr , the diode D is ON, Since it is
forward biased and the potential barrier is overcome Vo = VR+ Vr
Transfer characteristic Equation: Vo= Vi for Vi < VR + Vr Vo= VR + Vr for Vi > VR + Vr
Positive Clipper: When Vi > VR + Vr the diode is forward biased and hence it conducts since it is
ON it is short circuited . It is obvious that Vo= VR + Vr Whatever the comment. When Vi < VR +
Vr the diode is reverse biased and hence it is OFF. It acts as an open Circuit. Vo= Vi
Transfer Characteristic Equation: Vo= Vi for Vi < VR + Vr; Vo= VR + Vr for Vi > VR + Vr

PROCEDURE:
1. Connections are made as per the circuit diagram
2. For the positive clipper the diode is connected along with reference voltage as shown by
applying the input and the output is observed on the C.R.O.
3. For the negative clipper the directions of diode and the reference voltage are reversed and by
giving the input, the output is observed on the C.R.O.
4. For the Slicer Circuit has two Diodes along with reference voltages are connected as shown
and output is observed on the C.R.O.
5. A sinusoidal input 10V (p-p) 1KHZ is given to positive clipper, negative clipper and slicer
circuit and corresponding output is observed.
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CIRCUIT DIAGRAM

NEGATIVE CLIPPER:

POSITIVE CLIPPER:

MODEL GRAPH

2
2
Positive amplifier

TABULATION:

NAME OF THE NEGATIVE CLIPPER POSITIVE CLIPPER

CLIPPER

WAVE FORM

AMPLITUDE (P-P) IN
VOLTS
TIME PERIOD(MSEC)

RESULT:
Thus the operation of Clippers and Clampers was studied and the output was verified with the
theoretical calculation.

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Ex.No :6 INSTRUMENTATION AMPLIFIER
Date:

AIM:
To design and test the operation of Instrumentation Amplifier.

APPARATUS REQUIRED:

S.No. Name of the Apparatus Range/Value Qty

1. Bread Board - 1
2. Decade Resistance Box 1 Ω to 1 M Ω 1
3. Dual Power Supply ±15 V 1
4. Resistor 1 k Ω,2.2 k Ω 7,1
5. IC 741 Op-Amp - 1
6. Multimeter 3½ Digits 1
7 RPS (0-30) V 1
8. Connecting Wires - Few

THEORY:
Instrumentation amplifier is an amplifier with high input impedance, very low offset and
drifts voltage. This configuration is better than inverting or non-inverting amplifier because it has
minimum non-linearity, stable voltage gain and high common mode rejection ratio (CMRR > 100
dB.). This type of amplifier is used in thermocouples, strain gauges and biological probes.
Output voltage V0 = (V2 – V1) [1 + 2 R1 / R2]

CIRCUIT DIAGRAM:

PROCEDURE:
(i) Connections are given as per the circuit Diagram.
(ii) For various input voltage V1 & V2, measure and record the output voltage.

2
4
TABULAR COLUMN:
Input Vo in volts
Voltages
V1 V2
volts volts Theoretical Practical

RESULT:
Thus the Instrumentation amplifier was constructed & Verified

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Ex.No :7a SECOND ORDER ACTIVE FILTERS
Date:

AIM:
To design, construct and plot the frequency response of second order low pass and high pass filter
having the fc of 1 kHz.

APPARATUS REQUIRED:
S.No. Name of the Apparatus Range/Value Qty
1. Bread Board - 1
2. IC Power Supply ±15 V 1
10 k Ω,5.86 k Ω 1
3. Resistor
1.6 k Ω 2
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Function Generator 0-3MHz. 1
7. Capacitor 0.1µF 2
8. Connecting Wires - Few

THEORY:
An improved filter response can be obtained by using a second order active filter. A second order
filter consist of two RC pairs has a roll-off rate of –40db/decade. The transfer function of a Low pass
A 2
filter is H (s)  2 0 h . For n=2, the damping factor α = 1.414, the pass band gain
S     2
h h
A0 = 3 – α = 1.586. Cutoff frequency of the filter = 1/ 2π RC= h. HPF is the complement of the Low
pass filter and can be obtained simply by interchanging R and C in the low pass configuration

DESIGN:
fc = 1KHz, Assume C = 0.1µF, R= 1/2πfcC=
The gain for the second order filter is known as 1.5816.
Let Ri = 10KΩ, Gain =Ao = 1.5816 => 1+ Rf / Ri = 1.586 => Rf = 0.586 Ri =

CIRCUIT DIAGRAM:

Low Pass Filter

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6
PROCEDURE:
1. Connect the Low pass filter circuit as shown in the circuit diagram.
2. Give an input signal Vi of 2V(p-p) and measure the output voltage for different frequency from the
CRO.
3. Plot the frequency response 20 log Vo/Vi versus input frequency and find 3db frequency.
4. Determine the cut-off frequency from the plot.
5. Repeat the above for HPF.

TABULATION:

Low Pass Filter INPUT VOLTAGE: Vi = volts

Frequency Hz Output voltage Vo volts Gain in db 20 logVo/Vi

High Pass Filter:

2
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High Pass Filter: INPUT VOLTAGE: Vi = volts
Frequency Hz Output voltage Vo volts Gain in db 20 logVo/Vi

MODEL GRAPH:
Low Pass Filter: High Pass Filter:

RESULT:
Thus the Second order low pass filter and High pass filter was designed and frequency response plot was
drawn.
LPF: i. Theoretical = ii. Practical =
HPF: i. Theoretical = ii. Practical =
2
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Ex.No :7b BAND PASS FILTER
Date:

AIM:
To design, construct, test and to plot the frequency response of wide band pass filter.

APPARATUS REQUIRED:
S.No. Name of the Apparatus Range/Value Qty
1. Bread Board - 1
2. IC Power Supply ±15 V 1

3. Resistor 10 k Ω, 39.8 k Ω, 7.9 k Ω 4, 1

4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
\7b6. Signal Generator 0-3 MHz. 1
7. Capacitor 0.01µF 2
8. Connecting Wires - Few

THEORY:
A wide band pass filter can be formed by cascading a HPF and LPF section. If the HPF and
LPF are of the first order, then the band pass filter (BPF) will have a roll off rate of -20 dB/decade. A
wide band pass filter formed by cascading I order HPF and I order LPF is shown in the circuit
diagram.

DESIGN:
fh = 2KHz; fl = 400Hz; pass band gain A0= 4.
LPF and HPF sections may be designed to have a gain of 2.
As the opamp is used in non-inverting configuration Ao = 1+ (Rf/Ri) = 2=> Rf/Ri = 1=> Rf = Ri.
Let Ri =10 kΩ, Rf = .
fh = 1/(2πR2C2) = 2KHz. Let C2= 0.01µF, R2 = 1/(2πX2X103X0.01X10-6) =
fl = 1/(2πR1C1) = 400Hz. Let C1= 0.01µF, R1 = 1/(2πX400X0.01X10-6) =

CIRCUIT DIAGRAM:

PROCEDURE:
1. Connect the Band pass filter circuit as shown in the circuit diagram.
2. Give an input signal Vi of 1V (p-p) and measure the output voltage for different frequency.
3. Plot the frequency response 20 log Vo/Vi versus input frequency and find 3db frequency.
4. Determine the cut-off frequency fh and fl .
2
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 MODEL GRAPH:

TABULATION: INPUT VOLTAGE: Vi = volts

Frequency ( Hz ) Output voltage Vo (volts) Gain in db 20 logVo/Vi

RESULT:
Thus the Second order Band pass filter was designed and frequency response plot was drawn

Lower cutoff frequency: i. Theoretical = ii. Practical =

Upper cutoff frequency: i. Theoretical = ii. Practical =

3
0
Ex.No : 8 PLL (IC 565) CHARACTERISTICS AND ITS USEAS FREQUENCY
MULTIPLIER
Date:

AIM:

1. To study the characteristics of a Phase Locked Loop (PLL)-IC 565.

2. To study the frequency multiplier circuit using PLL-IC 565.

THEORY:

a) PLL- It is basically a feedback control system that controls the phase of a voltage
controlled oscillator (VCO). The input signal is applied to one input of a phase detector. The other
input is connected to the output of VCO. Normally the frequencies of both signals will be nearly the
same. The output of the phase detector is a voltage proportional to the phase difference between the
two inputs. This signal is applied to the loop filter. It is the loop filter that determines the dynamic
characteristics of the PLL. The filtered signal controls the VCO. The output of the VCO is applied to
the phase detector. Normally the loop filter is designed to match the characteristics required by the
application of the PLL. If the PLL is to acquire and track a signal the bandwidth of the loop filter will
be greater than if it expects a fixed input frequency. The frequency range which the PLL will accept
and lock on is called the capture range. Once the PLL is locked and tracking a signal the range of
frequencies that the PLL will follow is called the tracking range. Generally the tracking range is larger
than the capture range. Figure shows the block diagram of PLL

Reference Signal Phase Frequency Loop Filter

Source Detector

Oscillator
Output
Voltage Controlled
Oscillator

b) Frequency multiplier using the 565 PLL- The frequency divider is inserted between the
VCO and the phase comparator. Since the output of the divider is locked to the input frequency f in, the
VCO is actually running at a multiple of the input frequency. The desired amount of multiplication
can be obtained by selecting a proper divide by N network, where N is an integer. For example, to
obtain the output frequency fOUT = 5 fin, a divide by N = 5 network is needed. The 4 bit binary
counter (7490) is configured as a divide by 5 circuits. The transistor Q is used as a driver stage to
increase the driving capability of the NE 565. C3 is used to eliminate possible oscillation. C2 should be
large enough to stabilize the VCO frequency.

fin
Phase Comparator Amplifier LPF VCO

Fin = fout / N
Voltage Controlled
Oscillator

3
1
DESIGN:

a. PLL Circuit
1. The Circuit components are R1 = 12 KΩ, C1 =0.01 µF, C2 =10 µF & C3 =0.001 µF.
2. The design formulae are: V= (+V)-(-V) = 20 Volt. Free running frequency, fout= 1.2 / [4 R1 C1 ] =
2.5 KHz. Lock Range, fL= ± 8 X fout / V = ± 1 KHz. Capture Range, f c= ± fL / [2 π X 3.6 X 103 X
C2] = ± 66.49 Hz

CIRCUIT DIAGRAM:

a. PLL Circuit

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b)Frequency Multiplier

RESULT:
PLL is studied and used as frequency multiplier.

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Ex.No : 9 R-2R DIGITAL TO ANALOGCONVERTER
Date:

Aim : To design 4 bit R-2R ladder DAC using Op-Amp for an output voltage of 5 V
when theinput is 10 (Binary 1010).

Apparatus :

Sl.
Particulars Specification Quantity
No.

1. IC µA741 02

2. Resistors As per design -

3. Multimeter - 01

4. Base board + connecting wires - 01 Set

Procedure :
1. Connections are made as shown in the circuit diagram.
2. Digital input data is given at D3, D2, D1, D0 and corresponding analog output voltage
V0 is measured.
3. Tabulate the readings & plot the graph between Vo on y-axis Vin on X-axis.
Note :
1. D0.D1.D2 & D3 are binary input.
2. Vo is the analog output.
3. Binary inputs Do.D1.D2 & D3 can take either the value „0‟ or „1‟.
4. Binary input Di (i = 0 to 3) can be made „0‟ by connecting the i/p to ground. It can be made
„1‟ byconnecting to –5 V.
Logic 0 0V
Logic 1 +5V

Circuit Diagram

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Result :

Binary Inputs Analog O/P Analog O/P

Decimal Vo(volts) Vo(volts)
Value
D3 D2 D1 D0
Theoretical values Practical values

0 0 0 0 0

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

4 0 1 0 0

5 0 1 0 1

6 0 1 1 0

7 0 1 1 1

8 1 0 0 0

9 1 0 0 1

10 1 0 1 0

11 1 0 1 1

12 1 1 0 0

13 1 1 0 1

14 1 1 1 0

15 1 1 1 1

RESULT:
Thus the R-2R Digital to analog converter is designed and graph is plotted.

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Ex.No :10 CLASS C SINGLE TUNED AMPLIFIER

Date:

AIM:
To design and find the frequency response of class c single tuned amplifier.

SOFTWARE REQUIRED:
LTSPICE

THEORY:
In class C amplifier, the output current flows only for one half of the cycle of the
input signal. The transistor dissipates no power with zero input signal. The average current drawn by
the circuit in class C is smaller than that in class A.
Complementary symmetry amplifier requireds neither an input nor an output transformer. This
arrangement uses transistors having complementary symmetry in the emitter follower configuration.
The term ‘complementary’ means that it uses two identical transistors one NPN and the other PNP.
Theterm ‘symmetry’ means that biasing resistors are equal.
This amplifier circuit has a unity gain because of the emitter follower
configuration. Moreover there is no phase inversion of the output signal. The split supply used in the
circuit gives us an advantage that the dc component of the output voltage can be made zero. Thus
the only ac component of the power is available across the load resistor.

CIRCUIT DIAGRAM: CLASS C SINGLE TUNED AMPLIFIER

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 MODEL GRAPH:

TABULATION:

Sl. Input Input Output Voltage gain

No. frequency Voltage Voltage V 
V  20log o db
(Hz) (mV) (V) gain  
 Vi 

RESULT:

Thus the Class C single tuned amplifier was designed and its frequency response
was observed

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Ex.No : 11 TWIN T OSCILLATOR/ WIEN BRIDGE OSCILLATOR

Date:

AIM:
To design and find the frequency response of Twin T Oscillator/ Wien Bridge Oscillator

SOFTWARE REQUIRED:

Ltspice

THEORY:

Twin-T Oscillators are another type of RC oscillator which produces a sinewave output for use
in fixed-frequency applications similar to the Wein-bridge oscillator. The twin-T oscillator uses two
“Tee” shaped RC networks in its feedback loop (hence the name) between the output and input of an
inverting amplifier.

The Wien Bridge Oscillator is so called because the circuit is based on a frequency-selective
form of the Wheatstone bridge circuit. The Wien Bridge oscillator is a two-stage RC coupled amplifier
circuit that has good stability at its resonant frequency, low distortion and is very easy to tune making it a
popular circuit as an audio frequency oscillator but the phase shift of the output signal is considerably
different from the previous phase shift RC Oscillator.
CIRCUIT DIAGRAM: TWIN T OSCILLATOR/ WIEN BRIDGE OSCILLATOR

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 MODEL GRAPH:

TABULATION:

Sl. Input Input Output Voltage gain

No. V 
frequency Voltage Voltage V  20log o db
(Hz) (mV) (V) gain  
 Vi 

RESULT:

Thus the Twin T Oscillator/ Wien Bridge Oscillator was designed and its
frequency response was observed
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Ex.No :12 DOUBLE AND STAGGER TUNED AMPLIFIERS

Date:

AIM:
To design and find the frequency response of double and stagger tuned amplifiers Oscillator

SOFTWARE REQUIRED:

Ltspice

THEORY:
A two-stage stagger tuned voltage amplifier is shown in Fig. 18.23. In stagger tuned circuits, two single
tuned cascaded amplifiers having a certain bandwidth are taken and the resonant frequencies of the two tuned
circuits are so adjusted that they are separated by an amount equal to the bandwidth of each stage. Stagger tuned
amplifiers are usually designed so that the overall response exhibits maximum flatness around the center frequency
f0. It needs a number of tuned circuits operating in union. If more number of stages are employed flatter will be the
passband and steeper will be the gain fall of outside the passband. Because of stagger tuning there is a loss of
voltage gain. The overall frequency response of a stagger tuned amplifier is obtained by adding individual response
together. Since the resonant frequencies of different tuned circuits are displaced or staggered, they are referred to
as stagger tuned amplifier.

CIRCUIT DIAGRAM: TWIN T OSCILLATOR/ WIEN BRIDGE OSCILLATOR

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 MODEL GRAPH:

TABULATION:

Sl. Input Input Output Voltage gain

No. frequency Voltage Voltage V 
V  20log o db
(Hz) (mV) (V) gain  
 Vi 

RESULT:

Thus the of double and stagger tuned amplifiers Oscillator was designed and its
frequency response was observed.
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EX.NO: 13 BISTABLE MULTIVIBRATOR

Date:

AIM:
To design and find the frequency response of Bistable Multivibrator

SOFTWARE REQUIRED:

Ltspice

THEORY:

The Bistable Multivibrator is another type of two state device similar to the Monostable Multivibrator we
looked at in the previous tutorial but the difference this time is that BOTH states are stable.Bistable Multivibrators
have TWO stable states (hence the name: “Bi” meaning two) and maintain a given output state indefinitely unless
an external trigger is applied forcing it to change state.The bistable multivibrator can be switched over from one
stable state to the other by the application of an external trigger pulse thus, it requires two external trigger pulses
before it returns back to its original state. As bistable multivibrators have two stable states they are more commonly
known as Latches and Flip-flops for use in sequential type circuits.The discrete Bistable Multivibrator is a two state
non-regenerative device constructed from two cross-coupled transistors operating as “ON-OFF” transistor
switches. In each of the two states, one of the transistors is cut-off while the other transistor is in saturation, this
means that the bistable circuit is capable of remaining indefinitely in either stable state.

CIRCUIT DIAGRAM: BISTABLE MULTIVIBRATOR

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 MODEL GRAPH:

TABULATION:

Sl. Input Input Output Voltage gain

No. frequency Voltage Voltage V 
V  20log o db
(Hz) (mV) (V) gain  
 Vi 

RESULT:

Thus the Bistable Multivibrator was designed and its frequency response was
observed

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 Ex.No :14 SCHMITT TRIGGER CIRCUIT WITH PREDICTABLE HYSTERESIS

Date:

AIM:
To design and find the frequency response of Schmitt Trigger circuit with Predictable
hysteresis

SOFTWARE REQUIRED:

Ltspice

THEORY:
A Schmitt trigger is a comparator circuit with hysteresis implemented by applying positive
feedback to the noninverting input of a comparator or differential amplifier. It is an active circuit which converts
an analog input signal to a digital output signal. The circuit is named a trigger because the output retains its value
until the input changes sufficiently to trigger a change. In the non-inverting configuration, when the input is higher
than a chosen threshold, the output is high. When the input is below a different (lower) chosen threshold the output
is low, and when the input is between the two levels the output retains its value. This dual threshold action is
called hysteresis and implies that the Schmitt trigger possesses memory and can act as a bistable
multivibrator (latch or flip-flop). There is a close relation between the two kinds of circuits: a Schmitt trigger can
be converted into a latch and a latch can be converted into a Schmitt trigger.
Schmitt trigger devices are typically used in signal conditioning applications to remove noise from signals used in
digital circuits, particularly mechanical contact bounce in switches. They are also used in closed loop negative
feedback configurations to implement relaxation oscillators, used in function generators and switching power
supplies.
CIRCUIT DIAGRAM: SCHMITT TRIGGER CIRCUIT WITH PREDICTABLE HYSTERESIS

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 MODEL GRAPH:

TABULATION:

Sl. Input Input Output Voltage gain

No. V 
frequency Voltage Voltage V  20log o db
(Hz) (mV) (V) gain  
 Vi 

RESULT:

Thus the Schmitt Trigger circuit with Predictable hysteresis was designed and its frequency
response was observed

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Ex.No : ANALYSIS OF POWER AMPLIFIER

Date:

AIM:
To design and analyse the frequency response of power amplifier
with Predictable hysteresis

SOFTWARE REQUIRED:

Ltspice

THEORY:
The function of a power amplifier is to raise the power level of input signal. It is required to deliver a large amount
of power and has to handle large current.
The characteristics of a power amplifier are as follows −
 The base of transistor is made thicken to handle large currents. The value of β being (β > 100) high.
 The size of the transistor is made larger, in order to dissipate more heat, which is produced during
transistor operation.
 Transformer coupling is used for impedance matching.
 Collector resistance is made low
After the audio signal is converted into electrical signal, it has several voltage amplifications done,
after which the power amplification of the amplified signal is done just before the loud speaker stage. While the
voltage amplifier raises the voltage level of the signal, the power amplifier raises the power level of the signal.
Besides raising the power level, it can also be said that a power amplifier is a device which converts DC power to
AC power and whose action is controlled by the input signal.

CIRCUIT DIAGRAM

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 MODEL GRAPH:

TABULATION:

Sl. Input Input Output Voltage gain

No. frequency Voltage Voltage V 
V  20log o db
(Hz) (mV) (V) gain  
 Vi 

RESULT:

Thus the circuit of power amplifier was designed and its frequency response was observed.

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