Topic 2
Topic 2
Key point:
Fetch
Store Decode
Execute
CPU
[01]
[02]
[..]
Arithmetic [FF]
Logic MDR Data Bus
Unit
This is quite a useful video (although when he says BR buffer register, replace it with
MDR memory data register)
© Justin Robertson 2019. All rights reserved.
Registers
○ Registers are the smallest and fastest unit of memory in a computer system. They exist
within the CPU and are used to store information that the CPU is working on at that exact
moment.
○ Registers you need to know about:
○ Program Counter: Stores the address of the next instruction. [Technically not on the
syllabus but essential to understanding.]
○ Memory Address Register: Stores the address in memory that is to be read or
written. When something happens that involves memory, the MAR stores WHERE it
happens. So when a read happens, the MAR stores the address from which the data will
be read and when a write happens the MAR stores the address at which the data (from
the MDR) will be written.
○ Memory Data Register: Stores the data in memory that has been read or is to be
written. When something happens that involves memory, the MDR stores WHAT is
read/written. So when a read happens, the MDR stores the data that has been read and
when a write happens, the MDR stores the information that will be written.
○ Instruction Register: Stores the current instruction that has been transferred to the
MDR and is about to be decoded and executed. Once the data is in the Intruction
Register we consider this to be the end of the Fetch part of the machine instruction
cycle. [This register is only mentioned on the HL syllabus for some reason.]
○ Control unit: The decoder in the control unit is responsible for finding out what the
instruction that has been read does.
○ ALU: The Arithmetic Logic Unit is responsible for executing the instruction.
○ Accumulator: A set of general purpose registers used for storing temporary
intermediate results of the CPU's calculations.
© Justin Robertson 2019. All rights reserved.
The Control Unit and ALU
Control Unit:
○ The Control Unit decodes intructions
○ The Control Unit contains a component called the decoder, which is
responsible for decoding each instruction into basic opcodes. The
decoder decides what each instruction actually means.
○ It coordinates the other components of the CPU and synchronises
the movement of data or instructions between registers.
○ It also controls when data is to be read from or written to memory
by means of a read/write signal.
Arithmetic Logic Unit:
○ The ALU carries out instructions to do with arithmetic and logic.
○ The ALU reads operands from registers and writes the results of its
operations into registers.
○ Examples are adding, subtracting, multiplying, complementing
(negating), AND, OR, shifting bits along the register
Magnetic hard disk Normal computer hard drive (internal or external). High capacity.
Moving parts mean slower access and lower reliability.
Magnetic solid-state Flash memory, thumb drive, memory stick, etc., but also
increasingly used as main storage in laptop computers. Currently
disk quite expensive/low capacity. No moving parts increases speed
and reliability.
○ Note that it's probably better not to use proprietary names in your exam.
Say "spreadsheet software" and not "Excel".
Definitions
○ Bit: The smallest amount of data that can be represented. Short for
"binary digit". Represented as either a 0 or 1.
○ Byte: 8 bits
○ Binary: The base 2 counting system.
○ Denary/Decimal: The base 10 counting system. The normal
place-value counting system in which a new column is created when
a power of 10 is reached.
○ Hexadecimal: The base 16 counting system. Requires six new
symbols in addition to 0-9, which are A-F. Since 24 = 16, one Hex
digit can be used to represent 4 bits, and two Hex digits can be used
to represent a byte.
X = 10 2 1 4 9 . 5 0 4
Our normal counting system uses a base of 10 (because we have ten fingers).
Every time we get to a power of ten, we change column.
But there is nothing to say that X has to be 10. It could be literally any positive
number. Counting in base X requires X different symbols to represent values.
● In base 10 we use the symbols 0123456789.
● In base 2 (binary) we use 01.
● In base 16 (hexadecimal) we need 16 symbols: 0123456789ABCDEF.
0 0 0 0 0 0 0 0 0
0 1 0 0 1 1 0 1 1
1 0 0 1 0 1 1 0 1
1 1 1 1 1 1 1 1 0
0 0 1 0 0 1 0 1
0 1 1 0 1 0 1 0
A
AND
B NOT XOR X
1 1 1 1 0
0 1 1 1
Construct the truth table to show 1 0 0 1
when Bill goes to the pub.
1 0 1 1
1 1 0 0
Describe the situation when Bill
does not go to the pub. 1 1 1 1
A NOT
AND X
B NOT
NOT
A AND
OR X
B AND
NOT
A NOT
AND X
B
OR
C
1. A AND B OR NOT C
2. (A XOR B) AND NOT C
A
3. NOT (A NOR B) NAND C XOR
B NOR
X
It would be good practice to AND
B NA
ND X
AND
C NOT
○ Huh?! Think…
○ What are the inputs?
○ What is the output?
○ What are the Boolean operators?
C
Inputs
• Cold and
• Raining
• Done Homework R
or not S
Outputs:
• Go to School
H not
0 0 0 0 1 1 0
0 0 1 0 0 0 1
0 1 0 0 1 1 0
0 1 1 0 0 0 1
1 0 0 0 1 1 0
1 0 1 0 0 0 1
1 1 0 1 1 1 0
1 1 1 1 0 1 0
○ You need three inputs (things that can be true or false) and one
output (something that happens or doesn't on the basis of the
inputs).
○ Let's try these inputs it is sunny, it is windy, it is cold. The output
can be whether or not Lisa wears her jumper to school.
○ Lisa wears her jumper to school if (1) it is cold or (2) if it is windy
and not sunny.
○ Inputs are: Construct the truth table.
○ C = it is cold ● Remember, if there are n inputs, then
○ W = it is windy there will be 2n rows in your truth table.
○ S = it is sunny My guess is that for a question like this
there will almost certainly be 23 = 8 rows.
○ Output is: ● Also remember to write them out in
○ J = Lisa wears her jumper ascending order 000, 001, 010, etc.
Construct the logic diagram.
● Your inputs are on the left.
My answer is on the next slide. ● Your output is on the right.
● There are logical operators in between.
Decide what is being ANDed and ORed
with what.
0 0 0 0
0 0 1 0
C
0 1 0 1
0 1 1 0
W OR J
1 0 0 1
AND
1 0 1 1
1 1 0 1
S NOT
1 1 1 1
NOT (A AND (B OR C)) A XOR B NOR B AND NOT C NOT (A OR C) NAND (B AND NOT C)
A A A
X N
O O
O
A N R R N
N T
N O X B A
B D T O X B X
N
O A R A D
R N N
N N
D D
C C O C O
T T
A B C X
A B C A XOR B B AND NOT C X NOT (A
A B C B AND NOT C X
0 0 0 1 OR C)
0 0 0 0 0 1 0 0 0 1 0 1
0 0 1 1
0 0 1 0 0 1 0 0 1 0 0 1
0 1 0 1
0 1 0 1 1 0 0 1 0 1 1 0
0 1 1 1
0 1 1 1 0 0 0 1 1 0 0 1
1 0 0 1
1 0 0 1 0 0 1 0 0 0 0 1
1 0 1 0
1 0 1 1 0 0 1 0 1 0 0 1
1 1 0 0
1 1 0 0 1 0 1 1 0 0 1 1
1 1 1 0
1 1 1 0 0 1 1 1 1 0 0 1
May 2016
May 2015
Nov 2015