Computer Organization

Course Topics
Module# Topics
Module-1 Basic structures of Computers: Computer Architecture vs. Computer Organization,
Functional units, Operational concepts, Registers, Bus Structure, Performance
Consideration, SPEC rating.
Module-2 Memory location and addresses, Big-endian and Little-endian representation, Instruction
format, Instruction set Architecture, RISC vs. CISC, Addressing modes, Instruction
Sequencing, Subroutines.
Module-3 Binary Arithmetic: Addition and subtraction of signed numbers, Design of fast adders,
Multiplication of positive numbers, Signed operand multiplication, Fast multiplication,
Integer division, Representation of floating point numbers.

Module-4 Memory System: Basic Concepts, Speed, Size and cost, Cache memory concepts, Cache
memory mapping techniques, Performance consideration; Virtual memory concepts,
Translation look-aside buffer, Replacement techniques, Secondary Storage.

Module-5 Basic Processing Units: Fundamental concepts, Execution cycle, Single-Bus and Multi-Bus
Organization, Execution of complete instruction, Hardwired control, Micro programmed
control, Accessing I/O devices.
Basic Structures of Computers
(Chapter 1)
 Some Basic Concepts
• Computer Architecture (CA) is concerned with the structure and
behavior of the computer.
• It includes the information formats, the instruction set and
techniques for addressing memory.
• In general it covers 3 aspects of computer-design namely:
1) Computer Hardware
2) Instruction set Architecture
3) Computer Organisation
 Some Basic Concepts
1. Computer Hardware
It consists of electronic circuits, displays, magnetic and optical
storage media and communication facilities.
2. Instruction Set Architecture
 It is programmer visible machine interface such as instruction set,
registers, memory
organization and exception handling.
 Two main approaches are
1) CISC (Complex Instruction Set Computer)
2) RISC (Reduced Instruction Set Computer)
 Some Basic Concepts
3. Computer Organization
 It includes the high level aspects of a design, such as
→ memory-system
→ bus-structure
→ design of the internal CPU.
 It refers to the operational units and their interconnections that
realize the architectural specifications.
 It describes the function of and design of the various units of digital
computer that store and process information
 Architecture vs Organisation
Computer Architecture Computer Organization

Computer Architecture is concerned with the way hardware components are Computer Organization is concerned with the structure and behaviour of a computer
connected together to form a computer system. system as seen by the user.

It acts as the interface between hardware and software. It deals with the components of a connection in a system.

Computer Organization tells us how exactly all the units in the system are arranged
Computer Architecture helps us to understand the functionalities of a system.
and interconnected.

A programmer can view architecture in terms of instructions, addressing modes

Whereas Organization expresses the realization of architecture.
and registers.

While designing a computer system architecture is considered first. An organization is done on the basis of architecture.

Computer Architecture deals with high-level design issues. Computer Organization deals with low-level design issues.

Architecture involves Logic (Instruction sets, Addressing modes, Data types, Cache Organization involves Physical Components (Circuit design, Adders, Signals,
optimization) Peripherals)
Basic Terminology
• Word : It is the fixed no. of bits that can be processed in a group at a
time.
• Word length : The no. of bits in each word is referred to as word
length (16 to 64).
• Timing signal : It determines when a given action is to take place.
Data transfer between processor and memory are controlled by the
control unit through timing signal.
• Physical memory : It is known as random-access memory (RAM) is a
form of very fast, but volatile data storage. RAM modules are typically
measured in nanoseconds (1000− 3), and physical disks are typically
measured in milliseconds (1000− 1).
• Logical memory : It is the address space, assigned to a logical
partition, that the operating system perceives as its main storage.
 Stored Program concept
• All modern computers use the stored program concept which is
initially conceived by Von-Neuman.
• Various features of Von-Neuman architecture are :
1. 5 main different units (m/m, ALU, CU, IU, OU)
2. Program and data are stored in common memory.
3. Once the program is in memory, the computer can execute it
automatically without human interaction.
4. CU fetches and executes instructions in sequence.
5. An instruction can modify the contents of any location in
memory.
Functional Units
•

Basic Operational Concept

• An Instruction consists of 2 parts,

1) Operation code (Opcode)
2) Operands

• The data/operands are stored in memory.

• The individual instruction are brought from the memory to the
processor.
• Then, the processor performs the specified operation.
 Some Basic operational Concepts
Typical ex. Of an instruction
ADD LOCA, R0
This instruction is an addition operation. The following are the steps to
execute the instruction:
Step 1: Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into
the processor.
Step 3: Add the memory operand (i.e. fetched contents of LOCA) to the
contents of register R0.
Step 4: Store the result (sum) in R0.
 Some Basic Operational Concepts
The same instruction can be realized using 2 instructions as:
Load LOCA, R1
Add R1, R0

The following are the steps to execute the instruction:

Step 1: Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into the register R1.
Step 3: Add the content of Register R1 and the contents of register R0.
Step 4: Store the result (sum) in R0.
 MAIN PARTS OF PROCESSOR
• The processor contains ALU, control-circuitry and many registers.

• The processor contains n general-purpose registers R0 through Rn-1.

• The IR holds the instruction that is currently being executed.

• The control-unit generates the timing-signals that determine when a given action is to take place.

• The PC contains the memory-address of the next-instruction to be fetched & executed.

• During the execution of an instruction, the contents of PC are updated to point to next instruction.

• The MAR holds the address of the memory-location to be accessed.

• The MDR contains the data to be written into or read out of the addressed location.

• MAR and MDR facilitates the communication with memory.

(IR  Instruction-Register, PC  Program Counter)

(MAR  Memory Address Register, MDR Memory Data Register)
 System BUS
• A system bus is a single computer bus that connects the major
components of a computer system, combining the functions of
a data bus to carry information,
an address bus to determine where it should be sent or read from, and
a control bus to determine its operation.
Connection between processor and memory
STEPS TO EXECUTE AN INSTRUCTION
1) The address of first instruction (to be executed) gets loaded into PC.
2) The contents of PC (i.e. address) are transferred to the MAR & control-unit issues
Read signal to memory.
3) After certain amount of elapsed time, the first instruction is read out of memory and
placed into MDR.
4) Next, the contents of MDR are transferred to IR. At this point, the instruction can be
decoded & executed.
5) To fetch an operand, it's address is placed into MAR & control-unit issues Read signal.
As a result, the operand is transferred from memory into MDR, and then it is transferred
from MDR to ALU.
STEPS TO EXECUTE AN INSTRUCTION Continued
6) Likewise required number of operands is fetched into processor.
7) Finally, ALU performs the desired operation.
8) If the result of this operation is to be stored in the memory, then the
result is sent to the MDR.
9) The address of the location where the result is to be stored is sent to the
MAR and a Write cycle is initiated.
10) At some point during execution, contents of PC are incremented to
point to next instruction in the program.
Example 1 -
List the steps needed to execute the machine instruction
Load R2, LOC
Assume that the address of the memory location containing this instruction is initially in register PC.

Solution: The required steps are:

• Send the address of the instruction word from register PC to the memory and issue a
Read control command.
• Wait until the requested word has been retrieved from the memory, then load it into
register IR, where it is interpreted (decoded) by the control circuitry to determine the
operation to be performed.
• Increment the contents of register PC to point to the next instruction in memory.
• Send the address value LOC from the instruction in register IR to the memory and issue a Read control
command.
• Wait until the requested word has been retrieved from the memory, then load it into
register R2.
Example -2
Load R2, LOC
Q) Explain the operational concepts of instruction execution for the
instruction using register-register operation.

1. MAR ← [PC], READ

2. MDR ← [MEMORY]MAR address ; [PC] ← [PC] + 1
3. IR ← [MDR]
4. DECODE, OPERAND FETCH
1. MAR ← [LOC] , READ
2. MDR ← [MEMORY]MAR address
3. R2 ← [LOC]

Steps of instruction execution -

INSTRUCTION FETCH, DECODE, OPERAND FETCH, EXECUTE, WRITE BACK

BUS STRUCTURE
• A bus is a group of lines that serves as a connecting path for several
devices.
• A bus may be lines or wires.
• The lines carry data or address or control signal.
• There are 2 types of Bus structures:
1) Single Bus Structure
2) Multiple Bus Structure.
1) Single Bus Structure
• Because the bus can be used for only one transfer at a time, only 2 units can
actively use the bus at any given time.
• Bus control lines are used to arbitrate multiple requests for use of the bus.
Advantages:
1) Low cost.
2) Flexibility for attaching peripheral.
Single bus structure
Limitations:
• System Expansion will degrade the performance because as the
number of functional unit increases, more communication is required
but at a time only 1 transfer can happen via 1 bus.
• Overall system capacity limits the transfer rate & If bus fails, whole
system will fail.
• Suitable for small systems only.
2) Multiple Bus Structure
Systems that contain multiple buses achieve more concurrency in operations.
Two or more transfers can be carried out at the same time.
Advantage: Better performance.
Disadvantage: Increased cost.
• The devices connected to a bus vary widely in their speed of operation.
• To synchronize their operational-speed, buffer-registers can be used.
• Buffer Registers
→ are included with the devices to hold the information during transfers.
→ prevent a high-speed processor from being locked to a slow I/O device during data
transfers.
 Speed Issue
• Different devices have different transfer / operation speed.

• If the speed of bus is bounded by the slowest device connected to it,

the efficiency will be very low.

• How to solve this?

A common approach – use buffers.
 PERFORMANCE
• The most important measure of performance of a computer is how quickly it can
execute programs.

• The speed of a computer is affected by the design of

1) Instruction-set.
2) Hardware & the technology in which the hardware is implemented.
3) System Software such as compiler & operating system.

• Because programs are usually written in a HLL, performance is also affected by

the compiler that translates programs into machine language. (HLL High Level
Language).

• For best performance, it is necessary to design the compiler, machine instruction

set and hardware in a coordinated way.
Processor with cache
• Program instructions and data move between the memory & the processor.

• At the start of execution, all program instructions are stored in the main-memory.

• As execution proceeds, instructions are fetched into the processor, and a copy is placed in the
cache.

• Later, if the same instruction is needed a second time, it is read directly from the cache.

• A program will be executed faster if movement of instruction/data between the main-memory

and the processor is minimized which is achieved by using the cache.
Processor Clock
• Processor circuits are controlled by a timing signal called a clock.
• The clock defines regular time intervals called Clock Cycles.
• To execute a machine instruction, the processor divides the action to
be performed into a sequence of basic steps such that each step can
be completed in one clock cycle.
• Let P = Length of one clock cycle and R = Clock rate.
• Relation between P and R is given by

R is measured in cycles per second and known as also called Hertz (Hz)
BASIC PERFORMANCE EQUATION
• Let T = Processor time required to executed a program.

N = Actual number of instruction executions.

S = Average number of basic steps needed to execute one machine instruction.

R = Clock rate in cycles per second.

The program execution time is given by

It refers to the basic performance equation.

BASIC PERFORMANCE EQUATION

• To achieve high performance, the computer designer must reduce the value of T, which
means reducing N and S, and increasing R.
 The value of N is reduced if source program is compiled into fewer machine
instructions.
 The value of S is reduced if instructions have a smaller number of basic steps to
perform.
 The value of R can be increased by using a higher frequency clock.
• Care has to be taken while modifying values since changes in one parameter may affect
the other.
CLOCK RATE

There are 2 possibilities for increasing the clock rate R:

1) Improving the IC technology makes logic-circuits faster. This
reduces the time needed to compute a basic step.

2) Reducing the amount of processing done in one basic step also

reduces the clock period P.
 Pipeline and Superscalar Operation
• Instructions are not necessarily executed one after another.
• The value of S doesn’t have to be the number of clock cycles
to execute one instruction.
• Goal – reduce S (The effective value of S should approach 1)
• Ways -
Pipelining – overlapping the execution of successive
instructions.
Superscalar operation – multiple instruction pipelines are
implemented in the processor
INSTRUCTION SET: CISC AND RISC

RISC CISC
Simple instructions taking one cycle Complex instructions taking multiple cycle
Instructions are executed by hardwired control Instructions are executed by microprogrammed
unit control unit

Fewer instructions More instructions

Fixed length instructions Variable length instructions
Few addressing modes, and most instructions Many addressing modes
have register to register addressing mode

Multiple register set Single register set

Highly pipelined No pipelined or less pipelined
 CISC vs RISC analysis
• Tradeoff between N and S
• In RISC architecture N will be more & S will be less (as
instructions are simple & of fixed length).
• In CISC architecture N will be less & S will be more (as
instructions are complex & not of fixed length).
• Reduced Instruction Set Computers (RISC)
• Complex Instruction Set Computers (CISC)
 Peformance Measurment

There are two ways for measurmnt.

1. MIPS
2. SPEC
 MIPS(Million of Instructions Per Second)

• It is a strategy for measuring the raw speed of a computer’s processor.

• Since the MIPS estimation doesn’t take into consideration other components such as
the computer’s I/O it isn’t continuously a reasonable way to degree the execution of a
computer.

How to calculate MIPS( Parameters required)

• Number of instructions per second can be performed by a processor

• Execution time.
If no. of instructions and Execution time is given.
Step 1: Perform the Divide operation between no. of instructions and
Execution time and store the value (Let X) in a variable.
Step 2: Perform the Divide operation between that variable (X) and 1 million
for finding millions of instructions per second.
Example:
if a computer completed 2 million instructions in 0.10 seconds
X = 2 million/0.10 = 20 million.
MIPS rate = X/1 million
MIPS rate =20 million/1 million =20.
General Formula:

𝐈𝐧𝐬𝐭𝐫𝐮𝐜𝐭𝐢𝐨𝐧 𝐂𝐨𝐮𝐧𝐭
MIPS=
𝐄𝐱𝐞𝐜𝐮𝐭𝐢𝐨𝐧 𝐭𝐢𝐦𝐞×𝟏𝟎𝟔
Disadvantages of MIPS:
• It may not reflect real execution

• It is an older, obsolete measure of a computer’s speed and

power.
SPEC(System Performance Evaluation Corporation)
• Benchmark refers to standard task used to measure how well a processor operates.

• The Performance Measure is the time taken by a computer to execute a given

benchmark.

• SPEC selects & publishes the standard programs along with their test results for

different application domains.

(SPEC  System Performance Evaluation Corporation).

SPEC Rating is given by

PERFORMANCE MEASUREMENT

• SPEC rating = 50  The computer under test is 50 times as fast as reference

computer.

• The test is repeated for all the programs in the SPEC suite.

Then, the geometric mean of the results is computed.

Let SPECi = Rating for program ‘i' in the suite.

Overall SPEC rating for the computer is given by

where n = no. of programs in the suite

Thank you