DSPA assignment

Module-1
Introduction to digital signal
processing.
1. Explain a DSP system with the help of block diagram and List the
typical formats used for numbers to represent signals and
coefficient in DSP systems.
2. An analog signal is sampled at the rate of 8KHZ. If 512 and 1024
samples of this signal are used to compute DFT X(K). Determine the
analog frequency spacing between adjacent X(K) elements
corresponding to k = 64, k = 1, k=128
3. Explain the decimation and interpolation process, with the help of
block diagrams and necessary equations.
4. Determine the interpolated sequence Y(m) with input sequence
X(n)=[3,2,-2,0,7] using an interpolated filter b k = [1\2, 2\2, 1\2] and
interpolation factor 2.
5. Determine the interpolated sequence Y(m) with input sequence
X(n)=[0,3,6,9,12] using an interpolated filter bk = [1\3, 2\3, 1, 2\3,
1\3] and interpolation factor 3.
6. Discuss In detail typical formats used fro numbers to represent
signals and coefficients DSP system.
7. Calculate the the dynamic range and precision of each of the
following number representations formats:
a. 24-bit, single bit, fixed-point format
b. 48-bit, double-precision, fixed-point format
c. A floating -point format with a 16-bit mantissa and an 8-bit
exponent.
8. Define LTI system
9. Define dynamic range and resolution.
10. Interprete D\A converter error due to zero order hold at its
output.

Module-2
Architecture for programmable DSP
devices.

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 1. Design a 4x4 braun multiplier. Explain in detail with relevant
equations comment on bus width.
a. What modification is required to carryout multiplication of
signed no’s?
2. Explain the addressing modes:
3. Explain the function of address generation unit.
4. Explain\analyze MAC unit with a neat block diagram.
a. Discuss in detail, the methods to avoid overflow\underflow
condition.
5. What is barrel shifter?
6. Build 4x4 barman multiplier.
7. Elaborate the importance of saturation logic and guard bits used in
MAC unit.
8. Explain system level parallelism and pipelining.
a. Analyse the importance of parallelism and pipelining used in
programmable DSP with the help of 8-tap FIR filter.
9. With a neat block diagram, explain ALU of a DSP system.
10. Complete the sequence in which the input data should be
ordered for a 16-point DIT FFT.
11. Identify the addressing modes of the operands in each of the
following instructions and their operation:
a. ADD B
b. ADD #22h
c. ADD + *addrreg
d. ADD *addrreg, offset+
12. Explain the basic architectural feature os PDSP devices.
13. Explain the register pointer updating algorithm for circular
buffer addressing mode using neat diagram.

Module 3:
Programmable DSPs
1. Distinguish the architecture features of 3 fixed point DSPs.
2. Sketch the functional diagram of ALU of TMS320C54XX DSP and
explain briefly.
3. Describe the operation of hardware timer with a neat diagram.
4. Write an ALP of hardware timer with neat diagram.
5. Write an ALP of TMS320C54XX processor to compute the sum of
three product terms given by an equation using MAC instruction.
Y(n) = h0 x(n) + h1 x(n-1) + h2 x(n-2)
6. Explain the various bit fields of status register ST0, ST1 and PMST
registers.

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 7. Compare the architectural features of 3 fixed point DSPs.
8. Determine the contents after each of the following TMS 320 C54 XX
addressing mode is used. Assume the current content of AR4 to be
200h and contents of AR0 AS 20h:
a. *AR4 + 0
b. *+AR4(40h)
c. *AR4 – 0
d. *AR4 +
e. *AR4
f. *+AR4(-10h)
9. Explain 6-stage pipelining on TMS320C54 XX processor execution.
10. Describe the operation of given instructions:
a. MAC *AR3 –
b. *AR4+ ,B,A
c. MPY #01234,A
d. MPY *AR2-, *AR4 +0, B
e. MAS *AR3-, *AR4 +, B, A
f. RPT #2
11. Compare architecure features of three fixed-point DSPs:
TMS320C25 , DSP56000, ADSP2100

MODULE 4:
Implementation of basic and FFT
algorithms.
1. Explain the concept of Q-notation and highlight on multiplication of
number represented using Q-notation.
2. Write a TMS320C54XX program that illustrates the implementation
of an interpolating FIR filter of length 15 and interpolating factor 5.
3. Write TMS320C54XX program for the following subroutines of 8-
point FFT implantations
a. Butterfly subroutine
b. Bit reverse subroutine
4. Derive the expression for optimal scaling factor for DIT-FFT butterfly
algorithm. Explain the need
5. Implement the block diagram and briefly explain the following.
a. FIR filter
b. IIR filter
6. Sketch the block diagram for second order IIR filter and explain
briefly.
7. Write a program to multiply two Q15 numbers.

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 8. Explain the implement a butterfly structure in DIT FFT algorithm and
derive the equation for the same.
a. Write a subroutine for 8-point DIT FFT algorithm.
9. Write the subroutine for bit reversed order.
10. Develop the subroutine to implement butterfly computation.
11. Determine the value of each of the following 16-bit numbers
represented using the given Q-notation:
a. 4400h as a Q0 Number
b. 0.3125 as a Q15 Number
c. CDCAh as Q7 Number
d. 4400h as Q15 Number
e. D800h as Q15 Number
f. FEA0h as Q7 Number
12. Determine the following for a 8 and 256 point FFt
computation:
a. Number of stages
b. Number of butterflies in each stage
c. number of butterflies needed fro entire computation
d. number of butterflies for complex twiddle factors

MODULE-5:
Interfacing and applications.
1. Describe DMA with respect to TMS320C54XX processor.
2. Interface data memory system with the address reange
000800H000FFFH for TMS320C5416 Processor, use 2Kx8 SRAM
memory chips.
3. With a neat diagram, explain the synchronous serial interface
between TMS320C54XX and CoDEC device.
4. Explain the DSP based biotelemetry receiver system with a neat
diagram.
5. List and explain memory and I\O interfacing signals of
TMS320C5416 Processor.
6. Design a data memory system with address range 000800h –
000FFFh for C5416 processor use 2KxSRAM memory chips.
7. What are interrupts? How interrupts are handled with flowchart.
a. C54XX DSP processors.
b. TMS320G4XX Processors.
8. With a neat block diagram and timing diagram for transit and
receive operation of SSL. Explain the signals involved in
synchronous serial interface.

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 9. With a neat diagram, explain external memory interface signals of
IMS320C54XX processor for read-write operations.
10. Design a circutit to interface an 8KX16 program ROM to
TMS320C5416 DSP in the address range 7FE000h – 7FFFFFh.
11. Explain with a block diagram dg clicpping auto correlation
speech detector.
12. Explain JPEG algorithms with relevant block diagram for image
processing.

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