Chapter 04 Memory A
Chapter 04 Memory A
Memory Management
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Memory Management
• Ideally programmers want memory that is
– large
– fast
– nonvolatile
• Memory hierarchy
– small amount of fast, expensive memory – cache
– some medium-speed, medium price main memory
– gigabytes of slow, cheap disk storage
• Memory manager
– part of the operating system that manages the memory hierarchy
– Keeps track of which parts of memory are in use and which parts are not in
use
– Allocate memory to processes and deallocate it
– Manages swapping between main memory and disk when main memory is
too small to hold all the processes
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Basic Memory Management
Monoprogramming without Swapping or Paging
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Memory Management
• Swapping
– Bring in each process in its entirety, running it for a while, then put
it back on disk
• Virtual Memory
– Allows programs to run even when they are only partially in main
memory
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Swapping
Multiprogramming with Variable Partitions
• Bit Maps
• Free Lists
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Memory Management with Bit Maps
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Memory Management with Linked Lists
• Maintains a linked list of allocated and free memory segments
• Segment List is kept sorted by address
– Updating the list is straightforward
• Four neighbor combinations for the terminating process X
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Memory Management with Linked Lists
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Virtual Memory
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Virtual Memory
Paging
• Virtual address
– Program generated address
• MOV REG, 1000
– Forms the virtual address space
– Virtual address space is divided up into units called
pages and the corresponding units in the physical
memory are called page frames.
– Pages and page frames are always the same size.
– Transfers between RAM and disk are always in units of
a page.
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Virtual Memory
Paging
• The position and function of the MMU
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Paging
• The relation between virtual
addresses and physical memory
addresses given by page table
• Page fault
– When the MMU notices that the
page is unmapped, it causes the
CPU to trap to the operating
system.
– The OS picks a little-used page
frame and writes its contents
back to the disk.
– It then fetches the page just
referenced into the page frame
just freed, changes the map, and
restarts the trapped instruction.
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Page Tables
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Page Tables
• Two designs
– Single page table consisting of an array of fast
hardware registers (figure in the previous page)
• Requires no memory references during mapping
• Loading the full page table at every context switch is
expensive.
– Page table in main memory
• A single register points to the start of the page table.
• Fast memory map change by reloading one register
• Requires memory references during the execution of each
instruction
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Multilevel Page Table
• Avoids keeping all the page tables in memory all the time.
• 32 bit address with 2 page table fields
• Two-level page tables
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Page Tables (3)
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Inverted Page Tables
Comparison of a traditional page table with an inverted page table
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