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COMSATS University
Islamabad campus
Name: Urwa-Til-Wusqa
Reg.NO: FA22-BCE-091
Course: Computer Organization
And Architecture Class: BCE-5
Assignment No: Lab Report 10
Instructor’s Name: Dr. Dilshad Sabar
Lab # 10 Single Cycle MIPS Datapath (R-type and Load/Store)
Objective:
Adding ALU and Control Unit to the previous module
In-Lab Tasks
1. Add ALU to previous Blocks and write Testbench.
ALU: Test bench: Output:
2. Add Control Unit to the previous blocks and write Testbench.
Control Unit:
Code: ALU Control: ALUTop Module: Output:
Conclusion:
In this lab, we continued building the datapath by implementing the ALU
and the Control Unit, which are essential for performing arithmetic/logical operations and managing control signals. A Control Module was designed to generate the 2-bit ALU operation, and an ALUCTRL module was created to combine the 4-bit function code and ALU operation for the ALU. Temporary storage (registers) and multiplexers were added to improve efficiency and handle data flow. Error-handling mechanisms were incorporated to ensure smooth operation, and thorough testing was performed to verify the integration of all components. Despite facing challenges during module integration, the lab successfully enhanced the datapath design.