ADVANCED PLATFORM MANAGEMENT

USER’S GUIDE
REVISION 0.3 DATE 2015/12/25

CGS-6010
2U CARRIER GRADE SERVER BASED ON
INTEL® XEON™ E5-2600V3 SERIES

Copyright 2015 Advantech Co. Ltd. All rights reserved.

Revision History

Date Revision Modifications

[mm/dd/yyyy]
12/25/2015 0.3 - Modified document title and page footer
- Updated screenshots for labelling the location of KVM
connectors (keyboard/VGA/mouse)
- Added a new Section 5.8 Troubleshooting for ipmitool
Drivers
- Revised descriptions for adding a new BMC user
- Moved up BMC Dual NIC Support section to Section
1.2.2.1
- Added OS2BMC feature support
- Added BIOS bootup status table for the
‘FW_PROGRESS’ sensor
- Revised the contents in Section 2.9.4 SNMP Support
- Updated Section 2.10.5 Power Restore Policy
- Modified the descriptions of power restore policy in
BMC web interface
- Revised the descriptions of Alert Policy
- Removed 'Handling Firmware Dependency'
descriptions for BMC/BIOS firmware upgrade
- Replaced several screenshots for BIOS/BMC upgrade
- Renamed the tile of Section 5
- Updated the descriptions in Section 5.3 Creating
System Events from an Application
- Revised the contents of Section 5.5 Check PSU Presence
- Corrected the behavior descriptions for Chassis ID
button and Chassis Identification LEDs
- Revised the content of Section About this manual
- Corrected in Section 2.9.3.2.2: Any temperature sensor
assertion event will generate a platform alert
- In Section 2.10.3, ‘None’ option in Authentication Type
supported is enabled
- Corrected the description about non-latching sensors
10/08/2015 0.2 - Removed optional dedicated NIC support
- Removed session authentication type “None” for LAN
interface
- Clarified ‘Store Configuration Settings’ OEM command
- Clarified the difference of SEL full behavior in BIOS and
BMC settings
- Revised the descriptions of several sensors in Section
2.6 Sensors
- Modified the contents of thermal management in
Section 2.7 Thermal Management
- The descriptions for OEM PEF action are reworked.
- Revised the contents of PSU status alert notification

Advantech CGS-6010 Advanced Platform Management Users Guide Page 2

 - Modified the descriptions in Section 5.5 Check PSU
Presence
- Appendix B Firmware Release and Versioning Number is
updated.
09/18/2015 0.1 Initial version –draft-

© Copyright 2015/2016 – Advantech Co., Ltd.

All Rights Reserved

Advantech Co., Ltd. reserves the right to make improvements in the products described in
this manual at any time without notice. No part of this manual may be reproduced, copied,
translated or transmitted in any form or by any means without the prior written permission
of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and
reliable. However, Advantech Co., Ltd. assumes no responsibility for its use, nor for any
infringements of the rights of third parties, which may result from its use.

Advantech CGS-6010 Advanced Platform Management Users Guide Page 3

About this manual
Thank you for purchasing and using the CGS-6010.
The target audience of this manual includes users, developers and technicians. This
document describes the features, functions and operations of the Advanced Platform
Management provided by the Baseboard Management Controller (BMC) on the CGS-6010.
This manual is organized as follows:
 Section 1: Getting Started helps you with the first steps of using the Advanced
Platform Management on the CGS-6010.
 Section 2: BMC Functionalities provides detailed descriptions of the CGS-6010’s
BMC and its features.
 Section 3: Web Interface introduces the web browser interface provided by BMC
that will help users manage and operate BMC more easily
 Section 4: BMC Firmware and BIOS Upgrade describes the failsafe mechanism of
BMC and BIOS as well as the steps of BMC or BIOS firmware upgrade.
 Section 5: Essential Information for Advanced Platform Management provides best
practices and related information that may be helpful for the operation and
troubleshooting of the Advanced Platform Management.
 Appendices section provides supplemental information referenced in the other
sections of this document and BMC firmware release policy.
This document covers:
 BMC Firmware version 0.08 and later
Revision specific features or implementations – if any – are identified using (Rev. xyz) in the
related text.
Some sections make assumptions on other 3rd party or Advantech software and the related
versions of such software:
 IPMItool version 1.8.14 or greater
 CGS-6010 BIOS version 0.58 and later

Advantech CGS-6010 Advanced Platform Management Users Guide Page 4

Useful documents
If you cannot find the information you’re looking for or need more detailed information on a
specific topic, please refer to the list of additional documents and other sources of
information below. Please contact your Advantech representative if you need help on
obtaining these documents or still can’t find what you’re looking for.
 Intelligent Platform Management Interface Specification, Version 2.0, Revision 1.1,
Intel Corporation, Hewlett-Packard Company, NEC Corporation, Dell Computer
Corporation, October 1, 2013.

 IPMI – Platform Management FRU Information Storage Definition, V1.0, Document

Revision 1.1, September 27, 1999.

 IPMI - Platform Event Trap Format Specification V1.0, Document Revision 1.0,
December 7, 1998.

 PICMG® 3.0 Revision 3.0 AdvancedTCA Base Specification, March 24, 2008.

 HPM.1, Hardware Platform Management IPM Controller Firmware Upgrade

Specification R1.0, PCI Industrial Computer Manufacturers Group (PICMG®) May 4,
2007.

 Information on Intel CPUs, chipsets and NIC silicon can be found at www.intel.com

 CGS-6010 User Manual

 Getting Started Guide for Advantech CGS-6010 QuickStart Linux Image

 ipmitool how-to can be found at: http://linux.die.net/man/1/ipmitool

 An introduction to IPMI can be found at :

http://www.intel.com/content/www/us/en/servers/ipmi/ipmi-home.html

Advantech CGS-6010 Advanced Platform Management Users Guide Page 5

Warnings, Cautions and Notes

Warning! Warnings indicate conditions, which, if not observed, can cause

personal injury.

Caution! Cautions are included to help you avoid damaging hardware or

losing data.

Note! Notes provide additional information.

We appreciate your input

Please let us know of any aspect of this product, including the manual, which could use
improvement or correction. We appreciate your valuable input in helping make our products
and documentation better.
Please send all such to: [email protected]

Acknowledgements
Xeon, Core and Intel are trademarked by Intel Corp. All other product names or trademarks
are properties of their respective owners.

Advantech CGS-6010 Advanced Platform Management Users Guide Page 6

Table of Contents
1. GETTING STARTED ........................................................................... 16
1.1 ADVANCED PLATFORM MANAGEMENT & BMC INTRODUCTION ............................... 16
1.1.1 Integrated Platform Management Interface .......................................................................... 16
1.1.2 Software Support .............................................................................................................................. 16
1.1.3 Advanced Features ........................................................................................................................... 16
1.1.4 The Advantech QuickStart Linux Image for CGS-6010 ..................................................... 17
1.2 CONNECTING TO THE BMC ............................................................................................ 18
1.2.1 Internal Connection via the System Interface ...................................................................... 18
1.2.2 External Connection via the LAN Interface ........................................................................... 19
1.2.2.1 BMC Dual NIC Support .................................................................................................................... 20
1.2.2.2 Configuring the BMC’s LAN IP address through the KCS Interface ............................. 20
1.2.2.3 Enable LAN access to the BMC .................................................................................................... 21
1.3 CONNECTING TO THE X86 HOST OVER SOL ................................................................. 22
1.4 GETTING HELP: TECHNICAL SUPPORT AND ASSISTANCE............................................ 25
2. BMC FUNCTIONALITIES .................................................................. 27
2.1 OVERVIEW ........................................................................................................................ 27
2.1.1 System Interface ................................................................................................................................ 28
2.1.2 LAN Interface ...................................................................................................................................... 29
2.2 OEM IPMI COMMANDS ................................................................................................. 29
2.2.1 Advantech OEM IPMI Commands .............................................................................................. 29
2.2.1.1 Advantech OEM Command ‘Store Configuration Settings’ ............................................. 29
2.2.1.2 Advantech OEM Command ‘Read Configuration Settings’ .............................................. 32
2.2.1.3 Advantech OEM Command ‘SEL Mode Configuration’ ..................................................... 34
2.2.1.4 Advantech OEM Command ‘Read Port 80 (BIOS POST Code)’ ...................................... 36
2.2.2 AMI OEM IPMI Commands ............................................................................................................ 37
2.2.2.1 AMI OEM Parameter ‘Restore Default Configuration’....................................................... 37
2.3 BMC WATCHDOG ............................................................................................................ 37
2.4 FRU INFORMATION ......................................................................................................... 37
2.5 SYSTEM EVENT LOG ........................................................................................................ 39
2.6 SENSORS ........................................................................................................................... 39
2.6.1 Sensor Thresholds ............................................................................................................................ 39
2.6.2 Negative/Positive Hysteresis....................................................................................................... 39
2.6.3 Knowing the Source: Entity IDs .................................................................................................. 40
2.6.4 List of Sensors ..................................................................................................................................... 40
2.6.4.1 Voltage Sensors .................................................................................................................................. 42
2.6.4.2 Thermal Sensors ................................................................................................................................ 43
2.6.4.3 Fan Sensors .......................................................................................................................................... 44
2.6.4.4 Power Current .................................................................................................................................... 44
2.6.4.5 Discrete Sensors ................................................................................................................................ 44
2.6.4.6 Summary of Supported Sensors ................................................................................................. 47
2.6.5 Dynamic Thresholds ........................................................................................................................ 50
2.6.6 Auto Re-Arm and Manual Re-Arm ............................................................................................. 50
2.7 THERMAL MANAGEMENT ............................................................................................... 50
2.7.1 Fan Initial State on System Start Up ......................................................................................... 51
2.7.2 BMC Controlled Fan Algorithm ................................................................................................... 51
2.7.3 BMC Controlled Fan Algorithm Exception Handling ......................................................... 51

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 2.8 BIOS SYNCHRONIZATION ............................................................................................... 52
2.8.1 System Time ........................................................................................................................................ 52
2.8.2 FRU Info ................................................................................................................................................. 52
2.9 ADVANCED PLATFORM MANAGEMENT FEATURES ...................................................... 52
2.9.1 Intrusion Detection .......................................................................................................................... 52
2.9.2 BIOS POST Watchdog ...................................................................................................................... 52
2.9.3 Platform Event Filtering & SNMP Traps ................................................................................. 53
2.9.3.1 An Introduction to PEF ................................................................................................................... 53
2.9.3.2 Preconfigured Platform Alerts .................................................................................................... 55
2.9.4 SNMP Support ..................................................................................................................................... 57
2.9.4.1 MIB version .......................................................................................................................................... 57
2.9.4.2 SensorTable ......................................................................................................................................... 57
2.9.4.3 BoardInfoTable .................................................................................................................................. 59
2.9.4.4 ChassisInfo ........................................................................................................................................... 60
2.9.4.5 FRUTable............................................................................................................................................... 61
2.9.4.6 SELTable................................................................................................................................................ 62
2.9.4.7 AbstractionLayer ............................................................................................................................... 62
2.10 BMC DEFAULT SETTINGS............................................................................................... 64
2.10.1 User Account ....................................................................................................................................... 64
2.10.2 PEF ........................................................................................................................................................... 64
2.10.3 LAN .......................................................................................................................................................... 66
2.10.4 SOL ........................................................................................................................................................... 67
2.10.5 Power Restore Policy ...................................................................................................................... 67
3. WEB INTERFACE ................................................................................ 69
3.1 DASHBOARD ..................................................................................................................... 70
3.2 FIELD REPLACEABLE UNIT (FRU) ................................................................................ 71
3.3 SERVER HEALTH .............................................................................................................. 72
3.3.1 Sensor Readings................................................................................................................................. 72
3.3.2 Event Log .............................................................................................................................................. 73
3.4 CONFIGURATION .............................................................................................................. 74
3.4.1 Network Settings ............................................................................................................................... 74
3.4.2 PEF Management ............................................................................................................................... 75
3.4.3 User Management ............................................................................................................................. 76
3.5 REMOTE CONTROL .......................................................................................................... 77
3.5.1 Console Redirection ......................................................................................................................... 77
3.5.2 Power Control and Status .............................................................................................................. 77
3.5.3 Java SOL ................................................................................................................................................. 78
3.6 MAINTENANCE ................................................................................................................. 79
3.6.1 Restore Configuration ..................................................................................................................... 79
4. BMC FIRMWARE AND BIOS UPGRADE........................................ 80
4.1 UPGRADE PLATFORM FIRMWARE .................................................................................. 80
4.1.1 Upgradeable Components ............................................................................................................. 80
4.1.1.1 Component 0: BMC Boot loader.................................................................................................. 81
4.1.1.2 Component 1: BMC application firmware .............................................................................. 81
4.1.1.3 Component 2: BIOS .......................................................................................................................... 82
4.1.2 Check Active BMC Firmware Version....................................................................................... 82
4.1.3 Upgrading BMC Firmware through the KCS Interface...................................................... 83
4.1.4 Upgrading BIOS through KCS Interface ................................................................................... 85

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5. ESSENTIAL INFORMATION FOR ADVANCED PLATFORM
MANAGEMENT ............................................................................................ 87
5.1 IDENTIFYING THE SYSTEM .............................................................................................. 87
5.2 LIGHTS OUT CONTROL .................................................................................................... 87
5.3 CREATING SYSTEM EVENTS FROM AN APPLICATION ................................................... 88
5.4 KEEPING TIME IN SYNC ................................................................................................... 88
5.5 CHECK PSU PRESENCE ................................................................................................... 88
5.6 SYSTEM HEALTH STATUS ............................................................................................... 90
5.6.1 Power Alarm LED (PWR) ............................................................................................................... 91
5.6.2 Minor Alarm LED (MNR)................................................................................................................ 91
5.6.3 Major Alarm LED (MJR) .................................................................................................................. 91
5.6.4 Critical Alarm LED (CRT) ............................................................................................................... 91
5.6.5 Chassis Identification LED (ID) ................................................................................................... 92
5.6.6 System Status LED (Status) .......................................................................................................... 92
5.6.7 Power LED ............................................................................................................................................ 93
5.6.8 FAN Status LED .................................................................................................................................. 93
5.7 READING THE SEL........................................................................................................... 93
5.8 TROUBLESHOOTING FOR IPMITOOL DRIVERS ............................................................... 94
5.9 TROUBLESHOOTING BOOT PROBLEMS .......................................................................... 95
5.9.1 Use SoL to Monitor BIOS POST .................................................................................................... 95
5.9.2 Use OEM Command ‘Read Port 80’ to Track BIOS Post Codes ...................................... 95
5.9.3 Use SoL to Enter BIOS Stup and Change Settings ................................................................ 96
A. APPENDIX: SUPPORTED IPMI COMMANDS .............................. 97
B. APPENDIX: FIRMWARE RELEASE AND VERSIONING NUMBER
101

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 List of Figures
Figure 1: Front Serial Console Port and USB Ports .................................................................. 17
Figure 2: Rear Serial Console, VGA and USB Ports .................................................................. 17
Figure 3: The Location of Management Ports at Rear Panel................................................... 18
Figure 4: Use ‘ipmitool mc info’ Command to get BMC Info .................................................. 19
Figure 5: BMC Dual NIC ........................................................................................................... 20
Figure 6: Print LAN Channel Configuration.............................................................................. 21
Figure 7: Set up a Static IP for BMC ......................................................................................... 21
Figure 8: Configure Dynamic IP Assignment for the BMC ....................................................... 21
Figure 9: Set User ID, User Name, Password and Privilege Level ............................................ 22
Figure 10: Use IPMI over LAN to get BMC Device Info ............................................................ 22
Figure 11: Set SOL Baud Rate Setting of BMC ......................................................................... 23
Figure 12: Enable SOL for a Specified User.............................................................................. 23
Figure 13: Display Current BMC SOL Setting ........................................................................... 23
Figure 14: Activate SOL Session to Access the Advantech Standard Linux Image .................. 24
Figure 15: Access CGS-6010 BIOS in SOL Session .................................................................... 24
Figure 16: Enter BIOS Setup Menu in SOL Session .................................................................. 25
Figure 17: Available Commands during SOL Connection ........................................................ 25
Figure 18: BMC Block Diagram ................................................................................................ 28
Figure 19: Retrieve System FRU Information .......................................................................... 38
Figure 20: Sensor Thresholds and Event Assertion/Deassertion Points ................................. 40
Figure 21: Show SDR Status with ‘ipmitool sdr’ Command (1/2) ............................................ 41
Figure 22: Show SDR Status with ‘ipmitool sdr’ Command (2/2) ............................................ 42
Figure 23: PSU Location ........................................................................................................... 43
Figure 24: The Locations of FANS, INLET and OUTLET Temperature Sensors ......................... 43
Figure 25: BIOS Bootup Events ................................................................................................ 47
Figure 26: MIB Version in BMC................................................................................................ 57
Figure 27: Sensor Table ........................................................................................................... 58
Figure 28: BoardInfo Table ...................................................................................................... 59
Figure 29: Chassis Info ............................................................................................................. 60
Figure 30: FRU Table................................................................................................................ 61
Figure 31: SEL Table ................................................................................................................. 62
Figure 32: Abstraction Layer.................................................................................................... 62

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Figure 33: Board Table............................................................................................................. 63
Figure 34: Web Interface Login ............................................................................................... 69
Figure 35: Dashboard Page in Web Interface .......................................................................... 70
Figure 36: Field Replaceable Unit Page in Web Interface ....................................................... 71
Figure 37: Sensor Readings Page in Web Interface ................................................................. 72
Figure 38: Event Log Page in Web Interface............................................................................ 73
Figure 39: Network Settings Page in Web Interface ............................................................... 74
Figure 40: PEF Management Page in Web Interface ............................................................... 75
Figure 41: User Management Page in Web Interface ............................................................. 76
Figure 42: Console Redirection Page in Web Interface ........................................................... 77
Figure 43: Power Control and Status Page in Web Interface .................................................. 78
Figure 44: Java SOL Page in Web Interface ............................................................................. 78
Figure 45: Restore BMC Default Configuration Page in Web Interface .................................. 79
Figure 46: Check BMC Firmware Version ................................................................................ 83
Figure 47: Command ‘ipmitool hpm check’ ............................................................................ 83
Figure 48: BMC Firmware Upgrade ......................................................................................... 84
Figure 49: Check Active BMC Firmware Version ..................................................................... 84
Figure 50: Upgrade BIOS with Ipmitool ................................................................................... 85
Figure 51: Check Active BIOS Version...................................................................................... 86
Figure 52: Chassis Power Command Usage............................................................................. 87
Figure 53: Check the Readings of PSU_x-Status Sensors ........................................................ 89
Figure 54: Response data byte 4&5 of the IPMI ‘Get Sensor Reading’ Command ................. 89
Figure 55: Assertion State Indicates that PSU is Absent ......................................................... 90
Figure 56: PSU Removal Event in SEL ...................................................................................... 90
Figure 57: The locations of Front LEDs .................................................................................... 90
Figure 58: Use ‘ipmitool sel list’ Command to Dump the SEL ................................................. 93
Figure 59: Use ‘ipmitool sel elist’ Command to Dump the SEL ............................................... 93
Figure 60: Use ‘ipmitool sel save’ Command to Store the SEL to a File .................................. 94
Figure 61: Check Saved SEL file ............................................................................................... 94
Figure 62: Use ‘ipmitool sel clear’ Command to Clear SEL ...................................................... 94
Figure 63: Error Message for Executing ipmitool .................................................................... 94
Figure 64: Check Driver Loading Status of ipmitool ................................................................ 95
Figure 65: Load ‘ipmi_si’ Driver ............................................................................................... 95
Figure 66: Load ‘ipmi_devintf’ Driver ...................................................................................... 95

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Figure 67: Use ‘Read Port 80’ Command to Track BIOS Post Codes ....................................... 96
Figure 68: Official BMC FW Release ...................................................................................... 101

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 List of Tables
Table 1: ‘Store Configuration Settings’ Command .................................................................. 31
Table 2: ‘Read Configuration Settings’ Command................................................................... 33
Table 3: ‘SEL Mode Configuration’ Command ......................................................................... 35
Table 4: The BIOS Attempts to Add a New SEL Entry .............................................................. 35
Table 5: ‘Read Port 80(BIOS POST Code)’ Command .............................................................. 36
Table 6: ‘Restore Default Configuration’ Command ............................................................... 37
Table 7: System FRU Information ............................................................................................ 38
Table 8: Entity IDs .................................................................................................................... 40
Table 9: BMC Sensor List ......................................................................................................... 50
Table 10: Fan Speed and Temperature Mapping .................................................................... 51
Table 11: Alert Policy ............................................................................................................... 54
Table 12: PEF Actions .............................................................................................................. 54
Table 13: Trap PDU Format per RFC 1157 ............................................................................... 55
Table 14: PET Table Entry List .................................................................................................. 56
Table 15: User Account Default Setting .................................................................................. 64
Table 16: Default PEF Setting .................................................................................................. 65
Table 17: LAN Default Setting.................................................................................................. 67
Table 18: SOL Default Setting .................................................................................................. 67
Table 19: Power Restore Policy ............................................................................................... 68
Table 20: HPM.1 Capability ..................................................................................................... 81
Table 21: HPM.1 Component 0 Property ................................................................................ 81
Table 22: HPM.1 Component 1 Property ................................................................................ 82
Table 23: HPM.1 Component 2 Property ................................................................................ 82
Table 24: System Identification ............................................................................................... 87
Table 25: Command Parameters of the ‘Platform Event Message’ Command....................... 88
Table 26: Front LEDs Description............................................................................................. 90
Table 27: Supported IPMI Commands................................................................................... 100
Table 28: The Examples of BMC FW Version......................................................................... 101

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Glossary
ACPI Advanced Configuration and Power Interface
BIOS Basic Input Output System
BMC Baseboard Management Controller
CGS Carrier Grade Server
CPU Central Processing Unit
DHCP Dynamic Host Configuration Protocol
DIMM Dual In-line Memory Module
DQA Design Quality Assurance
DVT Design Verification Test
ECC Error Correction Check
EEPROM Electrically Erasable Programmable Read-Only Memory
EVT Engineering Verification Test
FPGA Field Programmable Gate Array
FRB Fault Resilient Booting
FRU Field Replaceable Unit
FW Firmware
GbE Gigabit Ethernet
GUID Globally Unique Identifier
HPM Hardware Platform Management
IANA Internal Assigned Numbers Authority
IP Internet Protocol
IPMB Intelligent Platform Management Bus
IPMC Intelligent Platform Management Controller
IPMI Intelligent Platform Management Interface
KCS Keyboard Controller Style
KVM Keyboard Video Mouse
LAN Local Area Network
LED Light Emitting Diode
LPC Low Pin Count
MAC Media Access Control
MIB Module Information Block
MP Mass Production

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NC-SI Network Controller Sideband Interface
NIC Network Interface Controller
NVRAM Non-Volatile Random Access Memory
OEM Original Equipment Manufacturer
OOB Out-Of-Band
OS Operating System
PCH Platform Controllers Hub
PCIe PCI Express
PEF Platform Event Filter
PET Platform Event Trap
PICMG PCI Industrial Computer Manufacturers Group
POST Power-On Self-Test
PSU Power Supply Unit
PVT Pilot Run Test
RMCP Remote Management Control Protocol
RMCP+ Advanced RMCP
RPM Rotations per Minute
RTC Real Time Clock
SEL System Event Log
SDR Sensor Data Record
SNMP Simple Network Management Protocol
SPI Serial Peripheral Interface Bus
SOL Serial over LAN
SSH Secure Shell
SW Software
TCP Transmission Control Protocol
UTC Universal Time Coordinated

Advantech CGS-6010 Advanced Platform Management Users Guide Page 15

 1. GETTING STARTED
1.1 Advanced Platform Management & BMC Introduction
Advanced Platform Management is supported via an integrated BMC running IPMI v2.0
compliant system management firmware. It provides system health monitoring to local or
remote administrators, and allows them to recognize system degradation early to avoid
system downtime or to shorten mean time to repair. In most cases, troubleshooting can be
performed remotely alleviating physical access to the server.

1.1.1 Integrated Platform Management Interface

Platform management through the Intelligent Platform Management Interface (IPMI) is a
standardized method for controlling and monitoring a device.
The IPMI specification defines a standardized interface for platform management including:
 Monitoring of system information and health, such as fans, temperatures, and
power supplies
 Recovery capabilities, such as system resets and power on/off operations
 Logging capabilities, for abnormal events such as over temperature readings or fan
failures
 Inventory capabilities, such as identifying failed hardware components
For additional information, see the IPMI specification.

1.1.2 Software Support

Advanced Platform Management is based on and compliant to IPMI v2.0. It is supported by
most server operating systems (server OS) such as Windows Server, Linux and FreeBSD
natively.
A standard software package which is most widely used for system platform management
available on a number of operating systems is “ipmitool”. It is well integrated with most
Linux distributions and has become an industry standard.
“ipmitool” will be used in this manual as a reference for interaction with the CGS-6010’s
platform management . Other IPMI compliant software packages shall work in a similar way
as well.

1.1.3 Advanced Features

Several enhancements have been made to the management code of standard white box
server to enhance reliability and serviceability of the system including but not limited to:
 Improved thermal management to cover special scenarios as well as fan
degradation/failure
 Chassis intrusion and FRU presence detection
 Redundant BMC and BIOS flashes for maximum reliability
 Fail safe BMC and BIOS upgrades using industry standard HPM.1 mechanisms and
tools including automatic rollback on an upgrade failure
 Remote updates of firmware as long as primary power is connected to the unit
 BIOS Watchdog for reliable POST process and improved POST code sensor

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  Time synchronization between the BMC and x86 host at startup for consistent
event logs
 System FRU Information synchronization to the host via standard DMI tables
 Large system event log for efficient troubleshooting
 Capability to log system events from the x86 host
 Enhanced security (more information available under NDA)

1.1.4 The Advantech QuickStart Linux Image for CGS-6010

The operating system which runs on the CGS-6010 platform is referred to as the x86 host OS.
In this document, we will take the Advantech QuickStart Linux Image (which is based on
CentOS Linux distribution) as an example of the x86 host OS. Unless otherwise specified and
throughout this document, command examples shown in the screenshots are executed in
the Linux shell of the QuickStart Linux Image. It means that user log in to the QuickStart
Linux Image via KVM (keyboard/video/mouse) or a serial console or remote SSH connection
and end up in the Linux shell to execute the/these command(s).
The easy way to access the QuickStart Linux image is through KVM. In addition, the CGS-
6010 provides a VGA port and four USB ports (two at the rear of the unit and two at the
front) for connection of a monitor, keyboard and mouse. See Figure 1 and Figure 2 for the
location of these connectors.
Two additional methods are available for accessing the QuickStart Linux Image. The first one
is the serial terminal connection. HW connection is made between one of the two console
ports (see Figure 1 and Figure 2) on the CGS-6010 and the console port on your user
platform (Linux or Windows system). Putty or other serial terminal client applications can be
used on the user platform to establish a connection.
Be sure to connect to one serial port only as they are for alternate use.

Figure 1: Front Serial Console Port and USB Ports

Figure 2: Rear Serial Console, VGA and USB Ports

For more details regarding the HW cable connections and the SW configuration settings for
the serial console connection between the CGS-6010 and the user platform, please refer to
the CGS-6010 User Manual and Getting Started Guide for Advantech CGS-6010 QuickStart
Linux Image documents.

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 The second method is a SSH connection over a LAN interface. The physical connection is
made between one of the two Ethernet management ports (see MGMT1 and MGMT2 in
Figure 3) on the CGS-6010 and the LAN port on user platform. Secure Shell (SSH) is a TCP/IP
service that provides a secure mechanism for remotely logging in to the system either over
local network or over Internet from another system. Putty or any other SSH client on the
user platform can be used to establish a connection.

Figure 3: The Location of Management Ports at Rear Panel

For more details regarding the HW cable connections and the SW configuration settings for
the SSH connection between the CGS-6010 and the user platform, please refer to Getting
Started Guide for Advantech CGS-6010 QuickStart Linux Image documents.

1.2 Connecting to the BMC

The BMC supports an internal interface (KCS) to the Intel CPU of the CGS-6010 (“x86 host”)
as well as an Ethernet interface for external users.

1.2.1 Internal Connection via the System Interface

The x86 host can connect to the BMC through the KCS interface (see IPMI specification for
details) using IO ports 0xCA2/0xCA3. Before connecting to the BMC, log in to the x86 host OS
as described earlier.
Run ipmitool to access the BMC, e.g. retrieve device information:
- # ipmitool mc info

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 Figure 4: Use ‘ipmitool mc info’ Command to get BMC Info

In case of the ipmitool error message ‘Could not open device at /dev/ipmi0 or /dev/ipmi/0 or
/dev/ipmidev/0: No such file or directory’ appears, please check whether the ipmitool drivers
have been loaded well. The command for checking driver loading status and the steps of
manually loading ipmitool drivers are provided in Section 5.8 Troubleshooting for ipmitool
Drivers.

1.2.2 External Connection via the LAN Interface

The CGS-6010 uses a shared NIC implementation to implement a management Ethernet port
that allows connection to both the x86 host as well as the BMC. The required functionality to
fork/aggregate traffic is built into the NIC chips used on the CGS-6010. The feature is
transparent to the host OS and does not require any customized Ethernet drivers.
The two Ethernet management ports (see MGMT1 and MGMT2 in Figure 3) located at the
rear panel are both available for providing LAN access to the BMC or the x86 host. Both
ports are used in an active-passive failover mechanism and, for the LAN access to BMC, only
one of the ports will be eligible as the active port. See subsection below for more details.
For security reasons, LAN access to the BMC is disabled by default. This is accomplished by
setting the BMC’s IP address to 0.0.0.0.
Some malware is probing for default IP addresses and user credentials used by many white
box server OEMs. A BMC configured with some default LAN parameters that are not altered
by the user presents a security risk. To avoid such security risk on Advantech hardware,
Advantech disables the LAN port by default to make sure users do actively configure the LAN
parameters and do not use default parameters/credentials.

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1.2.2.1 BMC Dual NIC Support
On the CGS-6010 platform, dual NIC chips (two Intel i210 Ethernet controllers) are
connected to the BMC via one NC-SI interface (see the figure below).
Every time the BMC starts up, it scans the LINK condition of both management ports
(MGMT1 and MGMT2, see Figure 3) to decide which port to use as BMC LAN interface.
If both ports have a link, the BMC uses the MGMT1 port to access the network and will fail
over to the MGMT2 port if the link on the MGMT1 port goes down (for instance, if the
Ethernet cable connected to MGMT1 port is unplugged).
Vice versa, the BMC will try to fail over from the MGMT2 port to MGMT1 port if it is
currently connected on MGMT2 but the link drops.
During the time of the failover, the BMC’s network will be disconnected temporarily.

Figure 5: BMC Dual NIC

1.2.2.2 Configuring the BMC’s LAN IP address through the KCS Interface
The ‘Get/Set LAN Configuration Parameters’ IPMI commands can be used to configure the
BMC’s LAN IP address through the KCS interface. The default IP address source configured in
the BMC is static IP assignment, but both static IP and dynamic IP assignments are
supported. Some command examples to configure the IP address are provided here for
reference, and please refer to related command usage to properly configure the BMC’s IP.
For instance, the current BMC LAN configuration can be displayed through the following
command:
- #ipmitool lan print <channel>

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 Figure 6: Print LAN Channel Configuration

Set up the static IP address 192.168.1.1 for the BMC:

- #ipmitool lan set 1 ipaddr <IP Address>

Figure 7: Set up a Static IP for BMC

Configure the BMC for getting a dynamic IP address from an external DHCP server:
- #ipmitool lan set 1 ipsrc dhcp

Figure 8: Configure Dynamic IP Assignment for the BMC

1.2.2.3 Enable LAN access to the BMC

To enable LAN access to the BMC, follow the steps below:
 Connect to the BMC via the KCS interface
 Set User ID/Password
 Set LAN parameters, especially with valid IP address (see Section 1.2.2.2)

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 Add a new BMC user (e.g. the third user, see Section 2.10.1 User Account). Set the user ID as
‘3’, user name as ‘CGS6010_admin’, password as ‘%cgs6010_admin%’ and privilege level to
‘4’ (Administrator), as in the example below:

Figure 9: Set User ID, User Name, Password and Privilege Level

On the user platform, issue the following command to connect to the BMC over LAN and get
BMC device information:
- #ipmitool –I lan <BMC IP> -U <User ID> -P <Password> mc info

Figure 10: Use IPMI over LAN to get BMC Device Info

1.3 Connecting to the x86 Host over SOL

Advanced Platform Management allows you to access the system’s console while the host
OS is absent, i.e. during BIOS execution and booting. In addition, it provides access to the OS
console when no OS Ethernet interfaces are up or the OS does not provide SSH/Telnet login.
The underlying technology is referred to as Serial over LAN (SOL) which basically means that
the BMC encapsulates host console data into an Ethernet protocol called RMCP+ and
transmits this data through the BMC’s IPMI-over-LAN channel.
Note that the serial console redirection is enabled by default in the CGS-6010 system BIOS.
To establish a SOL session with the x86 host, do the following steps:
1. The default SOL baud rate setting configured in the BMC is 115200 (see Section
2.10.4 SOL). If it has been altered, use the following command to reset the value to
115200:
- #ipmitool sol set non-volatile-bit-rate 115.2 1
- #ipmitool sol set volatile-bit-rate 115.2 1

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 Figure 11: Set SOL Baud Rate Setting of BMC

2. Enable SOL for a specified user (e.g. User ID ‘3’ we previously added in Section
1.2.2.3) in the BMC:
- #ipmitool sol payload enable <channel> <User ID>

Figure 12: Enable SOL for a Specified User

3. Make sure the BMC’s IP address and the IP address of the user platform are located
in the same subnet. On the user platform, you can display the current BMC SOL
settings by using:
- #ipmitool –I lanplus –H <BMC IP> -U <User ID> -P <Password> sol info

Figure 13: Display Current BMC SOL Setting

4. Use the following command to activate the SOL session and access the system
console of the CGS-6010 x86 host. The examples shown here are the console outputs
of the Advantech QuickStart Linux Image and BIOS, which are redirected to the
activated SOL session:
- #ipmitool –I lanplus –H <BMC IP> -U <User ID> -P <Password> sol activate

Advantech CGS-6010 Advanced Platform Management Users Guide Page 23

 Figure 14: Activate SOL Session to Access the Advantech Standard Linux Image

Figure 15: Access CGS-6010 BIOS in SOL Session

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 Figure 16: Enter BIOS Setup Menu in SOL Session

5. In ipmitool you can use ‘~?’ for help and use ‘~.’ to terminate the SOL connection:

Figure 17: Available Commands during SOL Connection

1.4 Getting Help: Technical Support and Assistance

In case the unit you received is a sample for evaluation, please contact your Advantech
representative. For production units, please follow the process below:
1. Visit the Advantech web site at www.advantech.com/support to find the latest
information about the CGS-6010 and related products.
2. Contact your distributor, sales representative, or Advantech’s customer service center
for technical support if you need additional assistance. Worldwide contact information
can be found on www.advantech.com.
3. Please have the following information ready before you call / be sure to include this
information in your email:
 Product name and serial number
 Description of your peripheral attachments
 Description of firmware and software versions installed on the product
 A complete description of the problem

Advantech CGS-6010 Advanced Platform Management Users Guide Page 25

  The exact wording of any error messages
4. In case the unit needs to be sent back for repair, please refer to the CGS-6010 User’s
Manual for instructions.

Advantech CGS-6010 Advanced Platform Management Users Guide Page 26

 2. BMC FUNCTIONALITIES
2.1 Overview
The CGS-6010 is a highly configurable carrier-grade server designed to balance the best in
x86 server-class processing performance with maximum I/O and offload density in a 20”
deep chassis. The system is a cost effective, highly available platform optimized to meet
next-generation networking equipment needs.
With an on-board BMC and various sensors, Advanced Platform Management provides users
with robust, flexible and IPMI v2.0 compliant system monitoring functionality. This section
will explain more details about the basic and advanced features of the BMC. For a complete
list of supported IPMI commands, refer to Appendix A.
The BMC provides the following functions on the CGS-6010:
 All mandatory IPMI BMC functions from Table 3-1 ‘Required BMC Functions’,
Intelligent Platform Management Interface Specification, Version 2.0 (IPMIv2.0
specification).
 Optional BMC functions as follows (also from the IPMIv2.0 specification, Table 3-1):
o Sensors
o IPMB interface
o LAN messaging and alerting
o Bridging support
o Platform event filtering (PEF) and alert policies
o External event generation
 Firmware upgrade
o From host:
The BMC firmware and BIOS can be upgraded from the host system over KCS
interface by using the HPM.1 mechanism.
o Over LAN:
The BMC firmware and BIOS can be upgraded over LAN management
interfaces using the HPM.1 mechanism, either from an external host or CGS-
6010 itself (OS2BMC).
o Both BMC and BIOS upgrade use redundant flash chips for failsafe upgrades
with automatic rollback
 FRU data access through IPMI ‘FRU Read/Write’ commands
 Environmental monitoring reported through IPMI sensors, alerts, and logging
o Temperatures
o Voltages
o Fan speed
o Power supply monitoring (through PMBus)
o Chassis intrusion
 Chassis Power/Reset control via IPMI chassis commands (IPMIv2.0 specification,
Section 28 ‘Chassis Commands’)

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The BMC block diagram is shown below.

Figure 18: BMC Block Diagram

The BMC messaging interfaces comply with the IPMIv2.0 specification.

As host interface, a KCS interface (IPMIv2.0 specification, Section 9 ‘Keyboard Controller Style
(KCS) Interface’) is supported.
In addition, direct LAN based access from x86 host to the BMC (OS2BMC) is supported as
host interface.
LAN connections on MGMT1 and MGMT2 ports are supported over the RMCP/RMCP+
protocol (IPMIv2.0 specification, Section 13 ‘IPMI LAN Interface’).
In summary, there are two communication channels on the BMC:
 KCS Channel (channel number 0Fh), for communication with the x86 host
 LAN Channel (channel number 01h), using the MGMT1 and MGMT2 LAN ports

2.1.1 System Interface

The System Interface provides a communication path between the local x86 processor and
the BMC. The physical interface is based on the LPC bus and is session-less.
The System Interface supports the IPMI defined KCS (Keyboard Controller Style) interface
with the default IO addresses 0xCA2/0xCA3.
This allows IPMI drivers to auto probe for the interface and eliminates the need to specify
additional parameters when loading the IPMI drivers.
 Channel 0Fh System Interface (SMS)
o Access Mode -> Always available
o Protocol -> KCS
o Medium -> System Interface
o Channel Privilege -> Administrator

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 o User & Password Support -> N/A
o Session Type -> Session-less, so no user and authentication support
o Session Quantity -> 0

2.1.2 LAN Interface

Out-of-band (OOB) management over LAN (IPMI over LAN) is implemented via a shared NIC,
which allows the BMC to be accessed through the system’s LAN management ports MGMT1
and MGMT2.
The IP settings and other privileges of this channel can be configured through ‘Get/Set LAN
Configuration Parameters’ commands (Section 23 ‘IPMI LAN Commands’ in the IPMIv2.0
specification).
 Channel 01h for LAN Interface
o Access Mode -> Always available
o Protocol -> IPMB
o Medium -> LAN 802.3
o Channel Privilege -> As set by ‘Set Channel Access’ command
o User & Password Support -> Total 10 users are supported
o Session Type -> Multi-session with authentication (MD5, MD2 and straight
password)
o Session Quantity -> Total 15 simultaneous sessions are supported

2.2 OEM IPMI Commands

Beyond the standard IPMI commands listed in Appendix A, the CGS-6010 supports a number
of OEM specific IPMI Commands.

2.2.1 Advantech OEM IPMI Commands

2.2.1.1 Advantech OEM Command ‘Store Configuration Settings’
This command is used to store configuration settings, and it is used to enable or
disable the NC-SI “Keep PHY Link Up” setting of the management LAN port.
If the “Keep PHY Link Up” setting is enabled, the BMC will keep the PHY link up
regardless of x86 host/OS link state. This is required for SoL applications where the
connection needs to stay alive across reboots, i.e. when using SoL to access the BIOS
menu and/or related reboots.
However if a user needs to manually change the configuration of x86 management
port, such as using the ‘ethtool –s ethx autoneg off’ command to turn off auto-
negotiation, the NC-SI “Keep PHY Link Up” setting MUST be disabled first to allow
the changes to take effect.
Be sure to re-enable the “Keep PHY Link Up” setting once finishing LAN port
configuration changes on OS level.

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 Request Byte Data Field

1 NetFn: 0x2e

2 Cmd: 0x40

3 IANA Byte 1: 0x39

4 IANA Byte 2: 0x28

5 IANA Byte 3: 0x00

6 Setting
04h: LAN controller

7 Port
Setting: LAN controller
03h: NC-SI “Keep PHY Link Up”

8 Setting value that is written to the selected Setting/Port Bytes

LAN controller: NC-SI “Keep PHY Link Up”:
00h: disable
01h: enable

Response Byte Data Field

1 Completion Code
00h: command completed normally

2 IANA Byte 1: 0x39

3 IANA Byte 2: 0x28

4 IANA Byte 3: 0x00

Command example:
Command Sequence Description

ipmitool raw >ipmitool raw 0x2e 0x40 0x39 0x28 0x00 Enable NC-SI
0x04 0x03 0x01 “Keep PHY Link
Up”
39 28 00

Advantech CGS-6010 Advanced Platform Management Users Guide Page 30

 >ipmitool raw 0x2e 0x40 0x39 0x28 0x00 Disable NC-SI
0x04 0x03 0x00 “Keep PHY Link
Up”
39 28 00

Table 1: ‘Store Configuration Settings’ Command

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2.2.1.2 Advantech OEM Command ‘Read Configuration Settings’
This command is used to read the configuration settings and it is used to check the
current NC-SI “Keep PHY Link Up” setting.

Request Byte Data Field

1 NetFn: 0x2e

2 Cmd: 0x41

3 IANA Byte 1: 0x39

4 IANA Byte 2: 0x28

5 IANA Byte 3: 0x00

6 Setting
04h: LAN controller

7 Port
Setting: LAN controller
03h: NC-SI “Keep PHY Link Up”

Response Byte Data Field

1 Completion Code
00h: command completed normally

2 IANA Byte 1: 0x39

3 IANA Byte 2: 0x28

4 IANA Byte 3: 0x00

5 Setting/Port Bytes
LAN controller: NC-SI “Keep PHY Link Up”:
00h: disabled
01h: enabled

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 Command example:
Command Sequence Description

ipmitool raw >ipmitool raw 0x2e 0x41 0x39 0x28 0x00 Get “Keep PHY
0x04 0x03 Link Up” status
39 28 00 01 Status is enabled

ipmitool raw >ipmitool raw 0x2e 0x41 0x39 0x28 0x00 Get “Keep PHY
0x04 0x03 Link Up” status
39 28 00 00 Status is disabled

Table 2: ‘Read Configuration Settings’ Command

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2.2.1.3 Advantech OEM Command ‘SEL Mode Configuration’
This command is used to change System Event Log (SEL) behaviour when the SEL
runs full. Two options are available: stop logging when the SEL is full, or roll over
(overwrite oldest event in case of new event). This rule is applied to subsequent
entries being written to the SEL.

Request Byte Data Field

1 NetFn: 0x2e

2 Cmd: 0x62

3 IANA Byte 1: 0x39

4 IANA Byte 2: 0x28

5 IANA Byte 3: 0x00

6 SEL Mode
[7:0]:
00h: Stop on full. BMC will not log any new event to SEL.
01h: Wrap around when full. BMC will overwrite the oldest
event with a new incoming event.

Response Byte Data Field

1 Completion Code
00h: command completed normally

2 IANA Byte 1: 0x39

3 IANA Byte 2: 0x28

4 IANA Byte 3: 0x00

5 SEL Mode
[7:0]:
00h: stop on full
01h: wrap around when full

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 Command example:

Command Sequence Description

ipmitool raw >ipmitool raw 0x2e 0x62 0x39 0x28 0x00 Set SEL full action
0x01 as “Stop on full”
39 28 00

Table 3: ‘SEL Mode Configuration’ Command

Please note that the setting of the SEL full action (“Do Nothing” or “Erase
Immediately” options) in the BIOS setup menu (under the following submenu:
[Platform] -> [System Event Log] -> [When SEL is Full]) is a parallel mechanism that
only applies to BIOS writing events to the SEL.
When the BIOS attempts to write a new event log but the SEL is full, the BMC will
behave like this based on the SEL full settings of BMC and BIOS:

BMC Setting BIOS Setting Result

Stop on full Do Nothing Will not log new event to SEL

Stop on full Erase Erase all contents of the SEL then add new event
Immediately to SEL

Wrap around Do Nothing Overwrite the oldest event on SEL

when full

Wrap around Erase Overwrite the oldest event on SEL

when full Immediately

Table 4: The BIOS Attempts to Add a New SEL Entry

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2.2.1.4 Advantech OEM Command ‘Read Port 80 (BIOS POST Code)’
This command is used to retrieve the latest BIOS POST Code.

Request Byte Data Field

1 NetFn: 0x2e

2 Cmd: 0x80

3 IANA Byte 1: 0x39

4 IANA Byte 2: 0x28

5 IANA Byte 3: 0x00

Response Byte Data Field

1 Completion Code
00h: command completed normally

2 IANA Byte 1: 0x39

3 IANA Byte 2: 0x28

4 IANA Byte 3: 0x00

5 latest BIOS POST Code

Command example:

Command Sequence Description

ipmitool raw >ipmitool raw 0x2e 0x80 0x39 0x28 0x00 Read Port 80
(BIOS POST Code)
39 28 00 b2
The latest POST
Code is 0xb2

Table 5: ‘Read Port 80(BIOS POST Code)’ Command

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 2.2.2 AMI OEM IPMI Commands
2.2.2.1 AMI OEM Parameter ‘Restore Default Configuration’
This command will restore all BMC settings to default configuration including PEF
and LAN related settings. The BMC will perform a cold reset after this command is
executed.

Request Byte Data Field

1 NetFn: 0x32

2 Cmd: 0x66

Table 6: ‘Restore Default Configuration’ Command

2.3 BMC Watchdog

The IPMI specification includes support for an IPMI watchdog. This watchdog can be
configured by BIOS, OS, external management software or the user. The watchdog owner
and action can be configured by the IPMI ‘Set Watchdog Timer’ command.
This IPMI watchdog is also used for fail safe BIOS execution, especially after a BIOS firmware
update, on the CGS-6010.
The BIOS POST watchdog is started on platform reset, watchdog owner is set as “BIOS FRB2”
and action is set as “Hard Reset”.
When an IPMI watchdog timeout occurs, the BMC logs the current timestamp, action and
watchdog owner to the System Event Log (SEL) so this information can be used for
debugging purposes.
More sophisticated operation modes such as pre-timeout interrupts are also supported.
Standard utilities such as ipmitool can be used for configuring and strobing this watchdog.
Refer to the IPMIv2.0 specification, Section 27 ‘BMC Watchdog Timer Commands’ for more
details about the BMC watchdog features and operation.

2.4 FRU Information

The IPMI specification includes support for storing and accessing multiple sets of non-
volatile Field Replaceable Unit (FRU) information for different modules in the system. The
FRU data includes information such as serial number, part number, model, and asset tag.
The CGS-6010 stores system FRU information in an EEPROM on the mainboard (FRU Device
0).
FRU information is accessed using IPMI commands (IPMIv2.0 specification, Section 34 ‘FRU
Inventory Device Commands’).

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BMC FRU Information (Device ID: 0)
Common Header
Version = 1
Chassis Info
Version = 1
Type = Main Server Chassis
Part Number = CGS-6010
Serial Number = TPE0000000 (programmed during manufacturing)
Board Info
Version = 1
Language Code = en
Manufacturing Date/Time = Tue Jan 27 19:05:30 2015 (programmed during manufacturing)
Manufacturer = Advantech
Product Name = GSMB-6010LMB
Serial Number = AA00000000 (programmed during manufacturing)
Part Number = 00000000A0A (programmed during manufacturing)
Product Info
Version = 1
Language Code = en
Manufacturer = Advantech
Product Name = CGS-6010
Part/Model Number = 0000000000A (programmed during manufacturing )
Product Version = A1-01 (programmed during manufacturing )
Serial Number = AAA0000000 (programmed during manufacturing )
Table 7: System FRU Information

You can use the ‘ipmitool fru’ command to retrieve system FRU information:
- #ipmitool fru

Figure 19: Retrieve System FRU Information

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2.5 System Event Log
The System event log (SEL) is stored in a flash memory device. Note, that each SEL entry is 18
bytes in length. The SEL consists of 64 kB of memory, resulting in approximately 3640
entries.
OEM SEL events can be used to log events from the host OS and/or application software into
the SEL. This is supported through the IPMI commands ‘Platform Event Message’ and ‘Add
SEL Entry’.
When the SEL is full, the BMC will stop logging by default. However, the OEM command ‘SEL
Mode Configuration’ can be used to change the behavior on full SEL. See Section 2.2.1.3
Advantech OEM Command ‘SEL Mode Configuration’ for more details.

2.6 Sensors
The BMC monitors system health and represents related data through sensors. In case any
sensor thresholds are exceeded, the BMC will send a sensor event to the default event
receiver using IPMI messages, or to a higher level monitoring entity via an SNMP trap.
For details on SNMP traps, please refer to Section 2.9.3 Platform Event Filtering & SNMP
Traps.
All sensors monitored by the BMC are non-latching sensors (automatically clearing its
asserted state when the asserted event condition goes away) except the Platform_Alert and
Case_Intrusion sensors, and those non-latching sensors are auto re-armed.

2.6.1 Sensor Thresholds

Sensor definitions and related properties are stored in Sensor Data Records (SDRs) located in
the BMC’s flash. This data is non-volatile and not supposed to be changed at runtime.
The IPMI specification defines the following thresholds as part of the sensor properties:
 UNC Upper Non-Critical
 UC Upper Critical
 UNR Upper Non-Recoverable
 LNC Lower Non-Critical
 LC Lower Critical
 LNR Lower Non-Recoverable

2.6.2 Negative/Positive Hysteresis

Sensors can support hysteresis, which prevents permanent toggling and event flooding.
While the use of hysteresis is reasonable for standard temperature sensors, it makes even
more sense when these sensors are used for fan speed regulation or other controls.

Advantech CGS-6010 Advanced Platform Management Users Guide Page 39

 Figure 20: Sensor Thresholds and Event Assertion/Deassertion Points

2.6.3 Knowing the Source: Entity IDs

An Entity ID is a standardized numeric code that is used in SDRs to identify the types of
physical entities or FRUs in the system. The codes include values for entities such as
Processor, Power Supply, Fan, etc. The following Entity IDs are applicable for the CGS-6010:
Entity ID Entity Description
0x03 Processor
0x07 System board
0x0a Power supply
0x13 Power unit
0x17 System chassis
0x1d Fan/Cooling device
Table 8: Entity IDs

2.6.4 List of Sensors

The CGS-6010 supports the following sensors (see subsections below), and the SDR data as
well as the readings of sensors can be retrieved with this command:
- #ipmitool sdr

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 Figure 21: Show SDR Status with ‘ipmitool sdr’ Command (1/2)

Advantech CGS-6010 Advanced Platform Management Users Guide Page 41

 Figure 22: Show SDR Status with ‘ipmitool sdr’ Command (2/2)

2.6.4.1 Voltage Sensors

 Payload Power Domain (x86)
o 5V -VOL, 3V3 -VOL, 12V-VOL
General voltage rails
o CPU_1_Core-VOL, CPU_2_Core-VOL
CPU core voltages
o CPU_VCCIO-VOL
CPU miscellaneous IO signal voltage
o VDDQ_AB-VOL, VDDQ_CD -VOL, VDDQ_EF -VOL, VDDQ_GH -VOL
DDR4 memory voltages
o PCH_CORE-VOL
PCH core voltage
o PCH_1P5-VOL
PCH 1.5V voltage
 Standby Power Domain
o VBAT-VOL
Coin battery voltage
o 5VSB -VOL
5V standby voltage
o 3V3SB-VOL
3.3V standby voltage
o PCH_SB-VOL
PCH standby voltage
o BMC1P26-VOL
BMC core voltage
o 3V3_SB-FB-VOL
FAN board 3.3V standby voltage
 Power Supply Internal Monitor
o PSU_12V-VOL
Reading from power unit
o PSU_1_INPUT-VOL, PSU_2_INPUT-VOL
PSU AC or DC input voltages

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 Figure 23: PSU Location

 FAN Board Power Domain

o 12V_P1-FB-VOL, 12V_P2-FB-VOL, 5V-FB-VOL, 3V3-FB-VOL
Readings from fan board power monitor
2.6.4.2 Thermal Sensors
 Ambient Temperature
o INLET_1-TMP, INLET_2-TMP
Sensors are located on the fan board to track the air inlet temperature used
to cool the system elements. Due to the location of the sensors, there is an
offset to the ambient temperature outside the chassis.
o OUTLET-TMP
Sensors are located at the rear side of the mainboard, near to the rear panel
of the system, to track the air temperature exhausted from the CGS-6010

Figure 24: The Locations of FANS, INLET and OUTLET Temperature Sensors

 CPU
o CPU_1-TMP, CPU_2-TMP
Each sensor reflects the CPU temperature of respective CPUs (per socket)

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  DIMM
o CPU_1-DIMMA-TMP, CPU_1-DIMMB-TMP, CPU_1-DIMMC-TMP,
CPU_1-DIMMD-TMP, CPU_2-DIMME-TMP, CPU_2-DIMMF-TMP,
CPU_2-DIMMG-TMP, CPU_2-DIMMH-TMP
Each sensor reflects the highest DIMM temperature of each memory
channel. Each channel has two DIMMs. For instance, CPU_1-DIMMA-TMP
refers to DIMM Channel A which consists of the DIMM1 and DIMM2
modules. For the location of DIMM modules and the definition of DIMM
channels, please refer to the CGS-6010 User Manual.
 PCH
o PCH-TMP
The sensor reflects the PCH silicon temperature
o RISER1_1-TMP, RISER1_2-TMP, RISER2_1-TMP, RISER2_2-TMP
Sensors are located in the center of adjacent PCIe slots on the RISER cards
(two sensors per RISER card). Those additional sensors on the riser cards
help to obtain meaningful temperature information even for PCIe cards that
do not have on board temperature sensors.
2.6.4.3 Fan Sensors
 FAN_x
Those sensors are fan RPM sensors for all 6 system fans
2.6.4.4 Power Current
 Power Supply Internal Monitor
o PSU_12V-CUR
Reflects the electrical current reading directly obtained from the PSU
o PSU-WATT
Reflects the electrical wattage (power) reading directly obtained from the
PSU
2.6.4.5 Discrete Sensors
For all discrete sensors except FW_PROGRESS and SystemEvent sensors, the reading is a
one bit value with the definition:
 1b = Active state (asserted)
 0b = Inactive state (not asserted)
 CPU Related Signals
Those discrete signals are used to track critical and important status signals. For
transient signals that may be asserted and de-asserted faster than the BMC’s polling
interval, the CGS-6010 motherboard implements hardware latches to avoid that
important events could be missed.
o CPU_12_ERR
This sensor holds a bitmask of CPUERR# signals from CPU1 and CPU2. For a
detailed description, please refer to the documentation available from intel.
Bit 0: CPU1_ ERR#0: Hardware correctable error occurred
Bit 1: CPU1_ ERR#1: Non-fatal error occurred
Bit 2: CPU1_ ERR#2: Fatal error occurred
Bit 3: Reserved
Bit 4: CPU2_ ERR#0: Hardware correctable error occurred

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 Bit 5: CPU2_ ERR#1: Non-fatal error occurred
Bit 6: CPU2_ ERR#2: Fatal error occurred
Bit 7: Reserved
o CPU_CATERR
This sensor holds a bitmask of CPU_CATERR# signals from the CPUs.
Bit 0: CPU1_ CATERR#: CPU1 fatal error (legacy MCERR’s) occurred
Bit 1: CPU2_ CATERR#: CPU2 fatal error (legacy MCERR’s) occurred
Bit 2: Reserved
Bit 3: Reserved
Bit 4: CPU1_ CATERR#: CPU1 catastrophic error (legacy IERR’s) occurred
Bit 5: CPU2_ CATERR#: CPU2 catastrophic error (legacy IERR’s) occurred
Bit 6: Reserved
Bit 7: Reserved
o PROC_HOT
This sensor holds a bitmask of PROC_HOT# signals from the CPUs. It
indicates that the processor has reached its maximum safe operating
temperature.
Bit 0: CPU1_ PROC_HOT#: CPU1 PROC_HOT signal is asserted
Bit 1: CPU2_ PROC_HOT#: CPU2 PROC_HOT signal is asserted
o THERM_TRIP
This sensor holds a bitmask of THERMTRIP# signals from the CPUs.
THERMTRIP is activated if the CPU’s temperature has crossed a critical
threshold. The CPU/system will be shut down in response to such critical
event to prevent damage to the CPU silicon.
Bit 0: CPU1_ THERM_TRIP#: CPU1 THERMTRIP signal is asserted
Bit 1: CPU2_ THERM_TRIP#: CPU2 THERMTRIP signal is asserted
o MEM_HOT
This sensor holds a bitmask of MEMHOT# signals from the CPUs.
Bit 0: CPU1_ MEMHOT01#: It indicates over-temperature on DIMM
Channel A and/or DIMM Channel B of CPU1
Bit 1: CPU1_ MEMHOT23#: It indicates over-temperature on DIMM
Channel C and/or DIMM Channel D of CPU1
Bit 2: CPU2_ MEMHOT01#: It indicates over-temperature on DIMM
Channel A and/or DIMM Channel B of CPU2
Bit 3: CPU2_ MEMHOT23#: It indicates over-temperature on DIMM
Channel C and/or DIMM Channel D of CPU2
o VR_HOT
This sensor holds a bitmask of VRHOT# signals from the CPU voltage
regulators.
Bit 0: VCORE0_VR_HOT#: It indicates that over-temperature is observed on
CPU1 voltage regulator
Bit 1: VCORE1_VR_HOT#: It indicates that over-temperature is observed on
CPU2 voltage regulator
 PCH Related Signals
o PCH_HOT
This sensor indicates that PCH over-temperature is observed.
Bit 0: PCH_HOT#: PCH_HOT signal is asserted
 BIOS Related Sensors

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 o FW_PROGRESS
This sensor is used to report BIOS bootup status. See Figure 25 below for the
definition of BIOS boot events.
 BMC-Watchdog
This sensor indicates that the BMC watchdog timed out and the resulting action was
triggered
Bit 0: Timer expired, status only
Bit 1: Hard reset
Bit 2: Power down
Bit 3: Power cycle
 SEL_Full
This sensor is used to indicate the SEL full status
Bit 4: SEL full
Bit 5: SEL almost full - over 75% occupied
 Case_Intrusion
This sensor is used for chassis intrusion detection. It is a latching sensor and the
Asserted event needs to be manually cleared (see Section 2.6.6 Auto Re-Arm and
Manual Re-Arm).
Bit 0: Chassis intrusion has been detected
 Platform_Alert
This sensor is asserted when a platform event trap (as defined through PEF) triggers.
This sensor is latching and the event needs to be manually cleared (see Section
2.6.6).
Bit 2: Platform event trap has been generated
 SystemEvent
This sensor is used for timestamp clock sync. Users can use ‘ipmitool sel time set’
command to initializes the time in the SEL device. See IPMI specification v2.0,
Section 31.11 ‘Set SEL Time Command’ for more details.
 Power Related Sensors
o PU_Status
This sensor is used to monitor main system voltages (12V/5V/3.3V)
Bit 0: The asserted state means system power-off while the deasserted state
indicates system power-on
o PSU_1-Status, PSU_2-Status
The PSU_x-Status sensors report the presence of PSU modules as well as the
health condition of the modules
Bit 0: “Presence Detected” bit. The reading ‘1b’ means that the PSU is not
present.
Bit 1: Power supply failure detected
Bit 2: Reserved
Bit 3: Power supply input lost

Advantech CGS-6010 Advanced Platform Management Users Guide Page 46

 Figure 25: BIOS Bootup Events

2.6.4.6 Summary of Supported Sensors

Advantech CGS-6010 Advanced Platform Management Users Guide Page 47

 Negative-Hysteresis
Positive-Hysteresis
Nominal Reading
Entity instance

Reading Type
Sensor Type

UNR
UNC
LNR

LNC

UC
Unit Type

LC
Entity ID
# Name

Assertion De-Assertion

0b - Timer Expired, status only

1b - Hard Reset
1 BMC-Watchdog 0x2E 0x01 0x23 0x6F 0x00 n/a n/a
2b - Power Down
3b - Power Cycle

4b - SEL full
2 SEL_Full 0x2E 0x02 0x10 0x6F 0x00 n/a n/a
5b - SEL almost full over 75%

3 Case_Intrusion 0x17 0x01 0x05 0x6F 0x00 n/a 0b - General Chassis Intrusion 0b - General Chassis Intrusion
2b - Platform Event Trap
4 Platform_Alert 0x2E 0x03 0x24 0x6F 0x00 n/a n/a
generated
5 FW_PROGRESS 0x22 0x01 0x0F 0x6F 0x00 n/a See Discrete sensors bit mask

6 CPU_12_ERR 0x03 0x01 0xC0 0x7F 0x00 n/a See Discrete sensors bit mask

7 CPU_CATERR 0x03 0x02 0xC0 0x7F 0x00 n/a See Discrete sensors bit mask

8 PROC_HOT 0x03 0x03 0xC0 0x7F 0x00 n/a See Discrete sensors bit mask

9 THERM_TRIP 0x03 0x04 0xC0 0x7F 0x00 n/a See Discrete sensors bit mask

10 MEM_HOT 0x20 0x01 0xC0 0x7F 0x00 n/a See Discrete sensors bit mask

11 VR_HOT 0x07 0x01 0xC0 0x7F 0x00 n/a See Discrete sensors bit mask

12 PCH_HOT 0x07 0x02 0xC0 0x7F 0x00 n/a See Discrete sensors bit mask

13 INLET_1-TMP 0x37 0x01 0x01 0x01 0x01 n/a n/a n/a n/a 55 65 n/a 2 n/a

14 INLET_2-TMP 0x37 0x02 0x01 0x01 0x01 n/a n/a n/a n/a 55 65 n/a 2 n/a

15 OUTLET-TMP 0x37 0x03 0x01 0x01 0x01 n/a n/a n/a n/a 65 75 n/a 2 n/a

16 CPU_1-TMP 0x03 0x05 0x01 0x01 0x01 n/a n/a n/a n/a Tjmax-10 Tjmax-3 n/a 2 n/a

17 CPU_2-TMP 0x03 0x06 0x01 0x01 0x01 n/a n/a n/a n/a Tjmax-10 Tjmax-3 n/a 2 n/a

18 PCH-TMP 0x07 0x03 0x01 0x01 0x01 n/a n/a n/a n/a 88 103 n/a 2 n/a

19 CPU_1-DIMMA-TMP 0x20 0x02 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a

20 CPU_1-DIMMB-TMP 0x20 0x03 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a

21 CPU_1-DIMMC-TMP 0x20 0x04 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a

22 CPU_1-DIMMD-TMP 0x20 0x05 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a

23 CPU_2-DIMME-TMP 0x20 0x06 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a

24 CPU_2-DIMMF-TMP 0x20 0x07 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a
CPU_2-DIMMG-
25 0x20 0x08 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a
TMP
CPU_2-DIMMH-
26 0x20 0x09 0x01 0x01 0x01 n/a n/a n/a n/a 85 95 n/a 2 n/a
TMP
27 CPU_1_CORE-VOL 0x03 0x07 0x02 0x01 0x04 1.8 n/a 1.456 n/a n/a 1.856 n/a 0 0

28 CPU_2_CORE-VOL 0x03 0x08 0x02 0x01 0x04 1.8 n/a 1.456 n/a n/a 1.856 n/a 0 0

1.05 n/a 0.944 n/a n/a 1.152 n/a 0 0

29 CPU_VCCIO-VOL 0x03 0x09 0x02 0x01 0x04
0.95 n/a 0.855 n/a n/a 1.045 n/a 0 0

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30 12V-VOL 0x07 0x04 0x02 0x01 0x04 12 n/a 10.8 n/a n/a 13.2 n/a 0 0

31 5V-VOL 0x07 0x05 0x02 0x01 0x04 5 n/a 4.5 n/a n/a 5.52 n/a 0 0

32 3V3-VOL 0x07 0x06 0x02 0x01 0x04 3.3 n/a 2.976 n/a n/a 3.648 n/a 0 0

33 5VSB-VOL 0x07 0x07 0x02 0x01 0x04 5 n/a 4.5 n/a n/a 5.52 n/a 0 0

34 3V3SB-VOL 0x07 0x08 0x02 0x01 0x04 3.3 n/a 2.976 n/a n/a 3.648 n/a 0 0

35 PCH_CORE-VOL 0x07 0x09 0x02 0x01 0x04 1 n/a 0.944 n/a n/a 1.152 n/a 0 0

36 PCH_1P5-VOL 0x07 0x0A 0x02 0x01 0x04 1.5 n/a 1.344 n/a n/a 1.648 n/a 0 0

37 PCH_SB-VOL 0x07 0x0B 0x02 0x01 0x04 1 n/a 0.944 n/a n/a 1.152 n/a 0 0

38 BMC1P26-VOL 0x07 0x0C 0x02 0x01 0x04 1.26 n/a 1.14 n/a n/a 1.38 n/a 0 0

39 VDDQ_AB-VOL 0x20 0x0A 0x02 0x01 0x04 1.2 n/a 1.088 n/a n/a 1.328 n/a 0 0

40 VDDQ_CD-VOL 0x20 0x0B 0x02 0x01 0x04 1.2 n/a 1.088 n/a n/a 1.328 n/a 0 0

41 VDDQ_EF-VOL 0x20 0x0C 0x02 0x01 0x04 1.2 n/a 1.088 n/a n/a 1.328 n/a 0 0

42 VDDQ_GH-VOL 0x20 0x0D 0x02 0x01 0x04 1.2 n/a 1.088 n/a n/a 1.328 n/a 0 0

43 VBAT-VOL 0x28 0x01 0x02 0x01 0x04 3 n/a 2.688 n/a n/a 3.408 n/a 0 0

44 FAN_1 0x1D 0x01 0x04 0x01 0x12 n/a n/a 1200 n/a n/a n/a n/a n/a 200

45 FAN_2 0x1D 0x02 0x04 0x01 0x12 n/a n/a 1200 n/a n/a n/a n/a n/a 200

46 FAN_3 0x1D 0x03 0x04 0x01 0x12 n/a n/a 1200 n/a n/a n/a n/a n/a 200

47 FAN_4 0x1D 0x04 0x04 0x01 0x12 n/a n/a 1200 n/a n/a n/a n/a n/a 200

48 FAN_5 0x1D 0x05 0x04 0x01 0x12 n/a n/a 1200 n/a n/a n/a n/a n/a 200

49 FAN_6 0x1D 0x06 0x04 0x01 0x12 n/a n/a 1200 n/a n/a n/a n/a n/a 200

240 n/a 90 n/a n/a 264 n/a 0 0

50 PSU_1_INPUT-VOL 0x13 0x01 0x02 0x01 0x04
48 n/a 36 n/a n/a 73 n/a 0 0

240 n/a 90 n/a n/a 264 n/a 0 0

51 PSU_2_INPUT-VOL 0x13 0x02 0x02 0x01 0x04
48 n/a 36 n/a n/a 73 n/a 0 0

52 PSU_12V-VOL 0x13 0x03 0x02 0x01 0x04 12 n/a 11.4 n/a n/a 13.02 13.2 0 0

53 PSU_12V-CUR 0x13 0x04 0x03 0x01 0x05 n/a n/a n/a n/a n/a 116 n/a 0 0

54 PSU-WATT 0x13 0x05 0x08 0x01 0x06 n/a n/a n/a n/a n/a 1400 n/a 0 0

55 PU_Status 0x13 0x06 0x09 0x6F 0x00 n/a 0b - Power off 0b - Power off
0b - Presence Detected
0b - Presence detected
1b - Power supply failure
56 PSU_1-Status 0x0A 0x01 0x08 0x6F 0x00 n/a 1b - Power supply failure detected
detected
3b - Power supply input lost
3b - Power supply input lost
0b - Presence detected
0b - Presence detected
1b - Power supply failure
57 PSU_2-Status 0x0A 0x02 0x08 0x6F 0x00 n/a 1b - Power supply failure detected
detected
3b - Power supply input lost
3b - Power supply input lost
58 SystemEvent 0x2E 0x04 0x12 0x6F 0x00 n/a n/a n/a n/a n/a n/a n/a n/a n/a

59 12V_P1-FB-VOL 0x2A 0x01 0x02 0x01 0x04 12 n/a 10.887 n/a n/a 13.179 n/a 0 0

60 12V_P2-FB-VOL 0x2A 0x02 0x02 0x01 0x04 12 n/a 10.887 n/a n/a 13.179 n/a 0 0

61 5V-FB-VOL 0x2A 0x03 0x02 0x01 0x04 5 n/a 4.48 n/a n/a 5.504 n/a 0 0

62 3V3-FB-VOL 0x2A 0x04 0x02 0x01 0x04 3.3 n/a 3.008 n/a n/a 3.648 n/a 0 0

63 3V3_SB-FB-VOL 0x2A 0x05 0x02 0x01 0x04 3.3 n/a 3.008 n/a n/a 3.648 n/a 0 0

64 RISER1_1-TMP 0x37 0x04 0x01 0x01 0x01 n/a n/a n/a n/a 60 70 n/a 2 n/a

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 65 RISER1_2-TMP 0x37 0x05 0x01 0x01 0x01 n/a n/a n/a n/a 60 70 n/a 2 n/a

66 RISER2_1-TMP 0x37 0x06 0x01 0x01 0x01 n/a n/a n/a n/a 60 70 n/a 2 n/a

67 RISER2_2-TMP 0x37 0x07 0x01 0x01 0x01 n/a n/a n/a n/a 60 70 n/a 2 n/a

Table 9: BMC Sensor List

2.6.5 Dynamic Thresholds

To properly support different CPU SKUs, the UC (upper critical) threshold for CPU
temperature sensors ( CPU_x-TMP) must be adjusted for each SKU based on a parameter
“Tbase” which represents the maximum junction temperature.
The BMC firmware can automatically retrieve Tbase from each CPU and properly configures
the UC thresholds for CPU_x-TMP sensors.
The upper critical threshold is set as (Tbase – 3°C) to leave some headroom before
protection circuits in the CPU are triggered.
Tbase readings are not available as long as the payload has not been powered. In this short
intermediate time, the BMC uses a default setting of 90° C. As soon as Tbase readings are
available the threshold will be set as described above.

2.6.6 Auto Re-Arm and Manual Re-Arm

All sensors provided by the BMC are auto re-arm sensors except the Platform_Alert and
Case_Intrusion sensors.
Sensors with auto re-arm capability will automatically de-assert the event when the sensor is
no longer in a condition that would generate the alarm, and re-generate an assertion event
at the next time the sensor reaches the assertion criteria.
For manual re-arm sensors, the assertion state will be kept as asserted no matter if the
sensor status changes afterwards, in other words they can be considered as “latched”
events. The IPMI command ‘Re-arm Sensor Events’ needs to be issued to reset the sensor
state and re-enables event generation after the sensor has been asserted.
If the sensor is still in a state where the event would be asserted, the command
‘Re-arm Sensor Events’ will trigger another assertion event generation. Only if the sensor is
in a state where no event would be asserted, the ‘Re-arm Sensor Events’ command will
trigger the deassertion.

2.7 Thermal Management

CGS-6010 uses digital sensors to monitor system level temperatures.
The system thermals are managed by the BMC using a Smart Fan algorithm. The Smart Fan
algorithm uses the CPU temperatures as basis, as the CPUs are the hottest elements in the
system under normal circumstances. The system fan speed is adjusted based on the
temperature of the two CPU temperature sensors CPU_1-TMP and CPU_2-TMP.
The Smart Fan parameters have been optimized for the CGS-6010 and are automatically
loaded at system start time. See the table below for the mapping between measured
temperature and the fan’s duty cycle. The default fan table ensures proper fan speed in
normal operating conditions.

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In addition, Advanced Platform Management introduces a special safe guard mechanism to
ensure proper cooling under special conditions. Refer to Section 2.7.3 BMC Controlled Fan
Algorithm Exception Handling for details.
Temperature (°C) Fan Duty Cycle (%) Level
T < 42 55 1
42 <= T < 47 70 2
47 <= T < 52 85 3
>= 52 100 4
Table 10: Fan Speed and Temperature Mapping

2.7.1 Fan Initial State on System Start Up

Upon system start-up, the BMC sets the fan speed to level 4 (maximum speed) for the
duration of “Initial Time” (10 seconds); after that, the Smart Fan algorithm is used for
dynamic fan speed adjustment.

2.7.2 BMC Controlled Fan Algorithm

The BMC automatically steps through the defined fan levels, based on temperature readings.
A time-constant and hysteresis are used to avoid frequent fan changes and resulting
oscillation.
Under normal operating conditions (see Section 2.7.3 for exceptions), the BMC stays in the
respective fan level for a minimum time of 3 seconds, both for increasing and decreasing fan
levels.
A 2°C hysteresis is applied for decreasing fan levels.
 For instance, if the current reading from the thermal sensor is 45°C, and the current fan
level is still 1; the BMC will increase the fan speed to 2 and remain at that level for at
least 3 seconds.
After 3 seconds, if the temperature keeps rising and the reading of thermal sensor is
over the upper range of level 2, the BMC will increase the fan level to the next one (level
3), remain there for at least three seconds and then take the next decision whether to
increase, decrease or remain on this level.
For decreasing fan levels, the BMC will only select the next lower level if the
temperature is 2°C less than the lower limit of the temperature range for the current fan
level.
For instance, the fan level will increase from 1 to 2 once the temperature exceeds 42°C,
but it will only decrease back to level 1 once the temperature falls below 40°C.

2.7.3 BMC Controlled Fan Algorithm Exception Handling

In order to deal with exceptional situations, the fan control implements an override
mechanism where the BMC will set all fans to full speed (level 4, duty cycle 100%).
The conditions for this exception are:
 Any temperature sensor crosses its upper critical threshold.
 Any one of the fans fails. Fan failure means any fan’s RPM drops below the lower
critical threshold (see Table 10 for thresholds)
 Temporary or potential non-availability of sensor readings because of

Advantech CGS-6010 Advanced Platform Management Users Guide Page 51

 o BMC/BIOS upgrade
o x86 reboot or power cycle.

2.8 BIOS Synchronization

The CGS-6010’s Advanced Platform Management synchronizes important information
between the BMC and the system BIOS for platform wide consistency.

2.8.1 System Time

The BMC contains a real-time-clock to create time stamps for system events. However, the
BMC’s RTC does not implement a backup battery.
To make sure that the BMC timestamps are valid and are in sync with the x86 host’s system
time, the BIOS sets the BMC’s time every time the system starts up. That yields consistent
BMC and host OS log time stamps which helps to correlate events for troubleshooting
purposes.
Events logged by the BMC before the time sync with BIOS will be flagged with “Pre-Init” as a
timestamp.

2.8.2 FRU Info

The BMC sends the System GUID and other FRU information (such as Serial Number, etc.)
stored in the FRU EEPROM to the BIOS. The BIOS uses this information to dynamically
populate the related DMI Info tables that can be queried by the host OS using DMI parsing
tools like dmidecode.

2.9 Advanced Platform Management Features

2.9.1 Intrusion Detection
The CGS-6010 supports chassis intrusion detection by default. If the top cover of the chassis
is removed, this gets detected even when the box is unpowered or unplugged, and the
corresponding sensor (see Section 2.6.4.5) will report the event.

2.9.2 BIOS POST Watchdog

The IPMI compliant BMC watchdog is used to monitor BIOS boot progress and initiate a
rollback when the BIOS is found to be corrupted.
The BIOS watchdog timeout is set to a predefined value of 300 seconds and automatically
starts when the payload power for the x86 subsystem is being turned on or when a x86 reset
is detected. The time out action is set to “Hard Reset”, with the timer use indicating “BIOS
FRB2” use.
If the watchdog timer times out with this configuration, it triggers a BIOS chip failover
followed by a system reset and a restart of the watchdog timer.
The BIOS does not touch the watchdog timer except for the following situations:
1. It disables the watchdog right before jumping into the x86 OS boot loader so it doesn’t
trigger after BIOS execution. It could alternatively reconfigure the watchdog to act as
boot watchdog (i.e. change timeout action), based on BIOS configuration.
2. It temporarily disables the watchdog once the BIOS setup menu is entered, so the
watchdog does not trigger while the user is in the BIOS menu.

Advantech CGS-6010 Advanced Platform Management Users Guide Page 52

 2.9.3 Platform Event Filtering & SNMP Traps
Advanced Platform Management supports asynchronous alert notifications using SNMP
traps. These event messages are created based on Platform Event Filtering (PEF) rules.
2.9.3.1 An Introduction to PEF
Platform Event Filtering (PEF) provides a regular mechanism for configuring the BMC to take
selected actions on events that it receives or has internally generated. These actions include
operations such as system power-off, system reset, as well as triggering the generation of an
Alert.
The BMC maintains an event filter table that is used to select which events trigger an action
and which action(s) to perform. Each time the BMC receives an event it compares the event
data against the entries in the event filter table. The BMC scans all entries in the table and
collects a set of actions to be performed as determined by the entries that were matched.
Event Filtering is independent of Event Logging. It means that Event Logging and Event
Filtering (and associated actions) are enabled/disabled independently of each other.

2.9.3.1.1 Alert Policies

When an Alert is triggered via PEF, the alerting process is directed by an Alert Policy. An alert
policy is a collection of one or more alert destinations. An alert policy can support a mix of
different alert destinations over different interfaces such as the system interface or the LAN
interface. The destinations in a policy are processed in sequence. However, whether a given
destination will be used or not can be configured to be dependent on whether the alert
sending to the previous destination was successful or not.
Multiple policies can be supported. A policy number identifies different policies in the table.
The alert policy number is used in the Event Filter Entry to select what alert policy is used
when a match occurs. This mechanism allows different alert policies to be associated with
different classes of events. For example, one policy to be used for ‘high priority’ events and a
different policy for ‘low priority’ events.
Alert Policy data is stored in an Alert Policy Table that is part of the PEF configuration
parameters. By default, Advanced Platform Management supports one Alert Policy for
alerting over LAN as shown below:

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 Alert policy table entry 1
Policy set 1
Policy entry rule Match-always
Channel number 1
Channel medium 802.3 LAN
Alert destination type PET
PET Community Public
ACK timeout/retry (secs) 3
Retries 3
IP address 0.0.0.0
MAC address 00:00:00:00:00:00
Table 11: Alert Policy

Please note that the destination MAC and IP address need to be populated properly with the
IPMI ‘Set PEF Configuration Parameters’ command before using PEF.
Some alerts, such as alphanumeric pages, can be associated with Alert Strings. The
combination of Event Filter Entry and alert destination are used to select a given Alert String
from a set of strings kept in the PEF configuration parameters. This enables different strings
to be sent based on what event filter was matched and where the alert is being sent.

2.9.3.1.2 PEF Actions

The BMC will scan the entire PET table list, collecting a set of actions for a specific event.
Actions will then be executed in priority order. An alert action can occur in combination with
any other action (in priority order). The power down, power cycle, and reset actions are
mutually exclusive. If a combination of power down, power cycle, and/or reset actions
results, only the highest priority action will be taken.
The following PEF actions are supported:
Action Priority
Power down 1
Power cycle 2
Reset 3
Diagnostic interrupt 4
Send Alert 5
OEM (System Status LED) OEM
Table 12: PEF Actions

2.9.3.1.3 Default OEM PEF Action for the CGS-6010.

The default OEM PEF action for the CGS-6010 is set as:
 Turn on System Status LED when an assertion event of the PEF entry (with OEM
Action specified) occurs.
 Turn off System Status LED when previous asserted state is deasserted. Please note
that the CGS-6010 only has one System Status LED on the front panel, the alerting
stage (LED is on) will stay on until all previous alerts are deasserted.

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 Refer to Section 5.6.6 System Status LED (Status) for more details about the System Status
LED.

2.9.3.1.4 PEF Event Filter Table

The Event Filter table consists of a set of rows or ‘entries’ that define each filter. The fields in
the Event Filter table include a series of masks that the BMC applies to the event data. The
fields are designed in such way that a combination of absolute or “wildcarded” comparisons
can be used for matching fields in the event record. Thus, either a single event or multiple
events can match up with a single Event Filter table entry.
A match occurs when there are event filter table matches (exact or wild-carded) for all
compared fields in the event message.

2.9.3.1.5 PET SNMP Trap Format

PET SNMP traps follow the format defined in IPMI Platform Event Trap Format Specification
v1.0 document.
A standard MIB file for PET is available via the Internet.
Enterprise OID =
iso(1).org(3).dod(6).internet(1).private(4).enterprises(1).wired_
for_management(3183).PET(1).version(1)
Agent-addr Network Address
Generic-trap EnterpriseSpecific(6)
Specific-trap refer to IPMI Platform Management Event Trap Format
Specification v1.0
Time-stamp Time elapsed between last (re) initialization of the network
entity and the generation of the trap
Variable-bindings Other information, refer to IPMI Platform Management Event
Trap Format Specification v1.0
Table 13: Trap PDU Format per RFC 1157

2.9.3.2 Preconfigured Platform Alerts

2.9.3.2.1 Fan Failure Alert Notification

The BMC will generate a platform alert when any of the fan speeds decreases below the
lower critical threshold defined in the BMC sensor table/SDR (see Section 2.6.4.6).

2.9.3.2.2 Temperature Alert Notification

For any temperature sensor, in case the temperature either exceeds the upper non-critical
or upper critical threshold defined in the BMC sensor table/SDR, the BMC will generate a
platform alert.

2.9.3.2.3 Chassis Intrusion Alert Notification

Removing or lifting the top cover will activate an intrusion detection switch. The
Case_Intrusion sensor will be triggered and the BMC will generate a platform alert.

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 The sensor will latch the event and needs to be cleared and manually rearmed, see Section
2.6.6 Auto Re-Arm and Manual Re-Arm.

2.9.3.2.4 Power Status Alert Notification

The BMC will generate a platform alert if the system voltages (12V/5V/3.3V) are not
available (e.g. critical PSU failure, loss of power).

2.9.3.2.5 PSU Status Alert Notification

The BMC will monitor PSU_1-Status or PSU_2-Status sensors and generate a platform alert if
any of the following assertion events occurs:
 Either PSU1 module or PSU2 module is not present
 Power supply failure detected (reading from the PSU module through PMBus)
 AC or DC input of PSU module is lost

2.9.3.2.6 PET Table

The table below shows the default settings in PET table:

Entry ID 1 2 3 4 5
active, active, active, active, active,
Status pre-configured pre-configured pre-configured pre-configured pre-configured

Version 0x11 0x11 0x11 0x11 0x11

Fan (0x04) Temperature Chassis Power Unit Power Supply

Sensor Type (0x01) Intrusion
Sensor Any(0xFF) Any(0xFF) 3 55 Any
Number
Event Critical Critical Critical Critical Critical
Severity
Event Class Threshold Threshold Discrete Discrete Discrete

(0x01/0x0004), (0x01/0x0280), Sensor-specific Sensor-specific Sensor-specific

< LC >UNC, >UC (0x6F/0x01) (0x6F/0x01) (0x6F/0x0b)
Event
Trigger(s)

Action Alert, OEM Alert, OEM Alert Alert, OEM Alert, OEM

Policy set 1 1 1 1 1

Table 14: PET Table Entry List

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 2.9.4 SNMP Support
The CGS-6010 BMC supports SNMP v2
It allows access to information such as MIB version, Sensors, Board information, Chassis
information, FRU, SEL Logs, etc. See below for more details.
2.9.4.1 MIB version
It represents the MIB version supported by the current BMC firmware.

Figure 26: MIB Version in BMC

2.9.4.2 SensorTable
This table contains sensor related information.
 sensorIndex: Sensor ID number
 sensorLogicSlotID: Logic slot ID for this sensor. This value is always 1 in the
CGS-6010.
 sensorFRUID: FRU ID for this sensor
 stringID: Sensor name
 convertSensorData: Human readable sensor reading
 rawSensorData: IPMI raw sensor reading
 type: Sensor type
 sensorUnit: Three bytes of sensor units (temperature, voltage, etc.).
Refer to See IPMI specification v2.0, Section 43.1 for the
descriptions about sensor units.

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 Figure 27: Sensor Table

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2.9.4.3 BoardInfoTable
This table contains firmware version of each component and FRU State (as defined in PICMG
3.0 specification) of the mainboard.
For CGS-6010, only the FRU States M1 (equals ACPI state S5, power off) and M4 (equals ACPI
state S0, power on) are used/supported.
The hex string reading 0xFFFF means this component is not existed.
 boardInfoIndex: Index for each board
 boardInfoLogicSlotID: Logic slot ID for this board. This value is always 1 in the
CGS-6010.
 boardInfoFRUID: FRU ID for this board
 bmcBootloaderVersion: BMC bootloader version
 bmcAppVersionActive: Active BMC FW version
 bmcAppVersionBackup: Backup BMC FW version
 fpgaVersionActive: Active FPGA version
 fpgaVersionBackup: Backup FPGA version
 biosVersionActive: Active BIOS version
 biosVersionBackup: Backup BIOS version
 nvramVersionActive: Active NVRAM version
 nvramVersionBackup: Backup NVRAM version
 mState: FRU state

Figure 28: BoardInfo Table

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2.9.4.4 ChassisInfo
This OID contains chassis information.
 ChassisType: Type of Chassis
 ChassisSerial: Chassis Serial Number
 BoardMfgDate: Board Manufacturing Date
 BoardMfg: Board Manufacturer Name
 BoardProduct: Board Product Name
 ProductManufacturer: Product Manufacturer Name
 ProductName: Product Name
 ProductPartNumber: Product Part Number
 ProductVersion: Product Version
 ProductSerial: Product Serial Number

Figure 29: Chassis Info

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2.9.4.5 FRUTable
This table contains the FRU information of each FRU.
 fruIndex: FRU Index. It is always 1 in the CGS-6010.
 fruLogicSlotID: Logic slot ID for this FRU. This value is always 1.
 fruFRUID: FRU ID
 chassisType: Chassis Type. The reading ‘11h’ means “Main Server
Chassis”. Refers to IPMI - Platform Management FRU
Information Storage Definition, V1.0, Section 14 ‘System
Enclosure and Chassis Types’.
 chassisPartNumber: Chassis Part Number
 chassisSerial: Chassis Serial Number
 boardMfgDate: Board Manufacturing Date
 boardMfg: Board Manufacturer Name
 boardProduct: Board Product Name
 boardSerial: Board Serial Number
 boardPartNumber: Board Part Number
 productManufacturer: Product Manufacturer Name
 productName: Product Name
 productPartNumber: Product Part Number
 productVersion: Product Version
 productSerial: Product Serial Number

Figure 30: FRU Table

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2.9.4.6 SELTable
This table contains the BMC’s SEL log
 selIndex: SEL index
 selLogicSlotID: Logic slot ID of this SEL. It is always 1 in the CGS-6010.
 selFRUID: FRU ID of this SEL
 selRecord: IPMI SEL Record, 16 bytes

Figure 31: SEL Table

2.9.4.7 AbstractionLayer
The abstraction layer shows the overall status of the chassis and the mainboard.
 Status: General status of the chassis. The decimal reading shall be
interpreted as:
0 = OK
1 = Warning
2 = Error
 FanSpeed: Fan PWM level (Percentage)
 Power: Power status of this chassis (Watt). The reading here is 196W.
 Temperature: In degrees Celsius. The higher CPU temperature out of both sockets
is used for this reading.

Figure 32: Abstraction Layer

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2.9.4.7.1 BoardTable
This table contains the status of the mainboard.
 BoardIndex: Board index. It is always 1 in the CGS-6010.
 SlotNumber: Slot number of this board. This value is always 1.
 ModuleNumber: Module number of the mainboard
 BoardStatus: Board status. The definition of decimal reading is:
0 = OK
1 = Warning
2 = Error
3 = Deactived
4 = Not Present

Figure 33: Board Table

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2.10 BMC Default Settings
2.10.1 User Account
Parameter Name Default Value
User 1
User ID (16 bytes) NULL
User password (16 bytes) NULL
User Privilege Limit 2h – User
Link Authentication 0h – Disable
IPMI Messaging 1h – Enable

User 2
User ID (16 bytes) admin
User password (16 bytes) admin
User Privilege Limit 4h – Administrator
Link Authentication 0h – Disable
IPMI Messaging 1h – Enable
User Payload Access Byte 1 - Standard Payload enables 1:
2h – enable standard payload 1 (SOL)
Byte 2 - OEM Payload enables 1:
0h – disable OEM Payload 0-7
Table 15: User Account Default Setting

2.10.2 PEF
Parameter Name Default Value
PEF Control 9h - enable PEF and PEF Alert Startup Delay
PEF Action global control 3fh - enable all actions
PEF Entry (Filter data:
Settings
20 bytes)
PEF Filter 0 Reserved
PEF Filter 1 Check Table 14: PET Table Entry List
PEF Filter 2 Check Table 14: PET Table Entry List
PEF Filter 3 Check Table 14: PET Table Entry List
PEF Filter 4 Check Table 14: PET Table Entry List
PEF Filter 5 Check Table 14: PET Table Entry List
PEF Filter 6
PEF Filter 7
PEF Filter 8
PEF Filter 9
PEF Filter 10
PEF Filter 11
PEF Filter 12
PEF Filter 13
PEF Filter 14
PEF Filter 15
Alert Policy Entry Settings

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 (3 bytes)
Alert Policy 0 Reserved
Alert Policy 1 0x18 0x11 0x00 – Interpret as below and please check
IPMIv2.0 specification, Section 17.11 ‘Alert
Policy Table’ for more details:
 This policy entry 1 is enabled
 Alert policy is : always send alert to this
destination
 Channel number is 1 and destination
selector is 1
 No alert string to send
Alert Policy 2 0x00 0x00 0x00
Alert Policy 3 0x00 0x00 0x00
Alert Policy 4 0x00 0x00 0x00
Alert Policy 5 0x00 0x00 0x00
Alert Policy 6 0x00 0x00 0x00
Alert Policy 7 0x00 0x00 0x00
Alert String Key (2 bytes) Settings
Alert String Key 0 00
Alert String Key 1 00
Alert String Key 2 00
Alert String Key 3 00
Alert String Key 4 00
Alert String Key 5 00
Alert String Key 6 00
Alert String Key 7 00
Table 16: Default PEF Setting

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2.10.3 LAN
Parameter Name Default Value
Channel Access
PEF Alerting Enabled
Per-message Authentication Disabled
User level Authentication Disabled
Authentication Type Supported None/MD2/MD5/straight password
(Note: type “None” is disabled for security
reasons)
Access Mode Always available
Privilege Level Limit ADMINISTRATOR
Authentication type enables
Callback level 16h – MD2 + MD5 + straight password
User level 16h – MD2 + MD5 + straight password
Operator level 16h – MD2 + MD5 + straight password
Administrator level 16h – MD2 + MD5 + straight password
OEM level 00h
IP Address
IP address 0.0.0.0
IP address source 1h – static address (manually configured)
MAC address Programmed during manufacturing
Subnet mask 0.0.0.0
Default gateway 0.0.0.0
Default gateway MAC 0:0:0:0:0:0
Backup gateway 0.0.0.0
Backup gateway MAC 0:0:0:0:0:0
Community string Public
Destination 1
Alert acknowledge 0h – unacknowledged
Destination type 0h – PET Trap destination
Alert acknowledge timeout/retry interval (s) 0
Number of retries 0h – none
Address format IPv4 IP followed by 802.3 MAC
Gateway selector 0h – use default gateway
Alerting IP address 0.0.0.0
Alerting MAC address 0:0:0:0:0:0
Destination 2
Alert acknowledge 0h – unacknowledged
Destination type 0h – PET Trap destination
Alert acknowledge timeout/retry interval (s) 0
Number of retries 0h – none
Address format IPv4 IP followed by 802.3 MAC
Gateway selector 0h – use default gateway
Alerting IP address 0.0.0.0
Alerting MAC address 0:0:0:0:0:0
Destination 3

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 Alert acknowledge 0h – unacknowledged
Destination type 0h – PET Trap destination
Alert acknowledge timeout/retry interval (s) 0
Number of retries 0h – none
Address format IPv4 IP followed by 802.3 MAC
Gateway selector 0h – use default gateway
Alerting IP address 0.0.0.0
Alerting MAC address 0:0:0:0:0:0
Destination 4
Alert acknowledge 0h – unacknowledged
Destination type 0h – PET Trap destination
Alert acknowledge timeout/retry interval (s) 0
Number of retries 0h – none
Address format IPv4 IP followed by 802.3 MAC
Gateway selector 0h – use default gateway
Alerting IP address 0.0.0.0
Alerting MAC address 0:0:0:0:0:0
Table 17: LAN Default Setting

2.10.4 SOL
Parameter Name Default Value
SOL Enable 1h – Enable
SOL Authentication 82h – Force encryption + USER level
Character Accumulate Interval & Character Byte 1 - Character Accumulate Interval in 5
Send Threshold ms increments:
1Eh – 150 ms
Byte 2 – Character Send Threshold:
DCh – 220 characters
SOL Retry Byte 1 – Retry Count:
7h – 7 times
Byte 2 – Retry Interval in 10 ms increments:
30h – 480 ms
SOL non-volatile bit rate Ah – 115200 bps
SOL volatile bit rate Ah – 115200 bps
Table 18: SOL Default Setting

2.10.5 Power Restore Policy

The Power Restore Policy determines how the system behaves when system power returns
after a power loss.
The policy can be set as one of those options:
 Always power on
 Restore to state that was in effect before power loss
 Always stay off

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See Section 28.8 ‘Set Power Restore Policy command’ in the IPMIv2.0 specification for more
details in usage.
Parameter Name Default Value
Power Restore Policy 10b = chassis always powers up after
AC/mains returns
Table 19: Power Restore Policy

Please note that the power restore policy setting in the BIOS setup menu (under
[Hardware] -> [Southbridge] -> [Restore AC Power Loss] submenu) is in sync with the policy
setting in the BMC. On each x86 system start up, the BIOS will update its setting by inquiring
the BMC for current policy setting in the BMC. On the other hand, if the policy setting had
been altered in the BIOS setup menu, BIOS will also notify BMC to update its policy setting in
the BMC.

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3. WEB INTERFACE
The BMC’s web server is enabled on Advanced Platform Management. The web interface
provides an alternate approach for accessing the BMC.
To get connected to the BMC’s web interface, perform the following steps:
 Make sure that BMC’s IP is properly set. Please check Section 1.2.2.2.
 Make sure the IP of the user platform and BMC’s IP are located in the same subnet.
On the user platform, open a web browser and type ‘https://<BMC IP>’ in the URL
field of the browser, then click Enter.
 Use the default BMC LAN channel credentials for login (see Section 2.10.1 User
Account)
User name: admin
Password: admin

Figure 34: Web Interface Login

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 The menu structure of web interface is as the following:
 Dashboard
 Field Replaceable Unit (FRU)
 Server Health
o Sensor Readings
o Event Log
 Configuration
o Network Settings
o PEF Management
o User Management
 Remote Control
o Console Redirection
o Power Control and Status
o Java SOL
 Maintenance
o Restore Configuration

3.1 Dashboard
This page presents:
 Device Information
 Network Information
 Sensor Monitoring
 Event Log Status

Figure 35: Dashboard Page in Web Interface

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3.2 Field Replaceable Unit (FRU)
This page shows FRU information.

Figure 36: Field Replaceable Unit Page in Web Interface

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3.3 Server Health
3.3.1 Sensor Readings
This page shows sensor readings, settings and events.

Figure 37: Sensor Readings Page in Web Interface

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3.3.2 Event Log
This page shows all event logs in the CGS-6010.

Figure 38: Event Log Page in Web Interface

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3.4 Configuration
3.4.1 Network Settings
This page shows the BMC’s network connection status. This page can also be used to change
the BMC network settings.

Figure 39: Network Settings Page in Web Interface

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3.4.2 PEF Management
This page shows platform event trap related settings.

Figure 40: PEF Management Page in Web Interface

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3.4.3 User Management
This page shows the current list of available users.

Figure 41: User Management Page in Web Interface

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3.5 Remote Control
3.5.1 Console Redirection
This page is used to launch the Java Console for remote KVM access (full
Keyboard/Video/Mouse redirection, based on VGA adapter).

Figure 42: Console Redirection Page in Web Interface

3.5.2 Power Control and Status

This page is used to issue power or reset control commands. Options include:
 Reset Server
 Power Off Server – Immediate: It will perform the same action as Power Off
described in Section 5.2 Lights Out Control.
 Power Off Server – Orderly Shutdown: The BMC will perform the same action as
Soft power off/Graceful shutdown described in Section 5.2. The BMC will initiate
graceful shutdown if an ACPI-compliant OS is used. In case the system does not
shut down within 300 seconds, the BMC will perform a hard power off.
 Power On Server
 Power Cycle Server

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 Figure 43: Power Control and Status Page in Web Interface

3.5.3 Java SOL

This page is used to launch the Java SOL client, which only provides serial console access but
no full-featured VGA, keyboard, mouse support as the console redirection in Section 3.5.1.

Figure 44: Java SOL Page in Web Interface

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3.6 Maintenance
3.6.1 Restore Configuration
This page allows a user to restore the BMC’s default configuration. Specific configuration
items can be preserved by clicking the Enter Preserve Configuration button. Upon Restore
Configuration option, the selected configuration items will be preserved while all the other
configuration items will be restored to their default values. If none are selected, all the
configuration items will be restored to their default values, essentially restoring the device
configuration to its factory defaults.

Figure 45: Restore BMC Default Configuration Page in Web Interface

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 4. BMC FIRMWARE AND BIOS UPGRADE
4.1 Upgrade Platform Firmware
Advanced platform Management allows users to update the CGS-6010’s firmware via the
KCS or LAN interfaces using the HPM.1 protocol and related definitions.
Firmware components supported include the BMC firmware itself as well as the system
BIOS. For improved reliability most updateable components support a backup image stored
in a dedicated, redundant flash chip. The BMC will perform an automatic rollback in case of
an upgrade failure to recover the unit to its previous known good state.
Please note that the functionality of the BMC will be degraded while upgrading the BMC
firmware or BIOS. Some functions including sensor listing, BMC information, etc., will not be
available during that timeframe.

The CGS-6010’s BMC firmware uses physically redundant images. In case of a firmware
malfunction or a corrupted update, the BMC bootloader will switch over to a backup image.
The same rule applies to BIOS image as well.

4.1.1 Upgradeable Components

There are three components subject to firmware upgrades in the CGS-6010:
 Component 0: BMC boot loader
 Component 1: BMC firmware
 Component 2: System BIOS
Please note that the BMC boot loader is a hardened and minimized firmware component
which is not subject to field updates as it does not support fail safe updates via rollback
capabilities. The upgrade capability of the boot loader is only intended for factory use. A
failing update in the field may leave the unit non-functional and may result in the
requirement for on-premises service access and/or RMA.
HPM.1 defines a mechanism and data structure that allow an update tool (“upgrade agent”)
to identify the upgradeable components and related properties:
Property Value Description
Component 0 presence Y Component 0 is present
Component 1 presence Y Component 1 is present
Component 2 presence Y Component 2 is present
Upgrade undesirable N Upgrades are supported
Auto rollback override N No manual override of rollback performed by
BMC
IPMC degraded Y BMC functionality will be degraded while
performing an update
Deferred activation Y Upgraded image can be activated later
Services affected Y Service is affected during an upgrade
Note: This only applies to BIOS update. BMC
updates should not affect any services.

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 Manual rollback Y BMC supports a manual rollback via HPM.1
command.
Automatic rollback Y BMC supports automatic rollback in case an
upgrade fails.
Self test Y BMC supports a built in self-test.
Upgrade timeout 1275 sec Timeout for performing an upgrade action.
After timeout expires the upgrade agent will
report an upgrade failure.
Self test timeout 5 sec Timeout for a built in self-test after an update,
After timeout expires the upgrade agent will
report an upgrade failure.
Rollback timeout 1275 sec Timeout when BMC performs a rollback. After
timeout expires the upgrade agent will report
an upgrade failure.
Inaccessibility timeout 1275 sec Timeout for BMC not accessible. After timeout
expires the upgrade agent will report an
upgrade failure.
Table 20: HPM.1 Capability

4.1.1.1 Component 0: BMC Boot loader

This component represents the BMC bootloader. It does not support rollback and shall only
be updated in factory or during system integration. Field upgrade is strongly discouraged.
Property Value Description
Payload cold reset req. N Upgrading this component does not require a
reset of the x86 host
Def. activation supported N
Upgrade will be activated automatically when
image has been transferred
Comparison supported N
Comparing the actual component versus the
new one is not supported
Preparation supported Y Prepare Upgrade Command is supported
Rollback supported N No rollback is supported
Table 21: HPM.1 Component 0 Property

4.1.1.2 Component 1: BMC application firmware

This component represents the BMC application. Two redundant images are stored in
physically distinct flash chips for a maximum of reliability and availability. Which image is the
active image depends on the previous upgrade. For instance, if the current active image is
the first SPI flash, then backup image is the second one. After upgrading and activating new
BMC firmware, the active image will change to the second SPI flash.

Property Value Description

Payload cold reset req. N Upgrading this component does not require a
reset of the x86 host

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 Def. activation supported Y
Upgrade can be activated later using a
deferred activation command
Comparison supported N
Comparing the actual component versus the
new one is not supported
Preparation supported Y Prepare Upgrade Command is supported
Rollback supported Y Rollback is supported
Table 22: HPM.1 Component 1 Property

4.1.1.3 Component 2: BIOS

This component represents the system BIOS. The active BIOS SPI flash is connected to PCH
and backup BIOS SPI flash is connected to the BMC.
Property Value Description
Payload cold reset req. Y Upgrading this component requires a reset of
the x86 host to take effect
Def. activation supported Y
Upgrade can be activated later using a
deferred activation command
Comparison supported N
Comparing the actual component versus the
new one is not supported
Preparation supported Y Prepare Upgrade Command is supported
Rollback supported Y Rollback is supported
Table 23: HPM.1 Component 2 Property

4.1.2 Check Active BMC Firmware Version

Either the ‘ipmitool mc info’ command or ‘ipmitool hpm check’ command can be used to
retrieve the active BMC firmware version:
- #ipmitool mc info

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 Figure 46: Check BMC Firmware Version

- #ipmitool hpm check

Figure 47: Command ‘ipmitool hpm check’

4.1.3 Upgrading BMC Firmware through the KCS Interface

Please make sure that the ipmitool utility works normally (refer to Section 1.2.1) and the
version of ipmitool is 1.8.14 or higher. Use the following command to perform a BMC
firmware upgrade:
- #ipmitool hpm upgrade <BMC image file> -z 255 activate

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 Figure 48: BMC Firmware Upgrade

When the message ‘Firmware upgrade procedure successful’ shows (see the figure above), it
will take about 40 to 60 seconds to activate the new BMC firmware. After the activation is
done, you may check the active firmware version to make sure it is consistent with the
upgraded BMC version.
- #ipmitool hpm check

Figure 49: Check Active BMC Firmware Version

Please note that the functionality of the BMC will be degraded while upgrading the BMC
firmware. Some functionality including sensor listing, BMC information, etc., will not be
available at that time.

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4.1.4 Upgrading BIOS through KCS Interface
Please make sure that the ipmitool utility works normally (refer to Section 1.2.1) and the
version of ipmitool is 1.8.14 or higher. Use the following command to perform a BIOS
firmware upgrade:
- #ipmitool hpm upgrade <BIOS image file> -z 255 activate

Figure 50: Upgrade BIOS with Ipmitool

BIOS upgrade requires a reset of the x86 host to take effect. Use the ‘ipmitool chassis power
cycle’ command to reboot the system:
- #ipmitool chassis power cycle
After the system reboot is completed, you may check if the active BIOS version is consistent
with the upgraded BIOS version.
- #ipmitool hpm check

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 Figure 51: Check Active BIOS Version

Please note that the functionality of the BMC will be degraded while upgrading the BIOS
firmware. Some functionality including sensor listing, BMC information, etc., will not be
available at that time.

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 5. ESSENTIAL INFORMATION FOR ADVANCED PLATFORM MANAGEMENT
5.1 Identifying the System
The system identity can be discovered using the IPMI ‘Get Device ID’ and ‘Get System GUID’
commands.
The command ‘Get Device ID’ also returns a manufacturer ID indicating Advantech and a
product ID indicating CGS-6010.
Entry
Device ID 0x6E
Manufacturer ID 0x2839
Product ID 0x6010
System GUID 8804a5a0-8120-11e4-966f-0002a5d5c51b
Table 24: System Identification

5.2 Lights Out Control

One of the basic lights out management functions is performing a system reset or power
cycle from remote.
These functions are available through the IPMI chassis commands described in the IPMIv2.0
specification, Section 28.3 ‘Chassis Control Commands’.
The BMC has full control over system power and reset which allows it to perform:
 Power on
Through direct power control & simulated power button press if needed
 Power off
Through direct power control
 Power cycle
Through direct power control
 Reset
Through direct reset signal control
 Soft power off/Graceful shutdown
Through power button press, initiating graceful shutdown if an ACPI-compliant OS is
used. If the system does not shut down within 300 seconds, the BMC will perform a
hard power off.
You can use the ‘ipmitool chassis power’ command to control the system:

Figure 52: Chassis Power Command Usage

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5.3 Creating System Events from an Application
System software can log events into the BMC’s SEL using the ‘Platform Event Message’
command per IPMIv2.0 specification, Section 29.3 ‘Platform Event Message Command’.
The command parameters are shown below:
Command Parameter Description
Generator ID 7bit ID available for software use (ID)
EvMRev Event Message Revision shall be 04h for Event
Messages that comply with the format given in
the IPMI v2.0 specification
Sensor Type Sensor Type per IPMIv2.0 specification, Table
42-3. OEM Reserved Types starting at 0xD0 to
0xFF are available for customer use
Sensor # Sensor Number representing the ‘sensor’
within the BMC that generated the Event
Message
Event Dir 1-bit. Indicates the event transition direction.
(0 = Assertion Event, 1 = Deassertion Event)
Event Type 7-bits. This field indicates the type of threshold
crossing or state transition (trigger) that
produced the event. This is encoded using the
Event/Reading Type Code. See Section 42,
‘Sensor and Event Code Tables’ per the
IPMIv2.0 specification.
Event Data(1:3) Event Data
Table 25: Command Parameters of the ‘Platform Event Message’ Command

5.4 Keeping Time in Sync

As described in Section 2.8.1 System Time, the BIOS synchronizes the BMC’s RTC with the
main system time on each start up. However, as the CGS-6010 is barely shut down when
operated in the field, the x86 host’s system time and the BMC’s time will drift apart due to
tolerance of the respective RTCs. Over a long period of time that may lead to significant
differences in the timestamps created by logging software on the x86 host and the BMC.
Keeping time stamps consistent for correlating x86 host and BMC logs for advanced
troubleshooting is desirable. Advantech recommends to sync the BMC’s time with the x86’s
host system time by sending the IPMI ‘Set SEL Time’ command from the OS regularly.
Using this mechanism, it is also possible to sync the OS time to a NTP time server on regular
intervals, and to pass this accurate time to the BMC using the ‘Set SEL Time’ command.

5.5 Check PSU Presence

The ‘ipmitool sensor’ command can be used to check the presence of redundant PSU
modules (PSU_1-Status and PSU_2-Status):

- #ipmitool sensor

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 Figure 53: Check the Readings of PSU_x-Status Sensors

In fact, ipmitool will use the IPMI ‘Get Sensor Reading’ command to read back each sensor’s
reading, and provide the response data bytes 4 and 5 of the ‘Get Sensor Reading’ command
(refer to IPMIv2.0 specification, Section 35.14 ‘Get Sensor Reading Command’). As shown in
the figure above, the returned bytes ‘00h’ and ‘08h’ for the PSU_2-Status sensor are the
response data bytes 4 and 5 respectively.

When both PSU modules are present, the response bytes 4 and 5 of the sensor reading for
the PSU_x-Status are ‘00h’ and ‘80h’. This shall be interpreted as (refer to Figure 54):
 Byte 4 : 00h = 0000 0000
No any sensor state (sensor offset, 0 to 7) is asserted
 Byte 5 : 80h = 1000 0000
No any sensor state (sensor offset, 8 to 14) is asserted

Figure 54: Response data byte 4&5 of the IPMI ‘Get Sensor Reading’ Command

However, if the PSU module 2 is removed, the response bytes 4&5 of the sensor reading for
the PSU_2-Status will be changed from ‘00h/80h’ to ‘01h/80h’ (see the figure below). This
time bit 0 of byte 4 had been altered and it shall be interpreted as:
 Byte 4 : 01h = 0000 0001
Sensor state (sensor offset) 0 is asserted.

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 Figure 55: Assertion State Indicates that PSU is Absent

Refer to the description of PSU_x-Status sensor in Section 2.6.4.5, the reading ‘1b’ for the
sensor offset 0 (“Presence Detected” bit) means that the PSU is not present.
Meanwhile an event log will be added to the SEL to indicate that the PSU was not present.
Use the ‘ipmitool sel elist’ command to check the SEL:
- #ipmitool sel elist

Figure 56: PSU Removal Event in SEL

5.6 System Health Status

The CGS-6010 supports an array of status and alarm LEDs at the front panel. The LEDs are
visible when the front cover is either closed or open. The locations and the functions of
front LEDs are described in Figure 57 and Table 26.

Figure 57: The locations of Front LEDs

Item Label Colour Description

F15 PWR Green Power Alarm
F16 MNR Amber Minor Alarm
F17 MJR Red USB2.0 ports
Major Alarm
F18 CRT Red Critical Alarm
F19 ID Blue Chassis Identification
F20 Status Red System Status
F21 Green Power

Table 26: Front LEDs Description

The CGS-6010 has three hot swappable fan modules at the front. Each of the fan modules
carries two high performance fans for optimized air flow and there are up to six fans

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 supported on the CGS-6010. Each fan module has an integrated fan status LED for
indicating its health status.

5.6.1 Power Alarm LED (PWR)

The Power Alarm LED (F15) is ON when system power is good. It is OFF when any of the
redundant PSU modules has failed (such as one PSU module is missing or the AC/DC power
cord had been removed) or when any PSU module is overheated.
The LED ID of the PWR LED for the ‘Get/Set FRU LED State’ commands is 0x07.

5.6.2 Minor Alarm LED (MNR)

The Minor Alarm LED (F16) is ON when the BMC detects a minor system failure event but
such event does not affect the system’s normal operation. Such events are defined as any
non-critical BMC sensor event (such as SEL_FULL) being asserted or Case_Intrusion sensor
having triggered.
The MNR LED can directly be controlled through the PICMG ‘Set FRU LED State’ command.
For example, the MNR LED’s ON/OFF state is manually controlled through PICMG commands
when the LED override state is enabled. As long as the LED override state is enabled, the
BMC will not change the MNR LED’s state under any circumstances.
In order to give control of the MNR LED back to the BMC, simply turn LED override off.
The LED ID of the MNR LED for the ‘Get/Set FRU LED State’ commands is 0x06.

5.6.3 Major Alarm LED (MJR)

The Major Alarm LED (F17) is unused in the current BMC’s implementation and it is reserved
for customer use cases, e.g. to indicate application or system software errors.
The MJR LED can directly be controlled through the PICMG ‘Set FRU LED State’ command.
For example, the MJR LED’s ON/OFF state is manually controlled through PICMG commands
when the LED override state is enabled.
By default the BMC does not control the MJR LED on its own but only allows access through
PICMG FRU LED State commands. Customization options for OEM defined BMC control are
available.
The LED ID of the MJR LED for the ‘Get/Set FRU LED State’ commands is 0x05.

5.6.4 Critical Alarm LED (CRT)

The Critical Alarm LED (F18) is ON when the BMC detects any critical system failure event. A
critical system failure has a significant impact to the system, it means that the system can
either not continue to operate or it is operating under a non-redundant power or cooling
condition, resulting in increased risk for system failure.
Events triggering this LED are defined as critical evens on any of those sensors:
1. Processor (internal errors, cache errors, etc.)
2. Memory (single and multi-bit errors, ECC errors)
3. Temperature (baseboard, processors, and PCH)
4. Fan (failure, speed)
5. Voltage (standby, baseboard, and processors)
6. PSU failure

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The CRT LED can directly be controlled through the PICMG ‘Set FRU LED State’ command.
For example, the CRT LED’s ON/OFF state is manually controlled through PICMG commands
when the LED override state is enabled. As long as the LED override state is enabled, the
BMC will not change the CRT LED’s state under any circumstances.
In order to give control of the CRT LED back to the BMC, simply turn LED override off.
The LED ID of the CRT LED for the ‘Get/Set FRU LED State’ commands is 0x04.

5.6.5 Chassis Identification LED (ID)

There are two Chassis Identification LEDs, one is located on the front panel and the other is
on the rear panel, used for chassis identification. Both LEDs are ON or OFF simultaneously.
The LEDs are ON or OFF with the following conditions:
1. The LEDs will be ON if the IPMI ‘Chassis Identify’ command (IPMIv2.0 specification,
Section 28.5) is received, and they will be automatically OFF after 15 seconds (by
default).
2. The LEDs will be ON if ‘Chassis ID’ button on the front panel is pressed. Press the
button again to turn off the LEDs.
The Chassis ID LED can directly be controlled through the PICMG ‘Set FRU LED State’
command. For example, the Chassis ID LED’s ON/OFF state is manually controlled through
PICMG commands when the LED override state is enabled. As long as the LED override state
is enabled, the BMC will not change the Chassis ID LED’s state under any circumstances.
In order to give control of the Chassis ID LED back to the BMC, simply turn LED override off.
The LED ID of the Chassis Identification LED for the ‘Get/Set FRU LED State’ commands is
0x01.

5.6.6 System Status LED (Status)

The System Status LED is activated based on PEF rules which can be configured by the user.
This LED will be ON in any of the following conditions (default settings in PEF):
1. The assertion event of UNC threshold or UC threshold, for any temperature sensor
2. The assertion event of LC threshold for any of the FAN sensors
3. The assertion event of enabled state bits for the PU_STATUS sensor
4. The assertion event of enabled state bits for the PSU_1-STATUS and PSU_2-STATUS
sensors
It will be turned OFF ONLY when ALL previously asserted events are deasserted.
For more information, please refer to Sections 2.9.3.1.3 and 2.9.3.2.6.
The Status LED can directly be controlled through the PICMG ‘Set FRU LED State’ command.
For example, the Status LED’s ON/OFF state is manually controlled through PICMG
commands when the LED override state is enabled. As long as the LED override state is
enabled, the BMC will not change the Status LED’s state under any circumstances.
In order to give control of the Status LED back to the BMC, simply turn LED override off.
The LED ID of the Status LED for the ‘Get/Set FRU LED State’ command is 0x02.

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 5.6.7 Power LED
The Power LED (F21) is ON when system power is on.

5.6.8 FAN Status LED

There are totally up to 6 fans which are grouped into 3 fan modules inserted into the front
side of the system chassis. Each fan module has an integrated FAN status LED for indicating
its health status.
The FAN status LED is ON when the fan module works as expected. It will turn OFF when
fan’s speed is under the lower critical threshold (LC = 1200 rpm) or when the fan module is
not mounted properly.
The colour of the FAN status LED is green.

5.7 Reading the SEL

The ‘ipmitool sel list’ command or ‘ipmitool sel elist’ command can be used to dump the SEL:
- #ipmitool sel list

Figure 58: Use ‘ipmitool sel list’ Command to Dump the SEL

- #ipmitool sel elist

Figure 59: Use ‘ipmitool sel elist’ Command to Dump the SEL

The ‘ipmitool sel save <file name>’ command can be used to store the SEL to a file:
- #ipmitool sel save <file name>

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 Figure 60: Use ‘ipmitool sel save’ Command to Store the SEL to a File

After that, the file contents can be dumped to view the SEL entries:
- #cat <file name>

Figure 61: Check Saved SEL file

The ‘ipmitool sel clear’ command can be used to clear the SEL in the BMC:
- #ipmitool sel clear

Figure 62: Use ‘ipmitool sel clear’ Command to Clear SEL

5.8 Troubleshooting for ipmitool Drivers

For most Linux distributions, ipmitool shall work normally as mentioned in Section 1.1.2
Software Support. However, you may see the following error message while executing
ipmitool:

Figure 63: Error Message for Executing ipmitool

Check driver loading status of the ipmitool drivers (ipmi_devintf, ipmi_si and
ipmi_msghandler) with the ‘lsmod | grep ipmi’ command. If they are loaded well, Linux shall
response with the message shown as the picture below:
- # lsmod | grep ipmi

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 Figure 64: Check Driver Loading Status of ipmitool

If it doesn’t, follow the steps below to manually load them. The IPMI system interface driver
(ipmi_si) can successfully auto-probe for the address (IO ports 0xCA2/0xCA3). Load the
impi_si driver first:
- # modprobe ipmi_si

Figure 65: Load ‘ipmi_si’ Driver

When the kernel is loading the ipmi_si driver, the related message handler driver
ipmi_msghandler shall be automatically loaded as well. One more step is required to allow
the user space applications to access the BMC, which is loading the related device interface
driver ipmi_devintf:
- # modprobe ipmi_devintf

Figure 66: Load ‘ipmi_devintf’ Driver

You may check driver loading status again then excute ipmitool to see whether it works.

5.9 Troubleshooting Boot Problems

5.9.1 Use SoL to Monitor BIOS POST
Please follow Section 1.3 Connecting to the x86 Host over SOL for SOL information.

5.9.2 Use OEM Command ‘Read Port 80’ to Track BIOS Post Codes
You may use Advantech OEM command ‘Read Port 80’ to retrieve BIOS POST code (see
Section 2.2.1.4 for the details):
- #ipmitool –I lan –H <BMC IP> -U <User ID> -P <Password> raw 0x2e 0x80 0x39 0x28
0x00

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 Figure 67: Use ‘Read Port 80’ Command to Track BIOS Post Codes

5.9.3 Use SoL to Enter BIOS Stup and Change Settings

Please follow Section 1.3 Connecting to the x86 Host over SOL for SOL information.

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A. APPENDIX: SUPPORTED IPMI COMMANDS
The following standard IPMI commands are supported:
IPMI Device Global Commands NetFn Cmd IPMI Section
Get Device Id App 0x01 20.1
Cold Reset App 0x02 20.2
Get Self Test Results App 0x04 20.4
BMC Device and Messaging Commands NetFn Cmd IPMI Section
Set BMC Global Enables App 0x2e 22.1
Get BMC Global Enables App 0x2f 22.2
Clear Message Flags App 0x30 22.3
Get Message Flags App 0x31 22.4
Enable Message Channel Receive App 0x32 22.5
Get Message App 0x33 22.6
Send Message App 0x34 22.7
Read Event Message Buffer App 0x35 22.8
Get System GUID App 0x37 22.14
Get Channel Authentication Capabilities App 0x38 22.13
Get Session Challenge App 0x39 22.15
Activate Session App 0x3a 22.17
Set Session Privilege Level App 0x3b 22.18
Close Session App 0x3c 22.19
Get Session Information App 0x3d 22.20
Get AuthCode App 0x3f 22.21
Set Channel Access App 0x40 22.22
Get Channel Access App 0x41 22.23
Get Channel Info App 0x42 22.24
Set User Access App 0x43 22.25
Get User Access App 0x44 22.27
Set User Name App 0x45 22.28
Get User Name App 0x46 22.29
Set User Password App 0x47 22.30
Activate Payload App 0x48 24.1
Deactivate Payload App 0x49 24.2
Get User Payload Access App 0x4d 24.7
Master Write-Read App 0x52 22.11
BMC Watchdog Timer Commands NetFn Cmd IPMI Section
Reset Watchdog Timer App 0x22 27.5
Set Watchdog Timer App 0x24 27.6
Get Watchdog Timer App 0x25 27.7

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 Chassis Device Commands NetFn Cmd IPMI Section
Get Chassis Capabilities Chassis 0x00 28.1
Get Chassis Status Chassis 0x01 28.2
Chassis Control Chassis 0x02 28.3
Chassis Identify Chassis 0x04 28.5
Set Chassis Capabilities Chassis 0x05 28.7
Set Power Restore Policy Chassis 0x06 28.8
Get System Restart Cause Chassis 0x07 28.11
Set System Boot Options Chassis 0x08 28.12
Get System Boot Options Chassis 0x09 28.13
Set Front Panel Button Enables Chassis 0x0a 28.6
Set Power Cycle Interval Chassis 0x0b 28.9
Event Commands NetFn Cmd IPMI Section
Set Event Receiver S/E 0x00 29.1
Get Event Receiver S/E 0x01 29.2
Platform Event S/E 0x02 29.3
PEF and Alerting Commands NetFn Cmd IPMI Section
Get PEF Capabilities S/E 0x10 30.1
Arm PEF Postpone Timer S/E 0x11 30.2
Set PEF Configuration Parameters S/E 0x12 30.3
Get PEF Configuration Parameters S/E 0x13 30.4
Set Last Processed Event ID S/E 0x14 30.5
Get Last Processed Event ID S/E 0x15 30.6
Alert Immediate S/E 0x16 30.7
PET acknowledge S/E 0x17 30.8
SEL Device Commands NetFn Cmd IPMI Section
Get SEL Info Storage 0x40 31.2
Get SEL Allocation Info Storage 0x41 31.3
Reserve SEL Storage 0x42 31.4
Get SEL Entry Storage 0x43 31.5
Add SEL Entry Storage 0x44 31.6
Clear SEL Storage 0x47 31.9
Get SEL Time Storage 0x48 31.10
Set SEL Time Storage 0x49 31.11
Get SEL Time UTC Offset Storage 0x5c 31.11a
SDR Device Commands NetFn Cmd IPMI Section
Get SDR Repository Info Storage 0x20 33.9
Get SDR Repository Allocation Info Storage 0x21 33.10
Reserve SDR Repository Storage 0x22 33.11
Get SDR Storage 0x23 33.12
Get SDR Repository Time Storage 0x28 33.17
Run Initialization Agent Storage 0x2c 33.21

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 FRU Device Commands NetFn Cmd IPMI Section
Get FRU Inventory Area Info Storage 0x10 34.1
Read FRU Inventory Data Storage 0x11 34.2
Write FRU Inventory Data Storage 0x12 34.3
Sensor Device Commands NetFn Cmd IPMI Section
Set Sensor Hysteresis S/E 0x24 35.6
Get Sensor Hysteresis S/E 0x25 35.7
Set Sensor Threshold S/E 0x26 35.8
Get Sensor Threshold S/E 0x27 35.9
Set Sensor Event Enable S/E 0x28 35.10
Get Sensor Event Enable S/E 0x29 35.11
Re-arm Sensor Events S/E 0x2a 35.12
Get Sensor Event Status S/E 0x2b 35.13
Get Sensor Reading S/E 0x2d 35.14
LAN Device Commands NetFn Cmd IPMI Section
Set LAN Configuration Parameters Transport 0x01 23.1
Get LAN Configuration Parameters Transport 0x02 23.2
Serial/Modem Device Commands NetFn Cmd IPMI Section
Set Serial/Modem Configuration Transport 0x10 25.1
Parameters
Get Serial/Modem Configuration Transport 0x11 25.2
Parameters
Set Serial/Modem Mux Transport 0x12 25.3
SOL Activating Transport 0x20 26.1
Set SOL Configuration Parameters Transport 0x21 26.2
Get SOL Configuration Parameters Transport 0x22 26.3
PICMG Commands NetFn Cmd PICMG 3.0 Table
Get PICMG Properties PICMG 0x00 3-11
Get FRU LED Properties PICMG 0x05 3-29
Get LED Color Capabilities PICMG 0x06 3-30
Set FRU LED State PICMG 0x07 3-31
Get FRU LED State PICMG 0x08 3-32
Firmware Upgrade Commands NetFn Cmd HPM.1 Table
Get target upgrade capabilities PICMG 0x2E 3-3
Get component properties PICMG 0x2F 3-5
Abort Firmware Upgrade PICMG 0x30 3-15
Initiate upgrade action PICMG 0x31 3-8
Upload firmware block PICMG 0x32 3-9
Finish firmware upload PICMG 0x33 3-10
Get upgrade status PICMG 0x34 3-2
Activate firmware PICMG 0x35 3-11
Query self-test results PICMG 0x36 3-12
Query Rollback status PICMG 0x37 3-13
Initiate Manual Rollback PICMG 0x38 3-14
Advantech OEM Commands NetFn Cmd Section in this

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 document
Store Configuration Settings 0x2e 0x40 2.2.1.1
Read Configuration Settings 0x2e 0x41 2.2.1.2
SEL Mode Configuration 0x2e 0x62 2.2.1.3
Get Port 80 (BIOS POST Code) 0x2e 0x80 2.2.1.4
AMI OEM Commands NetFn Cmd Section in this
document
Restore Default Configuration 0x32 0x66 2.2.2.1
Table 27: Supported IPMI Commands

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B. APPENDIX: FIRMWARE RELEASE AND VERSIONING NUMBER
The official BMC firmware releases are aligned with product HW and/or system developing
stages (EVT/DVT/PVT/MP), see the picture below.

Figure 68: Official BMC FW Release

The BMC firmware version number is represented as M.NN, which is separated into two
parts as major number and minor number. Engineering versions pre mass production will
use the major number 0 and the major number 1 (or higher) is used for mass production
release.
The minor numbers are aligned with milestone releases so that the first milestone 1 release
is version 0.10, the first milestone 2 release is version 0.20 and so on.
The even minor numbers are used for official release which means the release is passed DQA
verification. The odd minor numbers are used for test image which means the release is only
for the purposes of validation, debugging or bug pre-verification and is not tested by DQA.
The test image may release to customer if customer agrees in written form to exclude any
warranty/liability claims and absolutely not use the test image in production.
Here are some examples of firmware version release:
Version Number Description
0.10 The first milestone 1 official release
0.12 The second milestone 1 official release
0.21 Test image of milestone 2 release
1.00 MP official release
Table 28: The Examples of BMC FW Version

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