LECTURE 7 Interface
LECTURE 7 Interface
DURAME CAMPUS
Selamu S. (MSC)
LECTURE_7
INTERFACE
Introduction
Memory Interfacing occurs when we need the microprocessor to access the memory
for reading instruction codes and the data stored in the memory.
I/O Interfacing indicates the various communication devices like the keyboard, mouse,
printer.
Interfacing is classified into two types, memory interfacing and I/O interfacing.
The general procedure for memory interfacing with 8086 is described as
follows:-
1) Arrange the memory chips into two banks to get 16-bit word size. The higher order
memory block is known as odd bank and the lower order block is known as even bank.
2) Connect the necessary number of address lines of 8086 to the memory chips. (Calculate
how many address lines are required to interfacing the required memory).
3) Connect the RD and WR lines of 8086 with the memory chips.
4) The remaining address lines of the 8086 are used for decoding the required Chip Select
signals for the memory chips.
Memory Devices
Simple or complex, every microprocessor-based system has a memory system.
Almost all systems contain four common types of memory:
Read only memory (ROM)
Flash memory (EEPROM)
Static Random access memory (SRAM)
Dynamic Random access memory (DRAM)
Before attempting to interface memory to the microprocessor, it is essential to understand
the operation of memory components.
Electronically Erasable Programmable Read-only Memory (EEPROM) is
memory space that programmers can use to store long-term information.
1) It is used to synchronize the operating speed of CPU with respect to input-output devices.
2) It selects the input-output device which is appropriate for the interpretation of the I/O
device.
3) It is capable of providing signals like control and timing signals.
4) In this data buffering can be possible through data bus.
5) There are various error detectors.
6) It converts serial data into parallel data and vice-versa.
7) It also convert digital data into analog signal and vice-versa.
THE PROGRAMMABLE PERIPHERAL INTERFACE
Microprocessor based system design involves interfacing of the processor with one or
more peripheral devices for the purpose of communication with various input and output
devices connected to it.They are also programmable devices.
8255 is a popularly used parallel, programmable input-output device.
It can be used to transfer data under various condition from simple input-output to
interrupt input-output.
Peripheral devices can broadly be classified into two categories
Special purpose peripherals
General purpose peripherals
Special Function Peripherals
These are devices that may be used for interfacing a microprocessor to a specific type of
I/O device.
These peripherals are more complex and therefore, relatively more expensive than general
purpose peripherals.
The functioning of these devices varies depending on the type of I/O device they are
controlling.
The special function peripherals are:-
General Function Peripherals
General purpose peripheral devices that perform a task but may be used for interfacing a
variety of I/O devices to microprocessor.
The general purpose devices are given below:
PPI 8255 is a general purpose programmable I/O device designed to interface the CPU
with its outside world.
It can be used with almost any microprocessor. It consists of three 8-bit bidirectional I/O
ports i.e. PORT A, PORT B and PORT C.
8255 is a popularly used parallel, programmable input-output device.
It can be used to transfer data under various condition from simple I/O to interrupt
input-output.
This is economical, functional, and flexible but is a little complex and general purpose I/O
device that can be used with almost any microprocessor.
There are 24 I/O pins which may be individually programmed in 2 groups of 12 and used
in 3 major modes of operation.
The high performance and industry standard configuration of the 82C55A make it
compatible with the 8086.
It has 24 pins that can be grouped in two 8-bit parallel ports: A and B called Port A (PA)
and Port B (PB) with the remaining eight known as Port C (PC).
Port C can be further divided into groups of 4-bits ports named Cupper (Cu) and Clower (Cl).
There are 40 pins and operates in +5 regulated power supply.
MODE OF OPERATION
The two operating modes of 8255 Programmable peripheral interface are:-
Bit Set Reset (BSR) Mode:-
If MSB of control word (D7) is 0, PPI works in BSR mode. In this mode only Port C bits are used for
set or reset.
When MSB of the control register is Zero (0), 8255 works in Bit Set-Reset mode. In this only PC bit
are used for set and reset.
Input-Output Mode:-
If MSB of control word (D7) is 1, PPI works in Input-output mode.
When MSB of the control register is One (1), 8255 works in Input-Output mode.
This is further divided into three modes: Mode 0:- Basic Input/ Output
Mode 1:- Strobed Input/ Output
Mode 2:- Bi-directional Bus
MODE 0: BASIC INPUT/ OUTPUT
Simple input/ output operations.
Two 8-bit ports and two 4-bit ports
Any port can be an input or output port
Outputs are latched
Inputs aren’t latched
16 different input/output configurations are possible in this mode
MODE 1: STROBED INPUT/ OUTPUT
It provides means for transferring I/O data to or from a specified port in conjunction
with strobes or handshaking signals.
Port A and port B use the I/O lines, and port C for handshaking signals.
There are two groups (group A, B)
Each group contains one 8 bit data port and one 4 bit control data port.
Both inputs and outputs are latched.
MODE 2: BI-DIRECTIONAL BUS
It provides a means for communication with a peripheral device for both transmitting &
receiving data.
Handshaking signals are provided to maintain a proper bus flow.
Port A – 8 bit bidirectional bus port and port C used as control signals
Any port programmed as an output port is initialized to all zeros when the control word is
written.
The modes for Port A and Port B can be separately defined, while Port C is divided into
two portions as required by the Port A and Port B definitions.
For instance: Group B can be programmed in Mode 0 to monitor simple switch closings
or display computational results,
Group A could be programmed in Mode 1 to monitor a keyboard or tape reader on an
interrupt-driven basis.
CONTROL WORD FORMATS
Control word is a part of control register in 8255 which specify an I/O function for each port.