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ERROR DETECTION AND CORRECTION

Rohith A S Shylesh K S Akaash B

Department of Electronics Engineering Department of Electronics Engineering Department of Electronics Engineering
MIT campus, Anna University MIT campus, Anna University MIT campus, Anna University
Chennai, India Chennai, India Chennai, India
Email:[email protected] Email:[email protected] Email:[email protected]

Baranidharan PS
Department of Electronics Engineering
MIT campus, Anna University
Chennai,,India
Email:[email protected]

Abstract----This paper examines the progress in error ensuring data integrity and the enhancement of data
correction methods, target detection, and tracking transmission reliability. Examples of these reviewed works
systems based on a thorough study of research papers. clearly show that such methods will outperform the
The research studies involve various methods such as traditional ones under diverse conditions, ranging from
redundant residue number systems (RRNS) to transmit noiseful environments to high-density data.
data efficiently, quantum bit error correction coding,
and new algorithms for magnetic recording systems. highly imThe progress in the field of automated systems,
Further, computer vision and image processing for especially computer vision and image processing, is
autonomous target tracking and error correction in pressive. These advancements form the basis of
memory systems are analysed. Collectively, these autonomous target tracking as seen in the Raspberry Pi and
studies highlight innovations in improving system OpenCV frameworks. The incorporation of real-time
reliability, efficiency, and performance across image processing, control mechanisms, and deep learning-
applications in communications, security, and data based algorithms further underlines the importance of
storage. This report synthesizes their findings to these systems in applications like surveillance, defense,
provide insights into emerging trends and potential and smart grid infrastructure.
directions for future research.
Besides this, the evolution of memory systems puts forth
the necessity for multiple dimension error detection and
I. INRODUCTION correction methods. The HVPDH encoding provides
In an era defined by the rapid advancement of technology, increased reliability in those environments which are
the demand for robust, efficient, and reliable systems has susceptible to soft errors and multi-cell upsets.
never been more pronounced. From communications and
defense to data storage and processing, the need for
innovative solutions to address challenges such as error This report aims to distil the key contributions of these
correction, autonomous operations, and real-time studies, providing an overview of their methodologies,
performance optimization is paramount. This report findings, and implications. Understanding the state-of-the-
synthesizes the findings of seven research papers, each art in these areas will help identify synergies and future
contributing valuable advancements to these fields. opportunities for advancing technology across multiple
domains.

Error correction is the first area of interest that falls within

digital communications and computing systems. Such
II. LITERATURE SURVEY
techniques as Redundant Residue Number System (RRNS)
and quantum bit error correction present possible ways of The reviewed research papers show different

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advancements in error correction, target detection, and 7. Stepper Motors for Precise Control: Rao's study focused
automated systems. Each study uniquely contributes to on the precision and reliability of stepper motors in
improving the performance, reliability, and applicability of automated defense systems. The paper stressed smooth and
technologies across various domains: accurate adjustments for surveillance cameras and weapon
systems to ensure optimal performance.
1. Advances in Residue Number Systems: Jilu James et al.
proposed an error correction algorithm using the This survey underlines the significant strides made in each
Redundant Residue Number System for communication domain, providing a foundation for integrating these
systems. It was proven that RRNS outperforms the innovations into cohesive, next-generation systems.
traditional Hamming codes in terms of bit error rates,
mainly in noisier channels. III. METHODOLOGY
In the realm of digital communication and data storage,
2. Quantum Bit Error Correction: Xin Miao and Xi Chen
ensuring the integrity of transmitted or stored information
proposed quantum-bit error correction coding technique
is paramount. Errors can occur due to various factors,
suited for smart grid substations. Their approach has
including noise, interference, and hardware malfunctions.
overcome challenges in EMI, therefore enhancing the
To address these challenges, error detection and correction
robustness against errors within quantum communication
techniques are employed. One such technique is the
systems.
Redundant Residue Number System (RRNS), which
utilizes a mathematical framework to represent integers
3. List-NPML Decoding for Magnetic Recording: Suayb S.
through residues modulo a set of bases.
Arslan et al. introduced the List-Noise Predictive
Maximum Likelihood Decoding (List-NPMLD) algorithm.
The RRNS offers a unique advantage by incorporating
This scheme successfully reduced the error events in
redundancy, allowing for the detection and correction of
magnetic recording systems by using error detection codes
errors in the transmitted data. This system can recover the
and periodic decision processes.
original integer from any subset of residues, making it
particularly effective for single error correction. The
4. HVPDH Encoding for Memory Reliability: Paromita
methodology outlined in this paper focuses on leveraging
Raha et al. designed the Horizontal-Vertical Parity and
the properties of RRNS to develop a systematic approach
Diagonal Hamming (HVPDH) method to improve memory
for detecting and correcting single residue errors. By
reliability. This technique detected up to eight-bit errors
employing specific theorems and an algorithm, this
and corrected multiple-bit errors with minimal bit
methodology aims to enhance the reliability of data
overhead.
transmission and storage systems.
5. Computer Vision for Target Detection: Sampa Jana and
Preprocessing
Shubhangi Borkar explored the usage of Raspberry Pi and
The preprocessing phase for implementing the error
OpenCV in autonomous object detection and tracking.
correction algorithm using the Redundant Residue Number
Their framework was capable of integrating real-time
System (RRNS) involves several key steps. First, a set of
image processing algorithms with motion prediction to
pairwise coprime moduli is selected to satisfy redundancy
offer robust performance in dynamic environments.
conditions, ensuring that the number of moduli is greater
than the number of information residues. Next, for the
6. Gun Detection Using Computer Vision: Rohit Kumar
integer to be transmitted, its residues are computed with
Tiwari and Gyanendra K. Verma have designed a visual
respect to the selected moduli. The first set of residues is
gun detection framework, which utilizes color-based
designated as information residues, while the remaining
segmentation and feature extraction methods. The system
residues are classified as redundant residues. Error
has successfully detected firearms in complex visual
detection criteria are then established based on the
properties of the residues, including setting thresholds for
consistency checking. Data structures are initialized to
hold the computed residues and track their status,
scenes using Harris Interest Point Detector and FREAK indicating whether they are correct or erroneous. Finally,
descriptors. the Base Extension (BEX) method is prepared for
computing redundant residues from the information
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residues, which will be crucial for the consistency

checking process. These preprocessing steps ensure that 3. Tools and Implementation
the system is adequately prepared for effective error The algorithm is implemented and validated using the
detection and correction using RRNS. following tools:

1.Research Design MATLAB/Python: Used for simulating the error detection

This research focuses on implementing and analyzing and correction process.
Redundant Residue Number System (RRNS) codes for Example Scenarios: Two scenarios are analyzed:
single error detection and correction. The approach Error in Redundant Residues
includes: Error in Information Residues
Theoretical Analysis: Study of RRNS codes, theorems, and
related algorithms.
Algorithm Implementation: Implementing the single error 4. Performance Analysis
detection and correction algorithm using RRNS properties. The implemented algorithm is evaluated based on:
Performance Analysis: Simulating and validating the Error Detection Accuracy: Ability to correctly detect
algorithm using examples with both information residues single residue errors.
and redundant residues. Correction Capability: Effectiveness in correcting errors
Theoretical Foundation in both information and redundant residues.
The error detection and correction algorithm is based on Computational Efficiency: Time complexity of the
the following key theorems: algorithm for varying residue moduli.
Theorem 4:
RRNS codes can correct a single residue error if:
5. Example Scenarios
The following example cases are considered for validation:
Case 1: A single error in redundant residue is identified
and corrected.
Case 2: A single error in information residue is located and
corrected using redundant moduli.

IV. EXPERIMENTAL SETUP

In this section, HVPDH method is proposed to achieve
reliability with reduced bit overhead.
A.Proposed Architecture of HVPDH method for
2.Algorithm for Single Error Correction Memory:
The algorithm for correcting a single error in the RRNS is
The proposed architecture of HVPDH method for memory
structured as follows:
is depicted in Fig. 1. In this proposed technique, horizontal
Compute Residue Sets: Calculate the sets of residues,
and vertical parity bits are employed along with grouped
including both redundant and information residues.
diagonal Hamming parity bits to detect and correct the
Check Redundant Residues:
errors in the data bits that are being stored in the memory.
If all elements in the redundant residue set are zero, all
residues are correct. In encoding process, data bits are fed to the HVPDH
If only one element is non-zero, proceed to correct the encoder and set of parity bits are calculated, as Horizontal
corresponding information residue. parity bits (Hz), Vertical parity bits (V) and the grouped
If more than one element is non-zero, check the next set of diagonal Hamming parity bits (Hm). At the end of
residues. encoding process, the obtained HVPDH code word is
Check Information Residues: For the next set of residues,
determine if one or both elements are non-zero to identify
the error.
Correct the Error: If a non-zero residue is found, replace
the erroneous residue with the correct value.
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stored in the memory. Errors which occur in the data stored The bitwise XOR operation of the bits in each of the rows
in memory can be corrected in the decoding process as forms horizontal parity bits, designated as HZn, where, n
explained in C. represents the number of corresponding row. The bitwise
XOR operation of the bits in each of the columns forms
B.Proposed HVPDH Encoder vertical parity bits, designated as Vm, where, m represents
As an example, data word of 32 bit is considered in this the number of corresponding column
work. The data word is organized in the form of a matrix. The horizontal and vertical bitwise XOR operation
Data word is separated into N rows and M columns. The produces the two parity sets. The third parity set is
arrangement of 32 bit data word is given in Fig. 2. obtained from grouping the data matrix and obtaining the
parities by Hamming code method. The grouping of the
data follows the pattern shown through the lines as shown
in the Fig. 4. The number of groups to be formed should be
equal to the number of rows in the matrix word.

An encoder is intended to produce the parity bits. There

are two procedures which are utilized to create three sets
of parity bits. Even parity technique is used to generate the
horizontal and vertical parity bits as shown in Fig. 3.

From the grouping done above, we see that for a 32 bit

data word, four groups based on a specific diagonal pattern
(top-left to bottom-right) are constructed. Henceforth, the
first group is made by data bits D31, D27, D20, D13, D6,
D2, D9 and D16, the second group has data bits D23, D30,
D26, D19, D12, D5, D1 and D8, the third group has data
bits D15, D22, D29, D25, D18, D11, D4 and D0 and the
fourth group comprises D7, D14, D21, D28, D24, D17,
D10 and D3. Each of these groups has eight bits each. For
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each of these groups its respective Hamming parity bits are

calculated as shown in Fig. 5., where Hm1, Hm2, Hm3 and
Hm4 are the Hamming parity bits.

Finally in the encoder, all the three set of parity bits

namely horizontal, vertical and diagonal parity bits are
calculated. In the calculation we obtain horizontal parity
bits, vertical parity bits and grouped diagonal Hamming
parity bits as 4,8 and 16 bits respectively. So, in total for
32 bit data word, we obtain 28 parity bits.
The Hamming parity bits for each of the groups (with
respect to the bit positions) are calculated as below. For the
C.Proposed HVPDH Decoder
first row, Hamming parities are calculated as shown in (1)-
Decoding the codeword is done at the decoder to get back
(4)
the original data bits. The proposed HVPDH method
decodes the received codeword. The received code word is
of the form as shown in Fig. 6. This is reconverted to the
original matrix of Fig. 2. When the transmitted codeword
is received, a Hamming decoder is used to recalculate the
Hamming parities to detect the errors. Further, it is re-
grouped into its original matrix form to recalculate its
horizontal and vertical parity bits to correct the detected
For the second row, Hamming parities are calculated as errors.
shown in (5)-(8)

For the third row, Hamming parities are calculated as

shown in (9)-(12)

To detect the errors in received codeword, grouped

diagonal Hamming parity bits are recalculated using the
same methodology as done in the encoder. These
recalculated parity bits help to locate the error bits in the
received data. If single bit error is present in each diagonal
group then that error bit can be located and corrected using
the recalculated diagonal Hamming parity bits at the
For the fourth row, Hamming parities are calculated as decoder. If more than one bit is corrupted in each diagonal
shown in (13)-(16) group then with the help of vertical and horizontal parity
bits the position of error bits are located for correction.
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Once the received codeword is regrouped in the matrix

form, the horizontal and the vertical parity check bits are
recalculated as in Fig. 7. Here, Hz’0, Hz’1, Hz’2 and Hz’3
are the horizontal parity check bits and V’0, V’1, V’2, V’3,
V’4, V’5, V’6 and V’7 are the vertical parity check bits.

The codeword, code rate and bit overhead have been

analyzed for HVPDH method with increase in data word
size. Table II shows the analysis of the proposed HVPDH
method when the data word size is increased.

The syndrome bits are calculated by XOR-ing the received

horizontal and vertical parity bits with the recalculated
horizontal and vertical parity check bits at the decoder. If
all the calculated syndrome bits are zero then it is
concluded as no error in the received data word. If any one
of the calculated syndrome bits are not zero, then the bits
present in the corresponding row/column is considered for
the further error correction process. These bits are
compared with the results of the grouped diagonal
Hamming parities to locate the position of error bit. The
correction of data bits is done by flipping the data bits
where the error is located. Once, the first error bit is
corrected, the data word is sent back to the decoding unit VI . FUTURE WORKS
for the parity recalculation. Once, again the same process The study suggests that further research is needed to
starts, the parities are recalculated, errors located, parities explore the potential of RRNS-based arithmetic in
compared and errors corrected. This process repeats until communication systems and to evaluate its performance in
we receive all parities to be zero. practical scenarios.
The future work includes:
V. ANALYSIS AND DISCUSSION Extending the single error correction algorithm to correct
The proposed HVPDH method has been coded in Verilog multiple residue errors.
HDL and simulation is performed using Modelsim SE6.4 Evaluating the performance of RRNS codes in other
and the behavior is verified for various random soft errors channel models, such as Rayleigh fading channels.
experimentally. The error correction capacity of the Implementing RRNS codes in practical communication
memory data word from soft errors utilizing HVPDH systems.
codes is compared with DMC[4] and MDMC[5]. The extension of the algorithm for correcting burst errors
Reliability in terms of number of errors that can be is a potential area for future work.
corrected, code rate and bit overhead percentage is taken
for analysis. HVPDH method can detect up to 8-bit errors It may involve exploring hybrid schemes that combine
and correct 1-bit error, all combinations of 2-bit errors and error detection and correction with other error resilience
most combinations of 3, 4 and 5 bit errors which is almost techniques, such as feedback channels or forward error
same as DMC and MDMC. In this method, same reliability correction.
is achieved by reducing number of parity bits by 11% Further improvement of the error detection and correction
when compared to MDMC and 25% when compared to scheme to detect and correct more erroneous MBs.
DMC. These indices are compared and tabulated in Table I. Future work may involve improving the technique to
detect nonvisible errors and to make it more robust to
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different types of errors. Additionally, the technique may How the weather affects the pain of citizen scientists using
be extended to other video coding standards. a smartphone app.

[5]Panda, A. K., Sarik, S., & Awasthi, A. K.. (2012).

VII. CONCLUSION FPGA Implementation of Encoder for (15, k) Binary BCH
Code Using VHDL and Performance Comparison for
The reviewed research collectively underlines the critical Multiple Error Correction Control.
role of error correction, autonomous operations, and
advanced image processing in addressing contemporary [6]Inc, L. B. V.. (2004). A single error correction double
challenges across technology domains. From RRNS and burst error detection code - Signals, Systems & Computers
quantum error correction for enhanced data integrity to
HVPDH methods improving memory reliability, these [7]Paromita Raha, M Vinodhini, N. S. Murty,
studies exemplify innovative solutions that enhance system Horizontal-Vertical Parity and Diagonal Hamming Based
performance and resilience. Soft Error Detection and Correction for Memories

Automated target tracking in the domain opens

transformational potential for defense and surveillance
applications with advanced algorithms, hardware platforms,
and real-time optimizations. On the other hand, the
development of magnetic recording systems and memory
architectures that are sophisticated speaks about the efforts
being made towards the management of increasing
demands of data and ensuring the operation under adverse
conditions.

These future studies should unify the efforts towards more

comprehensive solutions and must seek interdisciplinary
approaches. In fact, these technologies should leverage AI,
IoT integration, and scalable architectures to extend the
applicability of these technologies towards a broader
context. This kind of innovation, provided through
foundational studies, would support meeting the demands
of digital and automated systems of the future.

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[1]Ekram Khan; Sune Lehmann; H. Gunji et a,
Iterative Error Detection and Correction of H.263 Coded
Video for Wireless Networks

[2]Systems, C.. (2015). A Novel Method for Error

Correction using Redundant Residue Number System in
Digital

[3]Arslan, Ş. Ş., Lee, J., & Goker, T.. (2013). Error Event
Corrections Using List-NPML Decoding and Error
Detection Codes

[4]Dixon, W. G., Beukenhorst, A. L., Yimer, B. B., Cook,

L. M., Gasparrini, A., El‐Hay, T., … McBeth, J.. (2019).