Detailed Explanation of Input Output
Detailed Explanation of Input Output
I/O Organization
I/O Organization focuses on how input/output devices communicate with the CPU and
memory. It addresses specific operational methods for connecting peripherals, handling data
flow, and synchronization between the CPU and external devices.
Peripheral Devices: Electromechanical devices (e.g., keyboards, printers, and storage disks)
used to interact with the computer system.
I/O Module (Interface):
o Acts as a bridge between peripherals and the system bus.
o Functions include buffering, data format translation, and synchronization.
I/O Bus:
o A communication channel comprising data, address, and control lines that links the
CPU, memory, and I/O devices.
2. Communication Methods
1. Programmed I/O:
o The CPU actively manages I/O operations by polling the device status.
o Drawback: The CPU is inefficiently utilized, as it waits for device readiness.
2. Interrupt-Driven I/O:
o Devices signal the CPU when ready using an interrupt.
o Benefit: Frees the CPU to perform other tasks while waiting for I/O operations.
3. Addressing Techniques
1. Memory-Mapped I/O:
o Devices share the same address space as memory.
o Advantages: Simplifies CPU instructions for accessing memory and I/O.
o Disadvantage: Reduces memory address space.
I/O Architecture
I/O Architecture focuses on the structural and strategic design of I/O systems, addressing how
components are interconnected and managed within the overall system.
1. System Organization
1. Programmed I/O:
o CPU is directly involved in every I/O operation.
o Example: Transferring data from a keyboard to the CPU via status polling.
2. Interrupt-Driven I/O:
o The CPU is interrupted when the device is ready.
o Example: A printer signals the CPU when it's ready for the next set of data.
3. DMA:
o Transfers data directly between memory and peripherals without CPU intervention.
o Example: Loading video files from disk to memory.
3. Addressing Techniques
1. Isolated I/O:
o Separate control lines distinguish memory and I/O operations.
o Example: Special CPU instructions for accessing I/O ports.
2. Memory-Mapped I/O:
o I/O devices are treated as memory locations.
o Example: GPUs typically use memory-mapped I/O for high-speed communication
with the CPU.
4. Bus Architectures
1. Single-Bus Architecture:
o All components (CPU, memory, I/O) share a single communication bus.
o Pro: Simple and cost-efficient.
o Con: Limited scalability and potential for bus contention.
2. Multiple-Bus Architecture:
o Separate buses for memory and I/O devices.
o Pro: Improves performance by reducing contention.
o Con: Higher cost and complexity.
6. Priority Handling
Interrupt Priority:
o Higher-priority devices are serviced before lower-priority ones.
o Example: A magnetic disk (high priority) is serviced before a keyboard (low priority).
Priority Methods:
1. Software Polling: CPU queries devices sequentially to identify the source of the
interrupt.
2. Hardware Priority Encoder: Hardware determines the highest-priority interrupt.
3. Daisy-Chaining: Devices are connected in series; priority is determined by position in
the chain.