DLD Lab 4
DLD Lab 4
Fall 2024
Lab 04
Objective:
DeMorgan’s Theorems
Student Information
AYESHA AKBAR
Student Name
24SP-053-CS
Student ID
14-0CT-24
Date
Assessment
Marks Obtained
Remarks
Signature
UIT University
Department of Computer Science/Software Engineering CSC-111
Digital Logic Design Lab 04
Instructions
Come to the lab in time. Students who are late more than 15 minutes, will not be allowed to attend the lab.
Students have to perform the examples and exercises by themselves.
Raise your hand if you face any difficulty in understanding and solving the examples or exercises.
Lab work must be submitted on or before the submission date.
1. Objective
The purpose of this lab session is to get acquainted with DE Morgan’s Theorem and to Implement and verify DE
Morgan’ on hardware and understand there working.
2. Labs Descriptions
DE Morgan, a mathematician who knew Boole, proposed two theorems that are an important part of Boolean
algebra. In practical terms, DeMorgan’s theorem provide mathematical verification of the equivalency of the
NAND and negative-OR gates and the equivalency of the NOR and negative-AND gates. There are two theorems,
stated as:
“The complement of a product of variables is equal to the sum of the complements of the variables.”
The formula for expressing this theorem for two variable is:
“The complement of a sum of variables is equal to the product of the complements of the variables.”
The formula for expressing this theorem for two variable is:
M21-7000 trainer or ETS-5000 trainer, IC’s 7404, 7408, 7432, DMM, Logic Probe
2.2 Procedure:
a) Insert all logic IC’s one by one into the bread-boarding socket, connect pin 14 to +5V and pin 7 to GND.
b) Experimentally verify that the respective logic gate is working properly by determining its truth
table. Also observe the output with DMM and logic probe. Record your observations in the respective tables.
3. Lab tasks
Task 1
Consider the DeMorgan’s first theorem, draw the logic diagrams for Equation (I) in space provided,
construct the circuits on hardware and verify the tables.
Logic Diagram:
L.H.S: R.H.S:
INPUT OUTPUT
X Y Z L.H.S R.H.S
0 0 0 1 1
0 0 1 1 1
0 1 0 1 1
0 1 1 1 1
1 0 0 1 1
1 0 1 1 1
1 1 0 1 1
1 1 1 0 0
Task 2
Consider the DeMorgan’s second theorem, draw the logic diagrams for Equation (II) in space provided,
construct the circuits on hardware and verify the tables.
Logic Diagram:
L.H.S R.H.S
INPUT OUTPUT
X Y Z L.H.S R.H.S
0 0 0 1 1
0 0 1 0 0
0 1 0 0 0
0 1 1 0 0
1 0 0 0 0
1 0 1 0 0
1 1 0 0 0
1 1 1 0 0
4. Homework Tasks