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EC 5110 Logic Synthesis and Verification Lecture Notes 21082024

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EC 5110 Logic Synthesis and Verification Lecture Notes 21082024

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pluscommander972
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© © All Rights Reserved
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Logic Synthesis and Verification

EC4139/EC5110
Course Coordinator: Dr. R. M. Vemuri
Course Structure
Final grade will depend on following:
Two minors – 15% each
Laboratory ‐ 20%
One major – 40%
Instructor discretion – 10%
Collaboration:
Encouraged: in‐class discussions, helping one another understand concepts, group
study.
Discouraged: direct help in assignments or examinations for solving problems
Ethical Conduct:
No cheating in any assignment or examination will be tolerated – maximum penalty
as per university rules.
Plagiarism will be treated same as cheating. Don’t claim other’s work as own.
Text books/references:

Logic Synthesis & Verification 2


Course Overview
 Review of Digital Systems Design
 Verilog Language
 Logic Synthesis Problem
 Logic Optimization
 Logic Design Components
 Advanced Methods in Synthesis
 Combinational and Sequential Logic Synthesis
 Verification

Logic Synthesis & Verification 3


Course Objectives and Outcome
Objectives:
 Start with basic concepts of digital systems design (refresher)
 Introduction to HDL concepts
 Learn Verilog language
 Learn about what are logic synthesis and verification
 Know where and how these are used in the chip design process.
 Concepts on what are the different verification flows
 Synthesize and verify some medium size designs
Outcome:
 Develop expertise in writing code to synthesize circuits
 Adept at using Design Compiler® from Synopsys for synthesizing circuits
 Understand the usage of other tools for verification
 Ready to be hired as a Design Engineer

Logic Synthesis & Verification 4


Some Rules
Attendance is mandatory
 If attendance is less than 75% student will be disbarred from writing final
exam.
 Absence at final exam leads to automatic ‘F’ grade
 Attendance through QR code scanning in Juno
No path for make up if any quiz/exam or assignment is missed
 Only severe medical conditions will be considered for exemption.
Office Hours
Will be updated after discussion in class

Logic Synthesis & Verification 5


Refresher for Digital Systems Design
 Introduction to number system and conversion of radix
 Logic gates and Boolean algebra
 Minterm and Maxterm expansions
 Multi‐level gate circuits
 Logic optimization and different methods
 Combinational circuit design
 Multiplexers, decoders, ROM, & PLDs
 Adders, Subtractors, and Comparators
 Sequential circuits
 Latches and FFs

Logic Synthesis & Verification 6


World – analog or digital?
 When you hear a musical instrument – is that analog or digital?
 When you see anything – is that analog or digital?
 So is the world we live in analog or digital?
 What is the need for converting from one to the other?
 How do you store analog data?
 How do you store digital data?

Logic Synthesis & Verification 7


Analog Systems
 Analog devices process continuously varying values wrt time.
 Values can be anything eg. Current, voltage, sound etc.
 All musical instruments produce a continuous waveform
 We live in an analog world

Logic Synthesis & Verification 8


Digital Systems
 Values produced at evenly spaced discrete times are digital.
 Values can be anything eg. Current, voltage, sound etc.
 Analog signals can be captured at discrete times for digitizing

EC 2203 Digital System Design 9


Advantages of Digital Systems
 Digital systems are easier to design
 Storage of data is easier with digital
 Lower transmission losses of data possible with digital
 More immune to noise
 Manipulation is easier for digital data (programmability)
 Speed of operation
 Size of device
 Economical

EC 2203 Digital System Design 10


Number System
 Humans think and work mostly in decimal system [0‐9]
 For example a decimal number what does this really mean?
 254 = 2 x 102 + 5 x 101 + 4 x 100
 476.8 = 4 x 102 + 7 x 101 + 6 x 100 + 8 x 10‐1
 Normally we just write the numbers, and infer the corresponding power of
10 based on the position
 Digital systems work in terms of binary numbers [0‐1]
 Examples:
 (101)2 = 1 x 22 + 0 x 21 + 1 x 20 = (5)10

Note that all numbers are positive binary numbers.


Think about how we can represent negative numbers in binary

EC 2203 Digital System Design 11


Binary Arithmetic
 Study binary arithmetic on your own from “Digital Design with an
Introduction to the Verilog HDL” by Mano and Ciletti.
Any other book on digital design may also be used.
 Binary addition, subtraction, multiplication, and division

 Study octal numbers, and hexadecimal numbers also on your own


from the same book(s)

EC 2203 Digital System Design 12


Boolean Algebra and Logic Gates
 Boolean algebra follows postulates similar to regular algebra. It is
true to the following laws: associative, commutative, identity, inverse,
and distributive.
 Read page 39 from Mano and Ciletti for details and examples

EC 2203 Digital System Design 13


Two Valued Boolean Algebra
 A two‐valued Boolean algebra is defined on a set of two elements
B={0, 1}

x y x+y (OR gate) x*y (AND gate) x’ (NOT gate)


0 0 0 0 1
0 1 1 0 1
1 0 1 0 0
1 1 1 1 0

EC 2203 Digital System Design 14


Postulates & Theorems of Boolean Algebra

EC 2203 Digital System Design 15


Operator Precedence
 How would you solve the following:
 8*4/2+2*4‐(3‐2)?
 What is the order of the operations performed?
 The order of the operations performed is called precedence
 In Boolean algebra, the order of precedence is
1. Parentheses
2. NOT
3. AND
4. OR

EC 2203 Digital System Design 16


Gate Level Minimization
 Usually any functionality can be designed in multiple ways
 The number of gates used can vary based on the method chosen
 Design with minimum number of gates is considered to be better
 Why?
 Minimization algorithms work on the algebraic expression
representing the digital logic
 K‐map
 Variable Entered Mapping (VEM)
 Quine‐McCluskey Technique
 Reading Assignment: Chapter 3 from “Digital Design with an
Introduction to Verilog HDL” 5th Ed. by Mano and Ciletti

EC 2203 Digital System Design 17


Combinational Logic
 A combinational circuit has logic gates with no feedback paths, memory
elements, or clock.

The functionality of a combinational circuit can be represented by a truth


table
 Some examples of combinational circuits we will cover are
 Half adder
 Full adder
 Half subtractor
 Full subtractor

EC 2203 Digital System Design 18


Half Adder

EC 2203 Digital System Design 19


Full Adder

EC 2203 Digital System Design 20

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