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Digital Logic Report

final report on chiplet bases technology

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SK Roy
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0% found this document useful (0 votes)
11 views16 pages

Digital Logic Report

final report on chiplet bases technology

Uploaded by

SK Roy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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1 Boolean Algebra

Chapter 1
1.1 LOGIC GATES

It is the basic building block to construct any digital circuit.

We can implement any Boolean function using the above gates.

What is 1 & 0 in Digital Logic?

1 : True 0 : False

1 : high 0 : low

1 : Yes 0 : NO

Boolean Algebra

1.
Chapter 1

How real world problems are solved using digital logic system?

Real life
problem

Boolean
expression
(Truth Table)

Hardware
implementation
Using Gates

Final Outcome

Positive and Negative Logic

In positive logic 1 represents “high” and 0 represents “low”.


In negative logic 1 represents “low” and 0 represents “high”.

Buffer
Symbolic representation

i y
y = i [output = input]

Truth Table

i y

0 0
Boolean Algebra

1 1

2.
Chapter 1
A buffer increases the strength of signal so that it travels for longer distance

Waveform

Propagation Delay is time taken by a signal to go from input to output of a logic Gate. When
buffer has no delay, it passes the input simply. When buffer has a propagation delay then
after it senses the input at t = 0, it produces the output after propagation Delay.

Inverter

Inverter/NOT gate complements the logic.

Symbolic representation
Boolean Algebra

i y

3.
Chapter 1

Binary Logic
Sample Space, S = {0, 1}
0C = 1
1C = 0

Truth Table

i y = ic

0 1

1 0

Wave form

1 1 input

0
t
y
output without delay
1

1
output with delay
0
Boolean Algebra

propagation delay

4.
Chapter 1
When the NOT Gate has propagation delay, after it senses the input at t=0, it complements
the input after propagation delay.

Cascading of Inverters

Whenever o/p of one inverter act as an input to another inverter.

Two inverters in cascade

A B Y
t pd t pd

Three inverters in cascade


tpd t pd t pd
Boolean Algebra

A B C Y

5.
Chapter 1

NOT Gate with feedback


tpd
A Y
Boolean Algebra

6.
Chapter 1
y Apply trigger input at ‘A’ which means input is applied for a short duration
y O/p signal is again feedback to the i/p, Arrow in the timing diagram represents input-output
effect.
y Whenever input changes the output will change after tpd.

A B C Y

t pd 4t pd 7tpd
C

2tpd 5t pd

3tpd 6t pd

Boolean Algebra

7.
Chapter 1

AND Gate

Symbolic Representation
A, B are input, Y is the output

A
Y
B

Truth Table

A B Y

0 0 0

0 1 0

1 0 0

1 1 1

O/p = High when both inputs are high and if any input = low, then output = low
(a) Commutative law ⇒ A.B = B.A
(b) Associative law ⇒ (AB).C= A.(BC)
Boolean Algebra

8.
Chapter 1
A A
B Y B
C
C

(Fan-in=2) (Fan-in=3)

Truth Table

A B C Y = ABC

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 1
Boolean Algebra

9.
Chapter 1

Floating Input
y one of the i/p lines is not connected anywhere.

Floating : value = unknown


i/p

OR Gate

Symbolic Representation

A
Y=A+B
B

Truth Table

A B Y=A+B

0 0 0
Boolean Algebra

0 1 1

10.
Chapter 1
1 0 1

1 1 1

(1) Commutative Law


A+B=B+A

(2) Associative law


(A+B) + C = A + (B + C)

A
Y=(A+B)+C
B

(Fan-in=2)

OR

A
B Y= A + B +C
C

(Fan-in=3)

Truth Table

A B C Y=A+B+C

0 0 0 0

0 0 1 1
Boolean Algebra

0 1 0 1

11.
Chapter 1

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

Floating i/p
y Floating i/p is not connected to any value and it’s value is undetermined

A
floating
i/p

NAND GATE
Boolean Algebra

12.
Chapter 1
Symbolic Representation

A
B Y=A . B

Truth Table

A B Y= A ⋅ B

0 0 1

0 1 1

1 0 1

1 1 0

Commutative law
NAND Gate follows commutative law
AB = BA
Associative law
NAND Gate does not follow associative law.
AB ⋅ C ≠ A ⋅ BC

NOR Gate

Symbolic Representation
Boolean Algebra

A
X
B

13.
Chapter 1

Truth Table

A B X= A + B

0 0 1

0 1 0

1 0 0

1 1 0

Commutative Law
A +B =B+ A
NOR Gate is commutative

Associative law
(A + B) + C ≠ A + (B + C)
∴ NOT Associative.

A A + B

B
A +B+C
Boolean Algebra

14.
Chapter 1
Floating input
y Floating input can be made 0 or connected to existing i/p

A Y =A+ 0 =A
0 Works as inverter

A
Y =A+A=A

1. A + 0 = A
2. A + 1 = 0
3. A + A = A
4. A + A = 0

XOR Gate

Symbolic Representation

A X
B
Boolean Algebra

15.

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