Annexure ‘CD – 01’

UTTAR PRADESH

FORMAT FOR COURSE CURRICULUM

L T P/S SW/FW PSDA TOTAL

CREDIT
UNITS
Course Title: Digital Circuit Design
Course Credits: 6 3 0 4 2 5 6
Course Level: UG
Course Code: CSIT144

Course Objectives: This course aims to:

• Introduce students to the basic principles of digital fundamentals.

• make student familiar with fundamentals of computers, including number systems, logic gates, logic and arithmetic subsystems, and integrated circuits.

• Impart the practical skills necessary to work with digital circuits through problem solving and hands on laboratory experience with logic gates, encoders, flip-
flops, counters, shift registers, adders, etc.

• Make student able to analyze and design simple logic circuits using tools such as Boolean algebra and Karnaugh Mapping and will be able to draw logic
diagrams.

Course Focuses on: Employablity

Prerequisites: NIL

Course Contents / Syllabus:

Module I Fundamental of Digital Techniques 25% Weightage

 • Analog & digital signals,
• Decimal, Binary, Octal and Hexadecimal Number systems, Codes- BCD
• Boolean Algebra- Postulates and Theorems, D-Morgan’s theorems
• 1`s complement and 2`s complement,
• BCD subtraction using 9’s and 10’s complement methods,
• Introduction of weighted and non weighted codes
• BCD to Gray and Gray to BCD code conversion
• Standard representation of logical functions (SOP and POS forms,5-variable K-map simplification, don’t care
conditions
• XOR & XNOR simplifications of K-maps, Tabulation method.

Module II Combinational Circuits 25% Weightage

• Serial adder, Parallel Adder and Parallel subtractor

• Difference between serial and parallel adder,
• Multiplexer, de-multiplexer,
• decoder & encoder,
• code converters: BCD to Grey code, BCD to Excess-3 code converter
• BCD to seven segment decoder/encoder
• 1- & 2-bit comparators
• Implementation of logic functions using multiplexer/de-multiplexer and decoder, Implementation of 16×1 MUX
using 4×1 MUX, 4×16 decoder using 3×8 decoder etc.
• Logic implementations using PROM, PLA & PAL.

Module III Sequential Circuits 20% Weightage

• Difference between combinational and sequential circuits, Latch, Flip-flops: SR, JK, D & T flip flops – Truth
table,
• Excitation table, Conversion of flip-flops, set up and hold time, race around condition, Master Slave flip flop,
• Shift registers: SIPO, PISO, PIPO, SIPO,
• Bi-directional, 4-bit universal shift register;
• Counters: Asynchronous/ripple & synchronous counters – up/down,
• Ring counter, Johnson counter
• sequence detector.

Module IV Logic families & data converters 15% Weightage

 • Logic families: Special characteristics (Fan out, Power dissipation, propagation delay, noise margin),
• working of RTL, DTL, TTL,
• Wired logic, open collector output
• ECL and CMOS families
• RTL, DTL, TTL, ECL, CMOS, etc., their comparative study

Module V Data converters 15% Weightage

• Data converters: Special characteristics

• ADC – successive approximation,
• linear ramp, dual slope
• DAC – Binary Weighted
• R-2R ladder type

Course Learning Outcomes:

Students will be able to:

• Describe digital electronic circuit architectures

• Apply basic techniques for analyzing digital electronic circuits.
• Categorize logic gates combination.
• Apply and Examine wide range of digital applications, selecting and critically
• Judge suitable implementation methodologies.
Mapping of Graduate Attributes with Course Learning Outcomes (CLOs):

Bloom’s Level > Remembering Understanding Applying Analyzing Evaluating Creating

Course Learning Describe digital • Apply basic Categorize logic Judge suitable
Outcomes electronic circuit techniques for gates combination implementation
architectures analyzing digital methodologies
electronic circuits.
• Apply and Examine
wide range of digital
applications,
selecting and
critically
Graduate Attributes

Discipline Knowledge & ✓ ✓ ✓ ✓

Expertise

Self-Directed and Active ✓ ✓ ✓ ✓

Learning
Research and Enquiry ✓ ✓

Information & Communication ✓

Technology Skills
Critical Thinking & Problem- ✓ ✓ ✓
Solving Abilities
Communication Skills

Creativity, Innovation & ✓ ✓

Reflective Thinking
Analytical & Decision-Making ✓
Ability
Leadership & Teamwork

Multicultural Understanding &

Global Outlook
Integrity and Ethics

Social & Emotional Skills

Employability, Enterprise & ✓ ✓ ✓

Entrepreneurship
 Lifelong Learning

Environment & Sustainability

Pedagogy for Course Delivery:

The course would be covered under theory and laboratory. In addition to assigning project–based learning, early exposure to hands-on design to enhance the
motivation among the students. It incorporates designing of problems, analysis of solutions submitted by the student’s groups and how learning objectives were
achieved. Continuous evaluation of the students would be covered under quiz, viva etc.

List of Professional Skill Development Activity

1. To verify De Morgan’s Theorem.

2. Implementation and verification of 3:8 Decoder using logic gates.
3. Design code converter for Excess-3 code to BCD code
4. Implementation and verification of Master Slave J-K Flip Flop.
5. Design a circuit using Serial in Parallel out Shift Register

List of Lab Experiment

• To study and verify the truth tables of basic logic gates

• a) To study and verify Boolean expressions using logic gates. b) to implement Boolean functions using logic gates in both SOP and POS forms.
• To design half adder, full adder, half subtractor, full subtractor using gates and verify their truth tables.
• To design and verify half subtractor, full subtractor using a) AND-OR logic, b) NAND-NAND logic and verify their truth tables
• To implement control circuit using multiplexer.
• To design and verify a 4bit adder.
• To design and verify decoder/de-multiplexer and encoder using logic gates.
• To design and verify Priority encoder.
• To design and verify the operation of magnitude comparator
• To design a BCD to seven segment decoder converter and verify the truth table.
• To design code converter for BCD to Grey code
• To design a 4-bit BCD to Excess-3 code converter.
• To verify the truth table of R-S, D, J-K and T-flip flops.
• To design a 3-bit ring counter.
• To design a 3-bit Johnsen counter
• To design a 3-bit asynchronous UP-counter using J-K flipflops.
• To design a 4-bit asynchronous down-counter using J-K flipflops.
• To design a 4-bit synchronous up counter using J-K flip flops
• To design a 3-bit synchronous Down counter using J-K flip flops
• To design a 4-bit serial in serial out shift register.
• To design and study a sequence detector.

Assessment/ Examination Scheme:

Theory L/T (%) Lab/Practical/Studio (%) Total

66.66% 33.34% 100%

Theory Assessment (L&T):

Continuous Assessment/Internal Assessment (40%) End Term

Examination

Components (Drop Class Test Viva Quiz PSDA Attendance

down)
Linkage of PSDA Home Seminar GD
with Internal Assignment
Assessment
Component, if any
 Weightage (%) 10 3 5 7 5 5 5 60%

Lab Assessment (P):

Continuous Assessment/Internal Assessment End Term

Examination
Components (Drop
down)
Class Test Lab Record Performance Attendance Viva
(Lab Based)

Weightage (%)

10% 10% 10% 5% 5% 60%

Mapping of Assessment Components with CLOs:

Blooms Level Remembering Understanding Applying Analyzing Evaluating Creating

Course Outcome Describe digital • Apply basic Categorize Judge suitable

electronic circuit techniques logic gates implementation
architectures for analyzing combination methodologies
digital
electronic
circuits.
Assessment • Apply and
Components Examine
wide range
of digital
applications,
selecting
and critically

PSDA1 √

PSDA2 √

PSDA3 √

PSDA4 √
 PSDA5 √

Class Test √ √ √ √

Class Test (Practical) √ √ √ √

Assignment √ √ √ √

Viva √ √ √ √

Lab Records √ √ √ √

Performance √ √ √ √

GD √ √ √ √

Quiz √ √ √ √
Text:

• Moris Mano : Digital Design, fourth edition Pearson Education India, 2018, ISBN -8131714500, 9788131714508.
• R. P. Jain: Modern Digital Electronics, fourth edition Tata McGraw-Hill Education, 2018 , ISBN 0070669112, 9780070669116.
• Thomas L. Floyd: Digital Fundamentals, 12th edition Pearson Education India, 2011,ISBN 813173448X, 9788131734483.
• Malvino and Leech: Digital Principles & Applications, 7th edition Tata McGraw Hill,1995 ,ISBN 0070141703, 9780070141704.
.

Web reference:

https://www.tutorialspoint.com/digital_circuits/digital_circuits_logic_gates.htm