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DLD Lecture 6 chp6

Digital design and logic 5th edition chap 6

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0% found this document useful (0 votes)
16 views14 pages

DLD Lecture 6 chp6

Digital design and logic 5th edition chap 6

Uploaded by

ptisuppoter15080
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Chapter 6

REGISTERS AND COUNTERS


Sequential Circuits Cont.
• Characteristic Tables:
COUNTER
• A counter is essentially a register that goes through a predetermined
sequence of binary states.
• The gates in the counter are connected in such a way as to produce
the prescribed sequence of states.
COUNTERS (Cont.)
• A register that goes through a prescribed sequence of states upon the
application of input pulses is called a counter .
• The input pulses may be clock pulses, or they may originate from
some external source and may occur at a fixed interval of time or at
random.
• The sequence of states may follow the binary number sequence or
any other sequence of states. A counter that follows the binary
number sequence is called a binary counter . An n ‐bit binary counter
consists of n flip‐flops and can count in binary from 0 through 2n - 1.
Ripple counters and Synchronous counters.
• In a ripple counter, a flip‐flop output transition serves as a source for
triggering other flip‐flops. In other words, the C input of some or all
flip‐flops are triggered, not by the common clock pulses, but rather
by the transition that occurs in other flip‐flop outputs.

• In a synchronous counter, the C inputs of all flip‐flops receive the


common clock. Synchronous counters are presented in the next two
sections.
• Here, we present the binary and BCD ripple counters and explain
their operation.
Binary Ripple counters

• A binary ripple counter consists of a series connection of


complementing flip‐flops, with the output of each flip‐flop connected
to the C input of the next higher order flip‐flop.
Binary Ripple counters
BCD Ripple Counter

• A decimal counter follows a sequence of 10 states and returns to 0


after the count of 9. Such a counter must have at least four flip‐flops
to represent each decimal digit, since a decimal digit is represented
by a binary code with at least four bits. The sequence of states in a
decimal counter is dictated by the binary code used to represent a
decimal digit.
BCD Ripple Counter
SYNCHRONOUS COUNTERS
• Synchronous counters are different from ripple counters in that clock
pulses are applied to the inputs of all flip‐flops. A common clock
triggers all flip‐flops simultaneously, rather than one at a time in
succession as in a ripple counter.

Two types:
• Binary Counters
• Up-down Counters
Binary Synchronous Counter

The design of a synchronous binary counter is so simple that there is no


need to go through a sequential logic design process. In a synchronous
binary counter, the flip‐flop in the least significant position is
complemented with every pulse.
A flip‐flop in any other position is complemented when all the bits in the
lower significant positions are equal to 1 .
Binary Synchronous Counter
Up–Down Binary Counter

• A synchronous countdown binary counter goes through the binary states in


reverse order, from 1111 down to 0000 and back to 1111 to repeat the
count. It is possible to design a countdown counter in the usual manner, but
the result is predictable by inspection of the downward binary count. The
bit in the least significant position is complemented with each pulse.
• A bit in any other position is complemented if all lower significant bits are
equal to 0.
• For example, the next state after the present state of 0100 is 0011. The
least significant bit is always complemented. The second significant bit is
complemented because the first bit is 0. The third significant bit is
complemented because the first two bits are equal to 0.
• But the fourth bit does not change, because not all lower significant bits are
equal to 0.
Up–Down Binary Counter

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