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Second IA QB

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N M Shishir
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12 views1 page

Second IA QB

mn mn

Uploaded by

N M Shishir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Module 2

1What is a decoder? Explain with block diagram.


2. Explain 2x4 decoder with truth table and circuit diagram.
3.Explain 3x8 decoder with truth table and circuit diagram
4. Implement full adder using 3x8 decoder
5. What is an encoder? Explain with block diagram.
6. Explain 4-to-2-line encoder with truth table and block diagram.
7.Explain 8-to-3-line encoder with truth table and block diagram.
8. What is the need for priority encoder
9.What is a Multiplexer? Explain with block diagram.
10. Explain 2 to 1 line multiplexer with truth table and circuit diagram.
11. Explain 4 to 1 line multiplexer with truth table and circuit diagram.
12. Differentiate / compare combinational and sequential circuits
13.Explain the operation of SR latch with neat circuit diagram and logic symbol.
14 Explain the operation of Master slave D Flip-Flop, JK flipflop with neat circuit diagram.
15. Obtain Characteristic Equations for JK, D and T Flip-Flops from their Characteristic
Tables
16. Write Characteristic Tables for JK, D and T Flip-Flops and explain

Module3
1. Explain the Big Endian and Little Endian methods of Byte addressing with suitable
examples.
2. With a diagram explain different functional units of a computer
3. Explain Single Bus structure in a computer.
4. Write the basic performance equation and explain the role of each parameter in the
equation
5. What is an addressing mode? explain any four addressing modes with suitable examples
6. Write a program to evaluate the arithmetic statement Y =(A+B) * (C+D) using three
address, two address, one address and zero address instructions.
7. What is an addressing mode? explain any four addressing modes with suitable examples.
8. Explain with example: i) three address instruction ii) two address instruction and iii) one
address instruction.

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