L2Reportfklklfnw
L2Reportfklklfnw
This lab demonstrates the universality of NAND and NOR gates by constructing various logic gates using
only these gates.
Objective:
To implement AND, OR, and NOT functions using only NAND gates.
To implement AND, OR, and NOT functions using only NOR gates.
To understand the advantage of NAND and NOR gates in digital circuits.
Methodology:
1. Implemented AND, OR, and NOT functions using only NAND gates, following the provided
circuit diagrams.
2. Verified the outputs for each gate by testing the circuits using switches for input and LEDs for
output indication.
3. Repeated the same procedure using NOR gates to create equivalent AND, OR, and NOT gates.
4. Documented the results to ensure they matched the expected truth tables.
Equipment/Tools:
Proteus 8 software
Tasks:
Part 1: NAND Gate Implementations
Task 1: Verify AND function using only NAND gates
Post-Lab Tasks:
1. Design XOR, XNOR, and NOR gates using only NAND gates.
2. Design NAND, XOR, and XNOR gates using only NOR gates.
Conclusion:
This lab successfully demonstrated that NAND and NOR gates can replicate the functionality of other logic
gates, validating their universality. The results were verified through both manual testing and Proteus
simulations, confirming the practical relevance of using these gates in digital design.