HỌC VIỆN CÔNG NGHỆ BƯU CHÍNH VIỄN THÔNG

BÀI GIẢNG MÔN

CHUYÊN ĐỀ CÔNG
NGHỆ BÁN DẪN

Giảng viên: Chu Văn Bền

Điện thoại/E-mail: [email protected]
Bộ môn: Điện Tử Máy Tính - Khoa KTĐT1
Học kỳ/Năm biên soạn: Học kỳ 1 năm 2024 – 2025
 Tài liệu tham khảo/References
1. The Physics of Semiconductors, Marius Grundmann,
Springer 2006.
2. Physics of Semiconductor devices 3rd Ed., S. M. Sze
and Kwok K. Ng, John Wiley & Sons 2007.
3. Introduction to Semiconductor Manufacturing
Technology, Hong Xiao, SPIE 2012.
4. Special Topics on Semiconductor Physics for Nano
Science, Dr. Mingkailee, Lecture notes, Dongguk
University.
5. Semiconductor Packaging, Assembly, and Test. Lecture
notes, Arizona State University
6. Semiconductor Chip Market Reports,
custommarketinsight.com
 Nội dung/Content
CHƯƠNG I- CÁC XU HƯỚNG CÔNG NGHIỆP BÁN DẪN
CHƯƠNG II- VẬT LIỆU BÁN DẪN
CHƯƠNG III- CÔNG NGHỆ THIẾT KẾ BÁN DẪN TIÊN TIẾN
CHƯƠNG IV- CÔNG NGHỆ SẢN XUẤT VÀ THỬ NGHIỆM
BÁN DẪN TIÊN TIẾN
CHƯƠNG V- CÁC CÔNG NGHỆ BÁN DẪN TƯƠNG LAI
CHƯƠNG I- CÁC XU HƯỚNG CÔNG NGHIỆP
BÁN DẪN/Trends in Semiconductor Technology

• 1.1 Thị trường bán dẫn và cạnh tranh

• 1.2 Chuỗi cung ứng bán dẫn
• 1.3 Bảo vệ môi trường
• 1.4 Làm việc trong phòng sạch
• 1.5 Các thiết bị/công nghệ bán dẫn chính và lịch sử
 1.1 Thị trường bán dẫn và cạnh tranh/
Semiconductor market and competitive
• Bán dẫn trong cuộc sống/Semiconductors in life:

5
 Why Are Semiconductors So Important?

• Semiconductors are crucial components of some of the newest technologies,

including artificial intelligence, quantum computing, and the Internet of Things.
• The semiconductor industry is also of strategic importance from a national security
perspective, as it is a vital input in the defense industry, especially as technology
itself is becoming weaponized
 Semiconductor Market

• By Component: Logic Devices, Microprocessor unit (MPU), Power

Devices, Micro Controller Unit (MCU), Analog IC, Memory Devices,
Sensors, Discrete Power Devices, and Others;
• By Application: Data Processing, Industrial, Networking &
Communications, Consumer Electronics, Automotive, and Government)
 Semiconductor market size

• The global semiconductor market size was valued at USD 544.78

billion in 2023 and is expected to reach around USD 1,137.57 billion
by 2033.
 Global Chip market

Compound annual growth rate (CAGR) of 7.1% .

Global Chip market by component
 Global Chip market by node size

Ref: https://www.custommarketinsights.com/report/semiconductor-chip-market/
1.2 Chuỗi cung ứng bán dẫn/ Semiconductor
Supply Chain
Shares of imported goods in the semiconductor supply chain
Shares of exported goods in the semiconductor
supply chain
 What Factors Have the Potential To Disrupt
the Semiconductor Supply Chain?
• Geopolitical environment characterized by rule-based international
institutions, liberalized trade policies, and stable trade partnerships.
• Covid bluntly demonstrated the vulnerability of international supply chains
to unexpected events.
• These disruptions can result in choke points at any place within the supply
chain, from logistics to critical raw materials deliveries and the supply of
capital and labor. Supply chains are also susceptible to geopolitical risks.
• The wars (in Ukraine, Middle East)
• Semiconductors are also currently at the center of escalating trade tensions
and an intensifying technology rivalry between the US and China.
 Global Semiconductor Competition
• The semiconductor industry is heavily subsidised by
governments around the world, the same ones that have
recently strengthened their commitments to climate action.
• The United States recently passed the CHIPS Act of 2022,
which drew bipartisan support. This historic piece of
legislation allocates US$53 billion to support chip
manufacturing and bolster US competitiveness.
• Meanwhile, the EU will mobilise more than Є43 billion of
public and private investments to address semiconductor
shortages and strengthen Europe’s technological leadership.
• Nevertheless, Asia remains the dominant player in
semiconductor manufacturing.
 Global Semiconductor Competition
• Taiwan’s semiconductor industry is worth an incredible US$147
billion, equivalent to 15% of the country’s GDP.
• Taiwan offers incentives to attract overseas talent and suppliers of
materials and equipment needed to manufacture chips. Its
government also encourages domestic companies to develop
technologies vital to supporting the growth of the island’s
semiconductor industry.
• Similarly, Mainland China is aiming to achieve technology
independence as its own technology sector relies predominately on
foreign chips.
1.3 Environment protection/Bảo vệ môi trường
• Semiconductors are the basic building blocks of modern
computing. They are vital components of all electronic systems,
from smartphones to cars. But the environmental cost of
manufacturing them is becoming increasingly problematic.
• Energy demand is rising as chip design grows more intricate, with
the manufacturing of advanced 3nm chips (N3) predicted to
consume up to 7.7 billion kilowatt-hours annually.
• Semiconductors also facilitate the transition toward a green
economy. Decarbonisation efforts will increase the usage of
renewable energy and electric vehicles around the world, driving
demand for chips.
• The number of power semiconductors used in the global
renewable energy market is expected to grow with a compound
annual growth rate (CAGR) of 8% to 10% from now to 2027.
Vital Components of the Green Transition

• While their manufacturing process can adversely impact

the environment, semiconductors play a fundamental
role in the development of green technologies.
• They harness, convert, transfer and store renewable
energy as electricity and subsequently move it onto the
electric grid with minimal loss of power.
• Semiconductors also enable responsive and efficient
use of electricity through IoT technology, ensuring
supply is matched to demand and current is well-
distributed.
• Both solar panel systems and wind turbines are highly
dependent on semiconductor technology.
Vital Components of the Green Transition

• Semiconductors are also necessary for producing electric vehicles

(EVs) and charging stations.
• On average, electric cars have about 2,000 chips, roughly double
the number of chips in a non-electric car.
• As the nervous system of electronic materials, chips drive
innovation in the automobile industry. They allow vehicles to
become smarter and safer by controlling every feature from breaks
to parking cameras.
• EVs have become a significant growth sector for the
semiconductor industry. In 2020, the global stock of electric cars
reached 10 million vehicles, a 43% increase over 2019.
• The boost in consumer demand for EVs has been driven by
several factors, including government incentives, regulatory
policies, and improvements in semiconductor design which have
increased battery life and lowered the cost of vehicles.
Vital Components of the Green Transition

• Renewable power generation costs have also decreased

significantly over the past decade.
• A report by the International Renewable Energy
Agency (IRENA) shows that 62% of total renewable
power generation added in 2020 had lower costs than
the cheapest new fossil fuel option.
• Such achievement was due in part to the steady
improvement of energy-saving technologies empowered
by semiconductors devices.
 Vital Components of the Green Transition

• For over a decade, semiconductor companies have been trying to

mitigate the environmental impact of their business operations.
• Sustainability has now become an increasingly important factor within
the industry.
• As global demand for semiconductors continues to surge, a smaller
carbon footprint must become a key priority among manufacturers that
are working to increase capacity.
• The manufacturing chain for semiconductors is remarkably complex and
relies on hundreds of different inputs. Therefore, reducing GHG
emissions across the value chain requires significant collaboration.
• A cohesive and collaborative approach must also include efforts from
end-users and regulators who should advocate for a fundamental
change in the industry. To achieve this, we may consider making
government funding contingent upon the ability to meet surging
demand sustainably.
 1.4 Cleanroom/Phòng sạch
Definition of a cleanroom

• A cleanroom is a controlled environment

that has a low level of pollutants such as
dust, airborne microbes, aerosol particles,
and chemical vapors
• The requirement of a cleanroom is one
reason IC fabs are so expensive
• Tiny particles can cause defects on a
microelectronic device and circuit
• IC chips must be manufactured inside a
cleanroom to achieve acceptable
• A smaller feature size requires a higher
grade of cleanliness in the cleanroom.
 Definition of a cleanroom
• The M-1 class cleanroom allows
less than 10 particles larger than
0.5 µm in a cubic meter, or less
than 0.28 particles larger than 0.5
µm per cubic foot
• Class 10 is defined as less than 10
particles with diameters larger than
0.5 µm per cubic foot. Class 1 is
defined as less than 1 particle with
diameters larger than 0.5 µm per
cubic foot.
• A fab making IC chips with a
minimum feature size of 0.25 µm
needs a class-1 cleanroom to
achieve an acceptable yield Number of airborne particles in
the cleanroom
 Contamination control

• Particles on a wafer can cause defects

• Imaging of particles on the clear area of a mask or
reticle can cause pinholes

Effects of particle contamination

Effects of particle contamination
during the ion implantation process
on a photomask
 Basic cleanroom structure

• A cleanroom is usually located

on a raised floor with grid
panels, allowing airstream to
flow vertically from the ceiling
to the facility area underneath
the cleanroom.
• Airflow returns to the
cleanroom through a high-
efficiency particulate air
(HEPA) filter, which removes
most particles carried by the
airflow.
• Wafers are carried inside a
sealed FOUP and are only
exposed to airflow in the
processing or metrology
equipment
 1.5 Major semiconductor devices/technologies
and history

• Metal-semiconductor contact
• The earliest systematic study of semiconductor devices is generally
attribute to Braun
• 1874, discovered resistance between metals and meta sulfides
o He noted that current flows freely in only one direction at the
contact between a metal point and a Galena crystal (lead sulfide).
o Depend on the magnitude and polarity of the applied voltage
 Major semiconductor devices
• Light emitting diode
• By Round in 1907
• Applied a potential of 10V
between two points on the
carborundom crystal
• The generation of yellowish
light

Morden LED
Major semiconductor devices
• Point-contact transistor
• Invented by J. Bardeen and W.
H. Brattain, 1947
• Semiconductor
• Germanium
• The two point contact
separated by about 50um
• The bipolar transistor is a key
semiconductor device and has
ushered in the modern
electronic era

29
 Major semiconductor devices
• P-N junction
• 1949, Shockley
• Thyristor
• 1952, Ebers developed the
basic for thyristor
• Is an extremely versatile
switching device
• Solar cell
• 1954, Chapin, Fuller and
Pearson
• Convert sunlight directly to
electricity Nobel Prize winning American physicists
(L-R) John Bardeen (1908 - 1991),
William Shockley (1910 - 1989) and
Walter Brattain (1902 - 1987)
Major semiconductor devices
• Heterojunction bipolar transistor
• 1957, Kroemer
• Improve the transistor performance
• Potentially one of the fastest semiconductor devices
• Tunnel diode
• 1958, Esaki
• Observed negative resistance characteristics in a
heavily doped p-n junction
• Lead to the discovery of the tunnel diode
• For ohmic contact and carrier transport through a thin
layer
Major semiconductor devices
• MOSFET
• 1960, Kahng and Atalla
• The most important
device for advanced IC
• Gate length=20μm, gate
oxide thickness=100nm,
aluminum gate
• The choice of Si and
thermal oxide remain
the most important Martin Atalla (left) and Dawon Kahng (right)
combination of
materials
 Major semiconductor devices
• Laser
o 1962, Hall et al
o First achieved lasing in
semiconductor Robert N. Hall
Pioneer in
• Heterostructure laser semiconductors
o 1963, Kroemer, Alferov and
Kazarinov
o Laid the foundation for modern
laser diodes
o Can be operated continuously at
room temperature
 Major semiconductor devices

• Transferred-electron diode • IMPATT diode

(TED) • 1965, Johnston et al.
• 1963, Gunn • Can generate highest
• Gunn diode continuous wave power at
• Is used in millimeter- millimeter wave frequencies
wave application • Used in radar and alarm
• Detection system, system
remote controls and • MESFET
microwave test • 1966, Mead
instruments
• A key device for monolithic
microwave integrated circuits
(MMIC)
 Major semiconductor devices

• Nonvolatile semiconductor memory • Charge-coupled device (CCD)

(NVSM) o 1970, Boyle and Smith
o 1967, Kahng and Sze o Used in video camera and in
o Can retain its stored information optical sensing application
when the power supply is
switched off
o The addition of floating gate
o Semipermanent charge
storage is possible
o Nonvolatility • Resonant tunneling diode (RTD)
o High device density, low- o 1974, Chang et al.
power consumption and o The basis for most quantum-
electrical rewritability effect device
Types of memory
 Major semiconductor devices
• MODFET • Single-electron memory
o Modulation doped cell (SEMC)
field-effect transistor o 1994, Yano et al.
o 1980, Minura et al. o Floating gate ultra-small
o Is expected to be the dimension (10nm)
fastest field-effect
transistor
• 20 nm MOSFET
o With the proper o 2001, Chau
selection of
heterojunction materials

Evolution of MOSFETs from classical to nanowire FETs

 Key semiconductor technologies
• Czochralski crystal growth
o 1918, Czochralski
o A liquid-solid
monocomponent growth
technique
• Bridgman crystal growth
o 1925, Bridgman
o For the growth of gallium
arsenide and related
compound
semiconductor crystals

Si ingot
 Key semiconductor technologies

• III-V compounds:
o 1952, Welker
o He note that gallium
arsenide and its related III-V
compound were
semiconductors
o Able to predict their
characteristics and to prove
them experimentally
 Key semiconductor technologies
• Diffusion • Lithographic photoresist
o 1952, Pfann o 1957, Andrus
o The basic diffusion theory o He used photosensitive
was considered by Fick in etch-resistant polymers
1855 for pattern transfer
o The idea of using o A key technology for
diffusion techniques to semiconductor industry
alter the type of o The continued growth of
conductivity in silicon the industry has been the
was disclosed in a patent direct result of improved
in 1952 by Pfann lithographic technology
o A significant economic
factor
 Key semiconductor technologies

• Oxide masking
• 1957, Frosch and Derrick
• Oxide layer can prevent most
impurity atoms from diffusion
through it
• Epitaxial CVD growth
• 1957, Sheftal, Kokorish and
Krisalov

CVD growth system

 Key semiconductor technologies

• Hybrid integrated circuit

o 1959, Kilby
o It contain one bipolar transistor,
three resistor, and one capacitor
o Made in germanium
o Connected by wire bonding
• Monolithic integrated circuit
o 1959, Noyce
o Contain six device
o Connecting the devices by aluminum
metallization
o Etching evaporated aluminum layer
over the entire oxide surface using
the lithographic technique
 Key semiconductor technologies
• Planar process
o 1960, Hoerni.
o An oxide layer is formed on a semiconductor
surface
o Window cuts ➔impurity diffuse only through
the exposed semiconductor surface ➔p-n
junction formed in the oxide window area
• CMOS
o 1963, Wanlass and Sah
o Employs both nMOS and pMOS to form the
logic element
o Draw little current
o Low power consumption
o Is the dominant technology for advanced ICs
Key semiconductor technologies
• DRAM
o 1967, Dennard
o Contain one MOSFET and one charge-storage
capacitor
o MOSFET as switch
o The first choice among various semiconductor
memories
• Polysilicon self-aligned gate
o 1969, Kerwin et al.
o Improve device reliability
o Reduce parasitic capacitances
 Key semiconductor technologies

• MOCVD • Molecular Beam Epitaxy (MBE)

o 1969, Manasevit et al. o 1971, Cho
o Very important epitaxial o Has the advantage of near-
growth technique for perfect vertical control of
compound semiconductor composition and doping
• Dry etching down to atomic dimensions
o 1971, Irving et al. o Photonic device and
quantum-effect devices
o Was developed to replace
wet chemical etching for high-
fidelity pattern transfer
o CF4-O2 gas mixture to etch
silicon wafer

MBE system
 Key semiconductor technologies
• Microprocessor
• 1971, Hoff, et al.
• Put the entire central
processing unit of a
simple computer to a
chip
• Four bit microprocessor
• Chip size 3mmx4mm
• Contain 2300 MOSFETs,
using 8um design rule
 Key semiconductor technologies
• Trench isolation • Copper interconnect
• 1982, Rung et al. • 1993, Paraszczak et al.
• In 1982 to isolate CMOS • Al suffers from
devices electromigration at high
• Eventually replace all electrical current
other isolation method • Copper is replaced
• Chemical-mechanical aluminum for minimum
polishing feature length
approaching 100 nm
• 1989, Davari et al.
• For global planarization
of interlayer dielectrics
• This is a key process for
multilevel metallization
The growth curves for different technology drivers

• 1950-1970
• The bipolar transistor
• 1970-1990
• The DRAM and the
microprocessor based on
MOS devices
• Because of PC and
advanced electronic
systems
• Since 1990
• Nonvolatile semiconductor
memory
• Because of the
portable electronic
systems
 Moore’s Law

• Moore’s Law is the observation that the number of transistors on an integrated

circuit will double every two years with minimal rise in cost.
• Intel co-founder Gordon Moore predicted a doubling of transistors every year for
the next 10 years in his original paper published in 1965. Ten years later, in 1975,
Moore revised this to doubling every two years.
• This extrapolation based on an emerging trend has been a guiding principle for
the semiconductor industry for close to 60 years
Scaling (Chip area, Energy)

Nature Electronics (Nat Electron)

CHƯƠNG II- VẬT LIỆU BÁN DẪN

2.1. Giới thiệu chung

2.2. Các loại vật liệu bán dẫn
2.3. Các tính chất của vật liệu bán dẫn
• Tính chất tinh thể
• Tính chất vật lý
• Tính chất hóa học
 2.1 Giới thiệu chung/General introduction
• Semiconductors are materials that exhibit electrical conductivity between
that of a conductor and an insulator. This unique property allows them to
control the flow of electricity, making them ideal for use in electronic
devices.
 General introduction
• Semiconductors have unique properties that make
them ideal for electronic applications. Their
conductivity can be controlled by impurities,
temperature, or applied voltage.
Conductivity Doping
Their conductivity is Introducing impurities
intermediate between that (dopants) can alter their
of conductors and insulators, conductivity, creating p-type
allowing for controlled flow or n-type semiconductors.
of electricity.
Temperature Dependence Voltage Dependence
Their conductivity increases Their conductivity can be
with temperature, unlike controlled by applying an
metals which decrease. external voltage.
 General introduction
Material Properties Applications
http://upload.wikimedia.org/wikipedia/commons/thumb/e/e9/SiliconCroda.jpg/250px-SiliconCroda.jpg

Abundant, high purity Integrated

Silicon (Si) achievable, well- circuits, solar
understood properties cells, transistors
File:Germanium.jpg

High mobility, good for

Germanium Transistors,
high-frequency
(Ge) detectors
applications
Higher electron
LEDs, lasers,
Gallium Arsenide mobility than Si,
high-speed
(GaAs) suitable for high-
transistors
speed devices
Periodic table
 Dải vùng cấm (Bandgap)

Orbital structure of a single atom Bandgap

• The bandgap is the minimum energy required for an electron to
transition from the valence band to the conduction band.
• Valence Band
The valence band is the highest energy level that electrons can occupy at absolute zero
temperature.
• Conduction Band
The conduction band is the lowest energy level that electrons can occupy when they are
excited to higher energy states.
2.2 Các loại vật liệu bán dẫn
Element semiconductors

• Germanium File:Germanium.jpg

• In the early 1950s, was the major

semiconductor material
• Use for fiber-optic, infrared optics,
SiGe
• Silicon http://upload.wikimedia.org/wikipedia/commons/thumb/e/e9/SiliconCroda.jpg/250px-SiliconCroda.jpg
http://upload.wikimedia.org/wikipedia/commons/thumb/5/5d/Silicon_wafer_with_mirror_finish.jpg/171px-Silicon_wafer_with_mirror_finish.jpg

• Better device properties

• High quality silicon dioxide
• Cheaper
• Abundant
Compound semiconductor

Ref: Semiconductors Data

Handbook, Springer
2.3 Tính chất của các chất bán dẫn/Properties of
Semiconductors
Three general types of crystals

 Amorphous materials have order only within a few atomic or

molecular dimensions.
 Polycrystalline materials have a high degree of order over
many atomic or molecular dimensions. These ordered region
vary in size and orientation with respect to one another.
 Single crystal materials have a high degree of order, or
regular geometric periodicity, throughout the entire volume
of the material.

grain
grain boundary
(a)amorphous (b)polycrystalline (c)single crystal
Unit cell

R=ma+nb+lc
R: lattice point
 Basic cubic-unit cells

 Body centered cubic

 Simple cubic
 Additional an atom at the center
 Has an atom at each corner
 Each atom has eight nearest-
 Each atom has six
equidistant nearest- neighbor atoms
neighbor atoms  Sodium (Na), Tungsten (W)
 Lattice constant: a  Face-centered cubic
 Polonium (Po)  Additional an atom at each face
 Each atom has 12 nearest-neighbor
atoms
 Aluminum (Al), copper (Cu), gold (Au)
and platinum (Pt)
Simple cubic
 FCC
Picture of lattice; Click for
Big Picture
 The diamond structures

• The element semiconductors

• Silicon and germanium
• Belongs to fcc crystal family
• Two interpenetrating fcc
sublattices with one sublattice
displaced from the other by
one-quarter of the distance
along the body diagonal of the cubic
• A displacement of a 3 / 4
• A unit cell of a diamond lattice consists of a tetrahedron
• Each atom is surrounded by four equidistant nearest
neighbors
• III-V compound semiconductor
• Zincblende lattice
• One fcc sublattice has column III atoms and the other
has column V atoms
 Example
At 300K the lattice constance for silicon is 5.43 Angstrom. Calculate the number of silicon
atoms per cubic centimeter and the density of Silicon at room temperature?
Atomic weight: 28.09 g/mol
Avogadro constant: 6.02 x 10^23 (atoms/mol)

Si unit cell

Hint:
No of atoms/unit cell?
No of atoms/cm^3 ?
Density =No of atoms/cm^3 x atomic
weight/Avogadro constant
 Zincblende Structure
• The zincblende (sphalerite,
ZnS) structure has a FCC lattice
with a diatomic base. The
metal (A) atom is at (0, 0, 0)
and the nonmetal (B) atom is
at (1/4, 1/4, 1/4)a
• Many important compound
semiconductors, such as GaAs,
InAs, AlAs, InP, GaP and their
alloys, but also the II–VI
compounds ZnS, ZnSe, ZnTe,
HgTe, CdSe and CdTe crystallize
in the zincblende structure
 Wurtzite structure
• Hexagonal structure
• CdS, ZnS, GaN, ZnO, AlN
 Isolated silicon atom

• Has 14 electrons
• 10 electrons occupy
deeplying energy level
• The four remaining
valence electron
• Weakly bound
• Involved in chemical reactions
• The 3s subshell has two allowed quantum states per atom
• Contain two valence electron at T=0K
• The 3p subshell has six allowed quantum states per atom
• Contain the remaining two valence electrons
 Energy band
• Obtained by solving the Schrodinger equation of an
approximate one-electron problem.

• The general features

• There is a bandgap Eg
• Near Ec,min and Ev,max the E-p curves are
essentially parabolic
• Silicon
• The maximum in the valence band occurs at
p=0, but the minimum in the conduction
band occurs along the [100]
direction at p=pc
• Electron transition from Ev to Ec
need
• Energy change
• Momentum change
• Indirect bandgap
 Energy band
• GaAs
• Ec,min and Ev,max occurs at the
same
momentum p=0
• Direct bandgap
• Very important for LED and
semiconductor lasers
• Require direct
semiconductor for efficient
generation of photons
 The variation of bandgaps with temperature

The temperature coefficient dEg/dT is negative for both

semiconductors. Some semiconductors have positive dEg/dT; for
example, the bandgap of PbS (Appendix F) increases from 0.286 eV at
0 K to 0.41 eV at 300 K.
Conduction in metals semiconductors and insulators
• Metals  Semiconductors
• The conduction band  Much smaller energy gap
 Si:1.12 eV. GaAs: 1.42 eV
• Partially filled (Cu)
 At 0 K
• Overlaps the valence band (Zn or Pb)
 The valence band are full
• Electron are free to move with only  The conduction band are empty
a small applied field
 At room temperature
• There are many unoccupied  Appreciable numbers of electron
states close to the occupied are thermally excited from the
energy states valence band to the conduction
• Insulator (such as SiO2) band
• The valence electron form strong
bonds between neighboring
atoms difficult to break  no
free electron to participate in
current conduction
• Large band gap
• The valence band are full
• The conduction band are empty
 Valence bands
• The tetrahedron bonds of a diamond lattice
• Covalent bonding
• Each has four electrons in the outer orbit, and each atom
shares theses valence electrons with its four neighboring
• Each electron pair constitutes a covalent bond
• Occurs between atoms of the same element or between
atoms of different elements that have similar outer-shell
electron
• Gallium arsenide
• Covalent bond and small
ionic
• The paired bonding
electrons spend
slightly more time in the
As atom than in the Ga
atom
 Fermi-Dirac distribution

• The probability that an electron occupies an

electronic state with energy E is given by Fermi-
Dirac distribution function

F (E ) =
1
1 + e ( E − EF )/ kT
F (E )  e −( E − EF )/ kT for (E − E F )  3kT
F (E )  1 − e ( E − EF )/ kT for (E − E F )  −3kT

• As E=EF, F(E)=1/2
 Intrinsic carrier concentration
• Intrinsic semiconductor • Thermal agitation
• Contains relatively • Excitation of electrons
small amounts of from the valence band
impurities compared to the conduction band
with the thermally and leaves an equal
generated electrons and number of holes in the
holes valence band
n(E )dE =  N (E )F (E )dE
Etop Etop
n=
0 0
 Intrinsic carrier concentration

The Fermi level for an intrinsic

semiconductor

To integral

Where NC is the effective density states in the conduction band

 Intrinsic carrier concentration

• The intrinsic carrier

concentration at 300K
• 9.65x109 cm-3 for Si
• 2.25x106 cm-3 for GaAs
• The larger the bandgap,
the smaller the intrinsic
carrier concentration
 Doping in semiconductor
Si: 3s2 3p2
P: 3s2 3p3 Donor
B: 3s2 3p1 Acceptor

(a) Intrinsic Si with no impurity. (b) n-type Si with donor

(phosphorus). (c)p-type Si with acceptor (boron).
 Donors
• When a semiconductor is
doped with impurities
• Extrinsic semiconductor
• The impurity energy level are introduced
• N-type Si with donor
• Arsenic atom with five valence
electron
• Covalent bonds with its four
neighboring Si atoms
• The fifth electron
• Relatively small bonding energy to
its host arsenic atom
• Be “ionized” to become a
conduction electron
• The arsenic atom is called a donor
• Silicon become n-type
• Because the addition of the negative
charge carrier
 Acceptors

• P-type Si with acceptor

• Boron atom with three valence electron
• An additional electron is
“accepted” to form four
covalent bonds around the boron
• A positive charged
“hole” is created in
the valence band
• Boron is an acceptor
Ionization energies for various
impurities in Si and GaAs

We can estimate the ionization

energy for the donor ED
2
 0   mn 
E D =     E H
 s   m0 

The ionization energy for donor,

is 0.025 eV for Si, and 0.007 for
gallium arsenide
 Extrinsic semiconductor
• Nondegenerate semiconductor
• Electron or hole concentration is much lower than the
effective density of states in the conduction band or
the valence band, respectively.
• The Fermi level EF is at least 3kT above EV or 3kT below
EC
• Complete ionization
• For electron
• electron density n=ND
• EC-EF=kTln(NC/ND)
• ND(EC-EF)
• For hole
• Hole density p=NA
• EF-EV=kTln(NV/NA)
 Extrinsic semiconductor (cont.)
• The express of electron and hole densities in terms of ni and Ei
• n=NCexp[-(EC-EF)/kT]= NCexp[-(EC-Ei)/kT]exp[(EF-Ei)/kT] or
n=ni exp[(EF-Ei)/kT] and similar p= ni exp[(Ei-EF)/kT]
• mass action law :pn=ni2
• Valid for both intrinsic and extrinsic semiconductor
under thermal equilibrium
Example
Both donor and acceptor impurities are present
• A greater concentration one determines the
type of conductivity in the semiconductor
• The Fermi level must adjust itself to preserve
charge neutrality
• For n-type semiconductor
n + N A = p + ND

n = 1 / 2 N D − N A + (N D − N A )2 + 4ni2 
 
pn = ni2 / nn
• if |ND-NA| >ni then nn≈ ND-NA
• For p-type semiconductor

p = 1 / 2 N A − N D + (N D − N A )2 + 4ni2 
 
n p = ni2 / p p
Fermi level, functions of T, ND, NA

• As the temperature
increases, the Fermi
level approaches the
intrinsic level
• The semiconductor
become intrinsic

90
 Electron density as a function of temperature
• At low temperature
• Thermal energy not sufficient to ionize all
donor impurities
• Some electron are “frozen” at the donor
level
• Electron density less than the donor
concentration
• As the temperature increased
• The condition of complete ionization is
reached
• nn=ND
• As the temperature is further increased
• Electron concentration the same over a wide
temperature range
• Extrinsic region
• As the temperature is increased even further
• The intrinsic carrier concentration becomes
comparable to the donor concentration
• The semiconductor become intrinsic
• This temperature depend on ND and Eg
CHƯƠNG III- CÔNG NGHỆ
THIẾT KẾ BÁN DẪN TIÊN TIẾN
• 3.1 Giới thiệu chung
• 3.2 Các tiến trình CMOS
• 3.3 Quy trình thiết kế
• 3.4 Các công nghệ thiết kế
• 3.5 Các kỹ thuật thiết kế
3.1 Giới thiệu chung/General introduction
 MOSFET

SEM image of a MOSFET

3.2 Các tiến trình CMOS/CMOS
processes
CMOS Inverter Symbol & Truth Table
STI: Shallow trench isolation
USG: Undoped Silicate Glass
A Kingston RAM module using DDR4 SDRAM, a form of DRAM memory
• Each memory cell in a DRAM chip consists of a capacitor that stores an electrical charge and
a transistor that controls the power flow into the capacitor.
• Digital data is binary and consists of groups of bits with two possible values (0 and 1). If a
memory cell's capacitor carries an electric charge, its bit has a value of 1; if it does not, its bit
has a value of 0.
• To maintain each cell's contents, a memory refresh circuit reads the electrical charge from
each cell, amplifies it, and then writes it back to the cell in a process that repeats many times
each second.
• A single DRAM memory cell can hold its charge for up to 64 milliseconds, and since each
DRAM chip contains billions of cells, it is constantly refreshing large groups of cells at a
time.
Erasable programmable read-only memory
3.3 Tiến trình thiết kế chế tạo IC
• Ion implantation processing replaced diffusion processing for silicon doping
because it offered the advantages of independently controlled dopant
concentration and junction depth, as well as an anisotropic doping profile.
• Polysilicon replaced aluminum as the gate material and local interconnection. It
was used to form self-aligned sources and drains by taking advantage of the
anisotropic profile of ion implantation and the high-temperature stability of
polysilicon
• PD: preventive maintenance
• IMD: intermetal dielectric
• PMD: Premetal dielectric
• USG: undoped silicate glass
• BPSG: Borophosphosilicate glass
• LOCOS: Local oxidation of silicon
FSG: fluorinated silicate glass
 3.4 Các công nghệ thiết kế
What Is Integrated Circuit (IC) Design?
• A process of interconnecting circuit elements to
perform a specific desired function.
Diffusion)

• IC design is fundamental to all microelectronics designs

that we use today.
• It powers our computing devices, image processing,
sensors, and AI functionality.
• IC design is at the heart of every intelligent device and
supports almost every vertical, from autonomous
vehicles to healthcare to space and defense.
• There are two main domains of IC design: digital and
analog and most real-world ICs are a mix of the two.
 How Does the IC Design Flow Work?
• There are many steps involved in the IC design flow,
where the high-level requirements that the project
has to achieve are bifurcated into smaller ones. This
helps achieve the motive of implementing a circuit on
a silicon wafer to perform the desired function.
Architectural design
• This step documents all the primary requirements for
developing the IC. This means that everything
required for the IC design is stated clearly in this
phase. There are many sets of questions that must be
asked here, such as:
• What is the purpose of the IC to be designed?
• How much power and speed will it need?
• What is the targeted cost?
 Logic design

• Logic design in integrated circuit (IC) design

involves creating circuits that perform specific
logical operations using electronic components.
• Once the motive behind designing the IC is known,
the high-level requirements are decomposed into
the lower-level building blocks. Then the pre-
existing blocks/macros are used/modified to get
the desired functionality. These blocks are then
simulated/synthesized to validate the desired
functionality.
1. Basic Concepts
• Boolean Algebra: The foundation of logic design, using
variables that can take values of true (1) or false (0).
• Logic Gates: Basic building blocks such as AND, OR, NOT,
NAND, NOR, XOR, and XNOR that perform logical
operations.
• 2. Combinational Logic
• Definition: Circuits where the output depends only on the
current inputs, not on past inputs.
• Examples: Adders, multiplexers, decoders, and encoders.
• 3. Sequential Logic
• Definition: Circuits where the output depends on both
current inputs and past states (memory).
• Examples: Flip-flops, counters, and registers.
4. Logic Design Process
• Specification: Define the requirements and
functionality of the circuit.
• Schematic Design: Create a visual representation of
the circuit using logic gates.
• Simulation: Test the design using software tools to
ensure it behaves as expected.
• Synthesis: Convert the schematic into a netlist that
describes the connections between components.
• Layout Design: Create the physical layout of the
circuit on the silicon chip.
5. Optimization
• Minimization: Reduce the number of gates and complexity
using techniques like Karnaugh maps or Quine-McCluskey
method.
• Timing Analysis: Ensure the circuit meets speed
requirements and operates correctly under all conditions.
6. Testing and Verification
• Functional Testing: Verify that the circuit performs the
intended functions.
• Fault Testing: Identify and correct any faults in the design.
7. Applications
• Logic design is crucial in creating processors, memory units,
and various digital systems used in computers,
smartphones, and other electronic devices.
 Physical design
1. Overview of Physical Design

• To create a detailed geometric representation of the IC that meets

design specifications, performance requirements, and
manufacturability.

• Translating the logical representation of a circuit into a physical

layout on a silicon chip. This stage is critical for ensuring that the
circuit functions correctly and efficiently in its physical form.

• In this phase, the layout of the interconnected shapes of the

required circuit components is created.

• Physical design is crucial in creating chips for various applications,

including microprocessors, memory devices, and application-
specific integrated circuits (ASICs).
 2. Key Steps in Physical Design
• Floorplanning:
• Determine the placement of major functional blocks on the
chip.
• Optimize for area, power, and performance.
• Placement:
• Position individual cells (logic gates, flip-flops, etc.) within the
defined floorplan.
• Minimize wire lengths and improve signal integrity.
• Routing:
• Connect the placed components using metal layers.
• Ensure that all connections meet design rules and avoid
congestion.
• Design Rule Checking (DRC):
• Verify that the layout adheres to manufacturing constraints
and design rules to avoid fabrication issues.
3. Physical Design Tools
• EDA Tools: Use Electronic Design Automation (EDA)
software for tasks like placement, routing, and verification
(e.g., Cadence, Synopsys, Mentor Graphics).
• Simulation Tools: Simulate the physical design to check for
performance metrics such as timing, power consumption,
and signal integrity.
4. Timing Analysis
• Static Timing Analysis (STA): Assess the timing performance
of the circuit to ensure it meets speed requirements across
all possible operating conditions.
5. Power Management
• Power Distribution Network (PDN): Design a robust
network to deliver power to various components while
minimizing voltage drops and noise.
• Power Gating and Clock Gating: Techniques to reduce
power consumption by turning off parts of the circuit when
not in use.
6. Thermal Analysis
• Evaluate the heat generated by the IC during operation
and ensure that it can be dissipated effectively to
prevent overheating.
7. Manufacturing Considerations
• Yield Optimization: Design for manufacturability to
maximize the number of functional chips produced
from a silicon wafer.
• Packaging: Consider how the IC will be packaged and
connected to other components in a system.
8. Final Verification
• Layout vs. Schematic (LVS): Ensure that the physical
layout matches the original logical design.
• Electrical Rule Checking (ERC): Verify electrical
connections and functionality.
 Physical verification
• It verifies the design and helps to model the physical
effects (resistance, crosstalk, etc.) that may get added
during manufacturing.
• The design rules are created by checking the physical
effects caused due to manufacturing process.
• The designers consider added resistance from wiring,
signal crosstalk, and variability during manufacturing.
1.How will the circuit be laid out on the silicon wafer?
2.Will the circuit function under stress?
• At the end of this step, the designer will have the
answer to such questions.
Key Components of Physical Verification
• Design Rule Checking (DRC):
• Checks the layout against a set of predefined rules to ensure
that all geometries are manufacturable.
• Rules include spacing between features, width of lines, and
overlap of layers.
• Layout vs. Schematic (LVS):
• Compares the physical layout to the original schematic to
ensure they match in terms of connectivity and functionality.
• Confirms that all intended connections and components are
present in the layout.
• Electrical Rule Checking (ERC):
• Validates electrical characteristics of the layout, such as
ensuring there are no short circuits, open circuits, or incorrect
connections.
• Checks for issues like signal integrity and power distribution.
 Final step – The Signoff

• In the final signoff stage, the mission-critical parameters are

verified before manufacturing.

• Parameters include timing, power consumption, and signal

integrity.

• These parameters are verified to mitigate their impact on

performance or manufacturing. Once all the necessary steps
are taken, the IC is sent for manufacturing.
3.5 Các kỹ thuật thiết kế/Design Techniques

• Many types of IC designs:

- Analog IC design
- Digital IC design
- Mixed-signal IC design
 Analog IC Design
• Analog IC design flow involves creating electronic circuits that manipulate
continuous signals, such as voltages and currents, as opposed to digital signals.
These circuits are designed to perform more personalized functions like
amplification, filtering, modulation, and signal processing, in comparison with
Digital ICs.

Design Specification
(Specifications → Constraints → Topologies → Test benchmark
development)
Schematic flow defining
(System-level schematic entry → Stimulate architecture HDL → Block HDL
specification → Circuit-level schematic entry → Stimulate and Optimize
Circuit)
Physical flow
(PCell-based layout entry → Design rule check/ verification (DRC) → Layout
versus schematic (LVS) → Parasitic extraction → Post-layout simulation →
Tape-out)
 Digital IC Design
Digital IC design flow involves turning specifications and features into digital blocks,
which are then converted into logic circuits. Many of the constraints in digital IC design
originate from the foundry process and technological limitations.

Design Specification
(Specifications → Constraints → Test benchmark development)
High-level system design
(Design Partition → Entry-Verilog Behavior Modeling → Functional
Verification → Integration & Verification)

Logic Synthesis
(Convert Register Transfer Level (RTL) into netlist → Design partitioning in
physical blocks → Identify timing margin and constraints → RTL/ gate
level netlist verification → Timing analysis)
• Floorplanning
(Place IC blocks in hierarchical order → Power and clock planning)
Synthesis
(Timing constraints and optimization → Static timing analysis →
Update placement → Update power and clock planning)
Block Level Layout
(Complete blocks placement and routing)
IC Level Layout
(IC integration of all blocks → Place cell → Scan chain/clock tree
insertion → Rout cell →
Physical and electrical design rules check/ verification (DRC) →
Layout versus schematic (LVS) → Extract parasitic → Verify post-
layout timing → Create GDSII → Tape-out)
 Mixed-signal IC Design Flow
• A mixed-signal integrated circuit (IC) is a type of
integrated circuit that combines both analog and digital
circuitry on the same chip.
• It integrates analog functions, which deal with
continuous signals, and digital functions, which process
discrete signals represented as binary numbers.
• Mixed-signal ICs are widely used in various applications,
including data converters (such as analog-to-digital
converters and digital-to-analog converters), sensor
interfaces, power management, communication
systems, and audio processing, etc.
CHƯƠNG IV. CÔNG NGHỆ SẢN
XUẤT VÀ THỬ NGHIỆM BÁN
DẪN TIÊN TIẾN
• 4.1 Giới thiệu chung
• 4.2 Sản xuất bán dẫn (Wafer manufacture,
Lithography process, IC fabrication process)
• 4.3 Thử nghiệm bán dẫn
• 4.4 Đóng gói bán dẫn
4.1. Giới thiệu chung
4.2. Sản xuất bán dẫn/Semiconductors manufacture

Objectives:
• Give two reasons why silicon dominate
• List at least two wafer orientations
• List the basic steps from sand to wafer
• Describe the CZ and FZ methods
• Explain the purpose of epitaxial silicon
• Describe the epi-silicon deposition process.
 Crystal Structures

• Amorphous
- No repeated structure at all
• Polycrystalline
-Some repeated structures
• Single crystal
- One repeated structure
Lỗ ăn mòn/khắc wafer hướng <100>
Khuyết tật lệch mạng
Reactors
Chemical Amplified Photoresists
Chemical Amplified Photoresists
• postexposure bake (PEB)
 Photolithography Process
• Basic Steps of Photolithography
• Photoresist coating
• Alignment and exposure • Development
Photolithography Process
 Wafer Clean

• Remove contaminants
• Remove particulate
• Reduce pinholes and other defects
• Improve photoresist adhesion
• Basic steps
– Chemical clean
– Rinse
– Dry
Wafer Clean Process
 Pre-bake
Pre-bake
Dehydration bake
• Remove moisture from wafer surface
• Promote adhesion between PR and surface
• Usually around 100 °C
• Integration with primer coating
Primer
• Promotes adhesion of PR to wafer surface
• Wildly used: Hexamethyldisilazane (HMDS)
• HMDS vapor coating prior to PR spin coating
• Usually performed in-situ with pre-bake
• Chill plate to cool down wafer before PR coating
• Wafer need to cool down
• Water-cooled chill plate
• Temperature can affect PR viscosity
– Affect PR spin coating thickness
 Spin Coating

• Wafer sit on a vacuum chuck

• Rotate at high speed
• Liquid photoresist applied at center of
wafer
• Photoresist spread by centrifugal force
• Evenly coat on wafer surface
 Viscosity
• Fluids stick on the solid surface
• Affect PR thickness in spin coating
• Related to PR type and temperature
• Need high spin rate for uniform
coating

Relationship of Photoresist
Thickness to Spin Rate and Viscosity
Spin coating paramters
 Soft Bake

• Evaporating most of solvents in

PR
• Solvents help to make a thin PR
but absorb radiation and affect
adhesion
• Soft baking time and temperature
are determined by the matrix
evaluations
• Over bake: polymerized, less
photo-sensitivity
• Under bake: affect adhesion and
exposure
 Soft Bake (cont.)

• Hot plates
• Convection oven
• Infrared oven
• Microwave oven
4.3 Thử nghiệm bán dẫn/Semiconductor Testing
• After wafer processing is finished, wafers are sent out for testing and
packaging.
• Some fabs do testing and packaging on site, and some fabs send the
finished wafers out to a packaging plant.
• Die testing is a very labor-intensive process, since it requires operators
to carefully contact the fine pins of the test tool to tiny bonding pads
by hand (about 100 × 100 µm2) under an optical microscope for every
die on the wafer.
• Some IC manufacturers build testing and packaging plants in
developing countries to take advantage of lower labor costs. This
could change due to rapid improvement of automation technology in
IC testing equipment and the continuous shrinking of the percentage
of labor costs in the total cost of IC manufacturing.
4.4 Đóng gói bán dẫn/Semiconductor
packaging
• Integrated Circuit (IC) packaging is a crucial process
in the semiconductor industry that involves
enclosing and protecting semiconductor devices,
such as microchips, to ensure their functionality,
reliability, and performance
Packaging evolution
Demand new market and greater capabilities
Packaging process
 Purpose of IC Packaging

• Protection: Shields the delicate semiconductor die

from physical damage, moisture, and contaminants.
• Electrical Connections: Provides a means to
connect the chip to external circuits through leads
or pads.
• Thermal Management: Dissipates heat generated
during operation to maintain optimal performance.
• Mechanical Support: Offers structural integrity to
withstand handling and assembly processes.
 Types of IC Packaging

• Through-Hole Packages: Older technology where leads are inserted

through holes in a circuit board (e.g., Dual In-line Package - DIP).

• Surface Mount Packages: Modern packages that are mounted directly onto
the surface of the PCB (e.g., Quad Flat Package - QFP, Ball Grid Array -
BGA).

• Wafer-Level Packaging (WLP): Packaging done at the wafer level before

dicing, allowing for smaller form factors.

• Flip Chip Packaging: The die is flipped and bonded directly to the
substrate, enabling higher performance and lower inductance.
 Key Processes in IC Packaging

• Die Preparation: Involves slicing the wafer into individual dies.

• Die Attach: Attaching the die to the package substrate using adhesives or
solder.

• Wire Bonding/Interconnect Formation: Establishing electrical

connections between the die and package leads.

• Encapsulation: Protecting the die with a plastic or ceramic material to

prevent damage.

• Testing: Ensuring the packaged IC meets performance and reliability

standards.
 Challenges in IC Packaging

• Thermal Management: Effectively managing heat dissipation to

prevent overheating.

• Miniaturization: Designing smaller packages while maintaining

performance and reliability.

• Material Compatibility: Ensuring that materials used in packaging

do not adversely affect the semiconductor die.

• Cost Efficiency: Balancing performance enhancements with

manufacturing costs.
 Future Trends

• Advanced Materials: Use of new materials for better thermal

and electrical performance.

• 3D Packaging: Stacking multiple chips vertically to save space

and improve performance.

• Integration of Passive Components: Incorporating passive

components within the package for added functionality.
CHƯƠNG V- CÁC CÔNG
NGHỆ BÁN DẪN TƯƠNG LAI
• 5.1 Các chất bán dẫn hỗn hợp
• 5.2 Công nghệ nano trong bán dẫn
• 5.3 Công nghệ lượng tử
• 5.4 Các công nghệ vật liệu mới
5.1 Các chất bán dẫn hỗn hợp/Compound
Semiconductors
• Compound semiconductors are materials made from two or more
elements, typically combining elements from groups III and V of
the periodic table (such as gallium arsenide, GaAs) or groups II
and VI (such as cadmium selenide, CdSe). These materials have
unique properties that make them suitable for various applications
in electronics and optoelectronics.
• Compound semiconductors are the next generation of
semiconductors. They operate much faster than silicon and have a
host of other properties that will support emerging technologies
that require ultra-high performance along with sensing and other
capabilities
 Common semiconductor compounds

Ref: Semiconductors Data

Handbook, Springer
Key Characteristics of Compound Semiconductors:
1.Bandgap Engineering:
Compound semiconductors can be engineered to have specific
bandgap energies, allowing for tailored electronic and optical
properties. This is crucial for applications like LEDs and laser diodes.
2.High Electron Mobility:
Many compound semiconductors, such as GaAs, exhibit higher
electron mobility compared to silicon, leading to faster device
operation.
3.Optoelectronic Properties:
They are widely used in optoelectronic devices due to their ability to
efficiently emit and absorb light, making them ideal for lasers,
photodetectors, and solar cells.
4.Temperature Stability:
Certain compound semiconductors maintain performance at higher
temperatures than traditional silicon, making them suitable for high-
temperature applications.
5.2 Công nghệ nano trong bán dẫn

• Nanotechnology in the semiconductor industry

involves manipulating materials and devices at the
nanoscale (typically between 1 to 100 nanometers)
to enhance performance, reduce size, and improve
functionality.
• This approach has led to significant advancements
in semiconductor manufacturing and applications.
 Nanoimprint lithography
An example of nanostructure fabrication and application

Ref: Adv. Energy Mater. 2016, 6, 1601114

N.B. and V.B.C. contributed equally to this work. This work was
supported by the National Research Foundation of Korea (NRF) grant
funded by the Korea government (No. 2016R1C1B2014644)
 Abstract
Schematic of the patterned
CIGS solar cell with the
increased lateral surface area
between CIGS/CdS hexagonal
lattice.

Nanopatterned CuInGaS2 (CIGS) thin films synthesized by a sol-gel-based solution method

and a nanoimprint lithography technique to achieve simultaneous photonic and electrical
enhancements in thin film solar cell applications are demonstrated. The interdigitated CIGS
nanopatterns in adjacent CdS layer form an ordered nanoscale heterojunction of optical
contrast to create a light trapping architecture. This architecture concomitantly leads to
increased junction area between the p-CIGS/n-CdS interface, and thereby influences
effective charge transport. The electron beam induced current and capacitance–voltage
characterization further supports the large carrier collection area and small depletion region
of the nanopatterned CIGS solar cell devices. This strategic geometry affords localization of
incident light inside and between the nanopatterns, where created excitons are easily
dissociated, and it leads to the enhanced current generation of absorbed light. Ultimately, this
approach improves the efficiency of the nanopatterned CIGS solar cell by 55% compared to
its planar counterpart, and offers the possibility of simultaneous management for absorption
and charge transport through a nanopatterning process.
 Nanopattened CIGS fabrication by
imprint technique

Nanopatterned area of 1 inch x 1 inch shows strong diffraction of light,

and it is scalable depending on a master size
 SEM images of nanopattern

SEM image of the nanopatterns prepared only with a binder solution,

showing shrinkage and deformation effect on nanopatterns during
annealing. (b) Top-view SEM image of the nanopattern array after 300ºC
annealing, in which the inset shows the crosssectional view.
Fabrication process
• Schematic diagram of the
fabrication process and
microscopic images of the
nanopatterned CIGS solar cell.
The fabrication process consists
of sequential steps of a) CIGS
(800 nm) nanopatterning on
ITO/glass substrate via NIL
process, d) CdS (60 nm)
deposition using a chemical bath
deposition, g) i-ZnO (50 nm)
deposition using a sputtering
method, and j) AZO (500 nm)
and metal contact depositions
using a sputtering process.
b,e,h,k) Top view and c,f,i,l)
cross-sectional SEM images
obtained after each layer
deposition (all scale bars in the
SEM images, 500 nm).
 Solar cells performance comparison

J–V characteristics and b) EQE spectra of nanopatterned and planar CIGS thin film devices.
5.3 Công nghệ lượng tử/Quantum
Technology

• Quantum technology is a rapidly evolving field that

harnesses the principles of quantum mechanics to
develop innovative technologies.

• It has the potential to revolutionize various fields,

from computing and communication to medicine
and materials science.
Fundamentals of Quantum Mechanics

• Superposition:
Quantum mechanics allows particles to exist in
multiple states simultaneously, unlike classical physics

• Entanglement
Engltangled particles are linked, even when
separated influencing each other instantly

• Quantum Tunneling
Particles can pass through barriers seemingly
impossible in classical physics
Quantum Computing and Quantum Algorithms

• Quantum Computers
Quantum computers utilize qubits, which can be in superposition, to
perform computations.
• Quantum Algorithms
These algorithms are specifically designed to leverage the unique
properties of qubits, such as superposition and entanglement
• Applications
Quantum computing has the potential to revolutionize drug
discovery, materials science, and artificial intelligence.
 Quantum Cryptography and Quantum
Communication

• Quantum Key Distribution

- Entanglement allows for secure communication by generating shared keys

between parties.

• Quantum Networks

- Quantum networks utilize quantum properties for enhanced security and

communication speed.

• Unbreakable Encryption

- Quantum cryptography offers a new level of security, resistant to

eavesdropping and hacking.
 Applications of Quantum Technology

• Quantum computing
• Drug Discovery
Simulating molecular interactions for faster and more efficient drug
development.
• Materials Science
Designing new materials with enhanced properties, like superconductivity or
improved durability.
• Precision Timekeeping
Developing atomic clocks with unprecedented accuracy for navigation and
scientific research.
Challenges, Limitations and Future of
Quantum Technology
• Scalability
Building large-scale quantum computers with many qubits poses
significant engineering challenges.
• Decoherence
Qubits are sensitive to environmental noise, leading to errors and loss of
quantum information.
• Cost
Quantum technology is currently expensive, limiting its widespread
adoption and commercialization
• Future of QT:
Quantum technology is expected to continue advancing rapidly, with
breakthroughs in areas like quantum computing, communication, and
sensing. It holds immense promise for transforming various industries
and creating new opportunities.
 5.4 Các công nghệ bán dẫn mới/New
semiconductor Technologies
1. 2D Materials: Materials like graphene and transition metal dichalcogenides
(TMDs) are being explored for their unique electronic properties, which could lead
to faster and more efficient devices.
2. Gallium Nitride (GaN): This wide bandgap semiconductor is used in high-power
and high-frequency applications, such as RF amplifiers and power converters, due
to its efficiency and thermal performance.
3. Silicon Carbide (SiC): Another wide bandgap material, SiC is ideal for high-
temperature and high-voltage applications, making it suitable for electric vehicles
and power electronics.
4. Perovskite Semiconductors: These materials are being investigated for use in solar
cells and LEDs due to their excellent light absorption and tunable electronic
properties.
 New semiconductor Technologies (cont)
5. Organic Semiconductors: Organic materials are being used for flexible
electronics, OLED displays, and sensors, offering advantages in terms of
lightweight and low-cost manufacturing.
6. Advanced Dielectrics: New dielectric materials are being developed to
reduce leakage currents and improve the performance of transistors, especially
in smaller nodes.
7. Nanowires:
• Structure: Thin, wire-like structures made from various materials (e.g.,
metals, semiconductors).
• Properties: High surface area-to-volume ratio, which enhances
electrical and optical properties.
• Applications: Used in sensors, solar cells, and transistors.
7. Quantum Dots: Nanoscale semiconductor particles that exhibit quantum
mechanical properties, used in displays and potentially in quantum computing
applications.
8. Ferroelectric Materials: These materials can enhance memory devices by
allowing non-volatile data storage, improving speed and efficiency.
 Graphene

• Graphene was hailed as a revolutionary

material, promising ultra-fast
electronics, supercomputers and super-strong
materials.
• More fantastical claims have included space
elevators, solar sails, artificial retinas, and
even invisibility cloaks.
• Just six years after their initial work, Geim
and Novoselov were awarded the Nobel Prize
in Physics, further fueling the enthusiasm
around this wonder stuff.
• Since then, hundreds of thousands of
academic papers have been published on
graphene and related materials.
 Properties of Graphene
1.High Electrical Conductivity:
Graphene exhibits exceptional electrical conductivity, allowing for
rapid electron movement, making it suitable for high-performance
electronic devices.
2.Mechanical Strength:
It is one of the strongest materials known, with a tensile strength over
100 GPa, which is about 200 times stronger than steel.
3.High Thermal Conductivity:
Graphene has excellent thermal conductivity, around 5000 W/mK,
making it effective for heat dissipation in electronic applications.
4.Flexibility:
Despite its strength, graphene is highly flexible and can be bent
without breaking, which is advantageous for flexible electronics.
Properties of Graphene (cont.)
5. Large Surface Area:
With a surface area of approximately 2630 m²/g, graphene can be used
in applications like sensors and energy storage devices.
6. Transparency:
Graphene is nearly transparent, absorbing only about 2.3% of visible
light, making it useful for applications in transparent conductive films.
7. Chemical Reactivity:
The edges of graphene sheets can be chemically modified, allowing for
functionalization for various applications in sensors and drug delivery.
8. Quantum Properties:
1. Exhibits unique quantum phenomena, such as the quantum Hall
effect, making it a subject of interest in quantum computing
research.